forked from OSchip/llvm-project
parent
86838aafee
commit
00810c39da
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@ -2091,7 +2091,7 @@ X86TargetLowering::LowerCall(SDValue Chain, SDValue Callee,
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// tailcall must happen after callee-saved registers are poped.
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// tailcall must happen after callee-saved registers are poped.
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// FIXME: Give it a special register class that contains caller-saved
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// FIXME: Give it a special register class that contains caller-saved
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// register instead?
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// register instead?
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unsigned TCReg = Is64Bit ? X86::R11 : X86::ECX;
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unsigned TCReg = Is64Bit ? X86::R11 : X86::EAX;
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Chain = DAG.getCopyToReg(Chain, dl,
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Chain = DAG.getCopyToReg(Chain, dl,
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DAG.getRegister(TCReg, getPointerTy()),
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DAG.getRegister(TCReg, getPointerTy()),
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Callee,InFlag);
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Callee,InFlag);
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@ -2145,7 +2145,7 @@ X86TargetLowering::LowerCall(SDValue Chain, SDValue Callee,
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}
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}
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assert(((Callee.getOpcode() == ISD::Register &&
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assert(((Callee.getOpcode() == ISD::Register &&
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(cast<RegisterSDNode>(Callee)->getReg() == X86::ECX ||
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(cast<RegisterSDNode>(Callee)->getReg() == X86::EAX ||
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cast<RegisterSDNode>(Callee)->getReg() == X86::R11)) ||
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cast<RegisterSDNode>(Callee)->getReg() == X86::R11)) ||
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Callee.getOpcode() == ISD::TargetExternalSymbol ||
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Callee.getOpcode() == ISD::TargetExternalSymbol ||
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Callee.getOpcode() == ISD::TargetGlobalAddress) &&
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Callee.getOpcode() == ISD::TargetGlobalAddress) &&
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@ -1,4 +1,4 @@
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; RUN: llc < %s -march=x86 -tailcallopt | grep {jmp} | grep {\\*%ecx}
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; RUN: llc < %s -march=x86 -tailcallopt | grep {jmp} | grep {\\*%eax}
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declare i32 @putchar(i32)
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declare i32 @putchar(i32)
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