forked from OSchip/llvm-project
[X86] Remove patterns for MOVSD with v4i32 types. We don't appear to really need them and if we do we should just use a bitcast to a 64-bit element type.
llvm-svn: 295589
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@ -3499,10 +3499,6 @@ let Predicates = [HasAVX512] in {
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(VMOVSDZrr VR128X:$src1, (COPY_TO_REGCLASS VR128X:$src2, FR64X))>;
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def : Pat<(v2f64 (X86Movsd VR128X:$src1, VR128X:$src2)),
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(VMOVSDZrr VR128X:$src1, (COPY_TO_REGCLASS VR128X:$src2, FR64X))>;
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def : Pat<(v4f32 (X86Movsd VR128X:$src1, VR128X:$src2)),
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(VMOVSDZrr VR128X:$src1, (COPY_TO_REGCLASS VR128X:$src2, FR64X))>;
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def : Pat<(v4i32 (X86Movsd VR128X:$src1, VR128X:$src2)),
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(VMOVSDZrr VR128X:$src1, (COPY_TO_REGCLASS VR128X:$src2, FR64X))>;
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// 256-bit variants
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def : Pat<(v4i64 (X86Movsd VR256X:$src1, VR256X:$src2)),
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@ -643,10 +643,6 @@ let Predicates = [UseAVX] in {
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(VMOVSDrr VR128:$src1, (COPY_TO_REGCLASS VR128:$src2, FR64))>;
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def : Pat<(v2f64 (X86Movsd VR128:$src1, VR128:$src2)),
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(VMOVSDrr VR128:$src1, (COPY_TO_REGCLASS VR128:$src2, FR64))>;
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def : Pat<(v4f32 (X86Movsd VR128:$src1, VR128:$src2)),
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(VMOVSDrr VR128:$src1, (COPY_TO_REGCLASS VR128:$src2, FR64))>;
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def : Pat<(v4i32 (X86Movsd VR128:$src1, VR128:$src2)),
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(VMOVSDrr VR128:$src1, (COPY_TO_REGCLASS VR128:$src2, FR64))>;
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// 256-bit variants
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def : Pat<(v4i64 (X86Movsd VR256:$src1, VR256:$src2)),
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@ -737,10 +733,6 @@ let Predicates = [UseSSE2] in {
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(MOVSDrr VR128:$src1, (COPY_TO_REGCLASS VR128:$src2, FR64))>;
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def : Pat<(v2f64 (X86Movsd VR128:$src1, VR128:$src2)),
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(MOVSDrr VR128:$src1, (COPY_TO_REGCLASS VR128:$src2, FR64))>;
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def : Pat<(v4f32 (X86Movsd VR128:$src1, VR128:$src2)),
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(MOVSDrr VR128:$src1, (COPY_TO_REGCLASS VR128:$src2, FR64))>;
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def : Pat<(v4i32 (X86Movsd VR128:$src1, VR128:$src2)),
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(MOVSDrr VR128:$src1, (COPY_TO_REGCLASS VR128:$src2, FR64))>;
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// FIXME: Instead of a X86Movlps there should be a X86Movsd here, the problem
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// is during lowering, where it's not possible to recognize the fold because
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