forked from OSchip/llvm-project
[Test] Add some more tests showing how we fail to widen IV
This commit is contained in:
Max Kazantsev
parent
9178c630c3
commit
0077e1680f
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@ -794,3 +794,413 @@ failure:
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call void @use(i32 %foo)
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unreachable
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}
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; TODO: We can widen here despite the icmp user of %foo in guarded block.
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define i32 @test16_unsigned_pos1(i32 %start, i32* %p, i32* %q, i32 %x) {
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; CHECK-LABEL: @test16_unsigned_pos1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[START:%.*]] to i64
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; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[START]], -1
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[BACKEDGE:%.*]] ], [ [[TMP0]], [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[COND:%.*]] = icmp eq i64 [[INDVARS_IV]], 0
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; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[INDVARS_IV]] to i32
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; CHECK-NEXT: [[FOO:%.*]] = add i32 [[TMP2]], -1
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; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[GUARDED:%.*]]
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; CHECK: guarded:
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; CHECK-NEXT: [[ICMP_USER3:%.*]] = icmp ult i32 [[TMP1]], [[X:%.*]]
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; CHECK-NEXT: br i1 [[ICMP_USER3]], label [[BACKEDGE]], label [[SIDE_EXIT:%.*]]
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; CHECK: backedge:
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; CHECK-NEXT: [[INDEX:%.*]] = zext i32 [[FOO]] to i64
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; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[INDEX]]
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; CHECK-NEXT: store i32 1, i32* [[STORE_ADDR]], align 4
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; CHECK-NEXT: [[LOAD_ADDR:%.*]] = getelementptr i32, i32* [[Q:%.*]], i64 [[INDEX]]
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; CHECK-NEXT: [[STOP:%.*]] = load i32, i32* [[Q]], align 4
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; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
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; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
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; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: call void @use(i32 -1)
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; CHECK-NEXT: ret i32 -1
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; CHECK: failure:
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; CHECK-NEXT: [[FOO_LCSSA2:%.*]] = phi i32 [ [[FOO]], [[BACKEDGE]] ]
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; CHECK-NEXT: call void @use(i32 [[FOO_LCSSA2]])
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; CHECK-NEXT: unreachable
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; CHECK: side_exit:
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; CHECK-NEXT: ret i32 0
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [%start, %entry], [%iv.next.1, %backedge]
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%cond = icmp eq i32 %iv, 0
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%foo = add i32 %iv, -1
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br i1 %cond, label %exit, label %guarded
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guarded:
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%icmp_user = icmp ult i32 %foo, %x
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br i1 %icmp_user, label %backedge, label %side_exit
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backedge:
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%index = zext i32 %foo to i64
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%store.addr = getelementptr i32, i32* %p, i64 %index
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store i32 1, i32* %store.addr
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%load.addr = getelementptr i32, i32* %q, i64 %index
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%stop = load i32, i32* %q
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%loop.cond = icmp eq i32 %stop, 0
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%iv.next.1 = add i32 %iv, -1
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br i1 %loop.cond, label %loop, label %failure
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exit:
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call void @use(i32 %foo)
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ret i32 %foo
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failure:
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call void @use(i32 %foo)
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unreachable
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side_exit:
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ret i32 0
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}
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; TODO: We can widen here despite the icmp user of %foo in guarded block.
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define i32 @test16_unsigned_pos2(i32 %start, i32* %p, i32* %q, i32 %x) {
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; CHECK-LABEL: @test16_unsigned_pos2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[START:%.*]] to i64
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[BACKEDGE:%.*]] ], [ [[TMP0]], [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[COND:%.*]] = icmp eq i64 [[INDVARS_IV]], 0
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; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[INDVARS_IV]] to i32
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; CHECK-NEXT: [[FOO:%.*]] = add i32 [[TMP1]], -1
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; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[GUARDED:%.*]]
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; CHECK: guarded:
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; CHECK-NEXT: [[ICMP_USER:%.*]] = icmp ne i32 [[FOO]], [[X:%.*]]
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; CHECK-NEXT: br i1 [[ICMP_USER]], label [[BACKEDGE]], label [[SIDE_EXIT:%.*]]
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; CHECK: backedge:
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; CHECK-NEXT: [[INDEX:%.*]] = zext i32 [[FOO]] to i64
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; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[INDEX]]
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; CHECK-NEXT: store i32 1, i32* [[STORE_ADDR]], align 4
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; CHECK-NEXT: [[LOAD_ADDR:%.*]] = getelementptr i32, i32* [[Q:%.*]], i64 [[INDEX]]
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; CHECK-NEXT: [[STOP:%.*]] = load i32, i32* [[Q]], align 4
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; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
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; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
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; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: call void @use(i32 -1)
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; CHECK-NEXT: ret i32 -1
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; CHECK: failure:
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; CHECK-NEXT: [[FOO_LCSSA2:%.*]] = phi i32 [ [[FOO]], [[BACKEDGE]] ]
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; CHECK-NEXT: call void @use(i32 [[FOO_LCSSA2]])
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; CHECK-NEXT: unreachable
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; CHECK: side_exit:
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; CHECK-NEXT: ret i32 0
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [%start, %entry], [%iv.next.1, %backedge]
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%cond = icmp eq i32 %iv, 0
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%foo = add i32 %iv, -1
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br i1 %cond, label %exit, label %guarded
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guarded:
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%icmp_user = icmp ne i32 %foo, %x
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br i1 %icmp_user, label %backedge, label %side_exit
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backedge:
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%index = zext i32 %foo to i64
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%store.addr = getelementptr i32, i32* %p, i64 %index
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store i32 1, i32* %store.addr
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%load.addr = getelementptr i32, i32* %q, i64 %index
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%stop = load i32, i32* %q
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%loop.cond = icmp eq i32 %stop, 0
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%iv.next.1 = add i32 %iv, -1
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br i1 %loop.cond, label %loop, label %failure
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exit:
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call void @use(i32 %foo)
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ret i32 %foo
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failure:
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call void @use(i32 %foo)
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unreachable
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side_exit:
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ret i32 0
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}
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; icmp slt user in guarded block prevents widening.
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define i32 @test16_unsigned_neg(i32 %start, i32* %p, i32* %q, i32 %x) {
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; CHECK-LABEL: @test16_unsigned_neg(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[START:%.*]] to i64
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[BACKEDGE:%.*]] ], [ [[TMP0]], [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[COND:%.*]] = icmp eq i64 [[INDVARS_IV]], 0
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; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[INDVARS_IV]] to i32
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; CHECK-NEXT: [[FOO:%.*]] = add i32 [[TMP1]], -1
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; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[GUARDED:%.*]]
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; CHECK: guarded:
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; CHECK-NEXT: [[ICMP_USER:%.*]] = icmp slt i32 [[FOO]], [[X:%.*]]
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; CHECK-NEXT: br i1 [[ICMP_USER]], label [[BACKEDGE]], label [[SIDE_EXIT:%.*]]
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; CHECK: backedge:
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; CHECK-NEXT: [[INDEX:%.*]] = zext i32 [[FOO]] to i64
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; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[INDEX]]
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; CHECK-NEXT: store i32 1, i32* [[STORE_ADDR]], align 4
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; CHECK-NEXT: [[LOAD_ADDR:%.*]] = getelementptr i32, i32* [[Q:%.*]], i64 [[INDEX]]
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; CHECK-NEXT: [[STOP:%.*]] = load i32, i32* [[Q]], align 4
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; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
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; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
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; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: call void @use(i32 -1)
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; CHECK-NEXT: ret i32 -1
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; CHECK: failure:
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; CHECK-NEXT: [[FOO_LCSSA2:%.*]] = phi i32 [ [[FOO]], [[BACKEDGE]] ]
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; CHECK-NEXT: call void @use(i32 [[FOO_LCSSA2]])
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; CHECK-NEXT: unreachable
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; CHECK: side_exit:
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; CHECK-NEXT: ret i32 0
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [%start, %entry], [%iv.next.1, %backedge]
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%cond = icmp eq i32 %iv, 0
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%foo = add i32 %iv, -1
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br i1 %cond, label %exit, label %guarded
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guarded:
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%icmp_user = icmp slt i32 %foo, %x
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br i1 %icmp_user, label %backedge, label %side_exit
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backedge:
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%index = zext i32 %foo to i64
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%store.addr = getelementptr i32, i32* %p, i64 %index
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store i32 1, i32* %store.addr
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%load.addr = getelementptr i32, i32* %q, i64 %index
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%stop = load i32, i32* %q
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%loop.cond = icmp eq i32 %stop, 0
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%iv.next.1 = add i32 %iv, -1
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br i1 %loop.cond, label %loop, label %failure
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exit:
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call void @use(i32 %foo)
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ret i32 %foo
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failure:
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call void @use(i32 %foo)
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unreachable
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side_exit:
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ret i32 0
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}
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; TODO: We can widen here despite the icmp user of %foo in guarded block.
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define i32 @test16_signed_pos1(i32 %start, i32* %p, i32* %q, i32 %x) {
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; CHECK-LABEL: @test16_signed_pos1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[START:%.*]], [[ENTRY:%.*]] ], [ [[IV_NEXT_1:%.*]], [[BACKEDGE:%.*]] ]
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; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[IV]], 0
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; CHECK-NEXT: [[FOO:%.*]] = add i32 [[IV]], -1
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; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[GUARDED:%.*]]
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; CHECK: guarded:
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; CHECK-NEXT: [[ICMP_USER:%.*]] = icmp slt i32 [[FOO]], [[X:%.*]]
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; CHECK-NEXT: br i1 [[ICMP_USER]], label [[BACKEDGE]], label [[SIDE_EXIT:%.*]]
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; CHECK: backedge:
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; CHECK-NEXT: [[INDEX:%.*]] = sext i32 [[FOO]] to i64
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; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[INDEX]]
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; CHECK-NEXT: store i32 1, i32* [[STORE_ADDR]], align 4
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; CHECK-NEXT: [[LOAD_ADDR:%.*]] = getelementptr i32, i32* [[Q:%.*]], i64 [[INDEX]]
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; CHECK-NEXT: [[STOP:%.*]] = load i32, i32* [[Q]], align 4
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; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
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; CHECK-NEXT: [[IV_NEXT_1]] = add i32 [[IV]], -1
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; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: call void @use(i32 -1)
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; CHECK-NEXT: ret i32 -1
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; CHECK: failure:
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; CHECK-NEXT: [[FOO_LCSSA2:%.*]] = phi i32 [ [[FOO]], [[BACKEDGE]] ]
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; CHECK-NEXT: call void @use(i32 [[FOO_LCSSA2]])
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; CHECK-NEXT: unreachable
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; CHECK: side_exit:
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; CHECK-NEXT: ret i32 0
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [%start, %entry], [%iv.next.1, %backedge]
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%cond = icmp eq i32 %iv, 0
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%foo = add i32 %iv, -1
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br i1 %cond, label %exit, label %guarded
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guarded:
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%icmp_user = icmp slt i32 %foo, %x
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br i1 %icmp_user, label %backedge, label %side_exit
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backedge:
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%index = sext i32 %foo to i64
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%store.addr = getelementptr i32, i32* %p, i64 %index
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store i32 1, i32* %store.addr
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%load.addr = getelementptr i32, i32* %q, i64 %index
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%stop = load i32, i32* %q
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%loop.cond = icmp eq i32 %stop, 0
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%iv.next.1 = add i32 %iv, -1
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br i1 %loop.cond, label %loop, label %failure
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exit:
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call void @use(i32 %foo)
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ret i32 %foo
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failure:
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call void @use(i32 %foo)
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unreachable
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side_exit:
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ret i32 0
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}
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; TODO: We can widen here despite the icmp user of %foo in guarded block.
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define i32 @test16_signed_pos2(i32 %start, i32* %p, i32* %q, i32 %x) {
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; CHECK-LABEL: @test16_signed_pos2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[START:%.*]], [[ENTRY:%.*]] ], [ [[IV_NEXT_1:%.*]], [[BACKEDGE:%.*]] ]
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; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[IV]], 0
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; CHECK-NEXT: [[FOO:%.*]] = add i32 [[IV]], -1
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; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[GUARDED:%.*]]
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; CHECK: guarded:
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; CHECK-NEXT: [[ICMP_USER:%.*]] = icmp ne i32 [[FOO]], [[X:%.*]]
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; CHECK-NEXT: br i1 [[ICMP_USER]], label [[BACKEDGE]], label [[SIDE_EXIT:%.*]]
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; CHECK: backedge:
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; CHECK-NEXT: [[INDEX:%.*]] = sext i32 [[FOO]] to i64
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; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[INDEX]]
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; CHECK-NEXT: store i32 1, i32* [[STORE_ADDR]], align 4
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; CHECK-NEXT: [[LOAD_ADDR:%.*]] = getelementptr i32, i32* [[Q:%.*]], i64 [[INDEX]]
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; CHECK-NEXT: [[STOP:%.*]] = load i32, i32* [[Q]], align 4
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; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
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; CHECK-NEXT: [[IV_NEXT_1]] = add i32 [[IV]], -1
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; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: call void @use(i32 -1)
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; CHECK-NEXT: ret i32 -1
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; CHECK: failure:
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; CHECK-NEXT: [[FOO_LCSSA2:%.*]] = phi i32 [ [[FOO]], [[BACKEDGE]] ]
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; CHECK-NEXT: call void @use(i32 [[FOO_LCSSA2]])
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; CHECK-NEXT: unreachable
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; CHECK: side_exit:
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; CHECK-NEXT: ret i32 0
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [%start, %entry], [%iv.next.1, %backedge]
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%cond = icmp eq i32 %iv, 0
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%foo = add i32 %iv, -1
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br i1 %cond, label %exit, label %guarded
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guarded:
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%icmp_user = icmp ne i32 %foo, %x
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br i1 %icmp_user, label %backedge, label %side_exit
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backedge:
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%index = sext i32 %foo to i64
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%store.addr = getelementptr i32, i32* %p, i64 %index
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store i32 1, i32* %store.addr
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%load.addr = getelementptr i32, i32* %q, i64 %index
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%stop = load i32, i32* %q
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%loop.cond = icmp eq i32 %stop, 0
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%iv.next.1 = add i32 %iv, -1
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br i1 %loop.cond, label %loop, label %failure
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exit:
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call void @use(i32 %foo)
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ret i32 %foo
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failure:
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call void @use(i32 %foo)
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unreachable
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side_exit:
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ret i32 0
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}
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; icmp ult user in guarded block prevents widening.
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define i32 @test16_signed_neg(i32 %start, i32* %p, i32* %q, i32 %x) {
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; CHECK-LABEL: @test16_signed_neg(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[START:%.*]], -1
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[START]], [[ENTRY:%.*]] ], [ [[IV_NEXT_1:%.*]], [[BACKEDGE:%.*]] ]
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; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[IV]], 0
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; CHECK-NEXT: [[FOO:%.*]] = add i32 [[IV]], -1
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; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[GUARDED:%.*]]
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; CHECK: guarded:
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; CHECK-NEXT: [[ICMP_USER3:%.*]] = icmp ult i32 [[TMP0]], [[X:%.*]]
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; CHECK-NEXT: br i1 [[ICMP_USER3]], label [[BACKEDGE]], label [[SIDE_EXIT:%.*]]
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; CHECK: backedge:
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; CHECK-NEXT: [[INDEX:%.*]] = sext i32 [[FOO]] to i64
|
||||
; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[INDEX]]
|
||||
; CHECK-NEXT: store i32 1, i32* [[STORE_ADDR]], align 4
|
||||
; CHECK-NEXT: [[LOAD_ADDR:%.*]] = getelementptr i32, i32* [[Q:%.*]], i64 [[INDEX]]
|
||||
; CHECK-NEXT: [[STOP:%.*]] = load i32, i32* [[Q]], align 4
|
||||
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
|
||||
; CHECK-NEXT: [[IV_NEXT_1]] = add i32 [[IV]], -1
|
||||
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]]
|
||||
; CHECK: exit:
|
||||
; CHECK-NEXT: call void @use(i32 -1)
|
||||
; CHECK-NEXT: ret i32 -1
|
||||
; CHECK: failure:
|
||||
; CHECK-NEXT: [[FOO_LCSSA2:%.*]] = phi i32 [ [[FOO]], [[BACKEDGE]] ]
|
||||
; CHECK-NEXT: call void @use(i32 [[FOO_LCSSA2]])
|
||||
; CHECK-NEXT: unreachable
|
||||
; CHECK: side_exit:
|
||||
; CHECK-NEXT: ret i32 0
|
||||
;
|
||||
entry:
|
||||
br label %loop
|
||||
|
||||
loop:
|
||||
%iv = phi i32 [%start, %entry], [%iv.next.1, %backedge]
|
||||
%cond = icmp eq i32 %iv, 0
|
||||
%foo = add i32 %iv, -1
|
||||
br i1 %cond, label %exit, label %guarded
|
||||
|
||||
guarded:
|
||||
%icmp_user = icmp ult i32 %foo, %x
|
||||
br i1 %icmp_user, label %backedge, label %side_exit
|
||||
|
||||
backedge:
|
||||
%index = sext i32 %foo to i64
|
||||
%store.addr = getelementptr i32, i32* %p, i64 %index
|
||||
store i32 1, i32* %store.addr
|
||||
%load.addr = getelementptr i32, i32* %q, i64 %index
|
||||
%stop = load i32, i32* %q
|
||||
%loop.cond = icmp eq i32 %stop, 0
|
||||
%iv.next.1 = add i32 %iv, -1
|
||||
br i1 %loop.cond, label %loop, label %failure
|
||||
|
||||
exit:
|
||||
call void @use(i32 %foo)
|
||||
ret i32 %foo
|
||||
|
||||
failure:
|
||||
call void @use(i32 %foo)
|
||||
unreachable
|
||||
|
||||
side_exit:
|
||||
ret i32 0
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue