forked from OSchip/llvm-project
- When expanding a bit_convert whose src operand is also to be expanded and
its expansion result type is equal to the result type of the bit_convert, e.g. (i64 bit_convert (f64 op)) if FP is not legal returns the result of the expanded source operand. - Store f32 / f64 may be expanded to a single store i32/i64. llvm-svn: 32490
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@ -1735,7 +1735,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
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}
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} else {
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ExpandOp(Node->getOperand(1), Lo, Hi);
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IncrementSize = MVT::getSizeInBits(Hi.getValueType())/8;
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IncrementSize = Hi.Val ? MVT::getSizeInBits(Hi.getValueType())/8 : 0;
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if (!TLI.isLittleEndian())
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std::swap(Lo, Hi);
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@ -1743,6 +1743,13 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
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Lo = DAG.getStore(Tmp1, Lo, Tmp2, ST->getSrcValue(),
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ST->getSrcValueOffset());
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if (Hi.Val == NULL) {
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// Must be int <-> float one-to-one expansion.
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Result = Lo;
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break;
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}
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Tmp2 = DAG.getNode(ISD::ADD, Tmp2.getValueType(), Tmp2,
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getIntPtrConstant(IncrementSize));
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assert(isTypeLegal(Tmp2.getValueType()) &&
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@ -4593,7 +4600,14 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){
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// f32 / f64 must be expanded to i32 / i64.
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if (VT == MVT::f32 || VT == MVT::f64) {
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Lo = DAG.getNode(ISD::BIT_CONVERT, NVT, Node->getOperand(0));
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Hi = SDOperand();
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break;
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}
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// If source operand will be expanded to the same type as VT, i.e.
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// i64 <- f64, i32 <- f32, expand the source operand instead.
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MVT::ValueType VT0 = Node->getOperand(0).getValueType();
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if (getTypeAction(VT0) == Expand && TLI.getTypeToTransformTo(VT0) == VT) {
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ExpandOp(Node->getOperand(0), Lo, Hi);
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break;
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}
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