diff --git a/llvm/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll b/llvm/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll index d1d28ae15b0d..be28a9a4542b 100644 --- a/llvm/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll +++ b/llvm/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s | grep {subfc r3,r5,r4} -; RUN: llc < %s | grep {subfze r4,r2} -; RUN: llc < %s -regalloc=local | grep {subfc r2,r5,r4} +; RUN: llc < %s | grep {subfze r4,r6} +; RUN: llc < %s -regalloc=local | grep {subfc r6,r5,r4} ; RUN: llc < %s -regalloc=local | grep {subfze r3,r3} ; The first argument of subfc must not be the same as any other register. diff --git a/llvm/test/CodeGen/PowerPC/2009-08-17-inline-asm-addr-mode-breakage.ll b/llvm/test/CodeGen/PowerPC/2009-08-17-inline-asm-addr-mode-breakage.ll index 5d09696933b5..0fd949d950bd 100644 --- a/llvm/test/CodeGen/PowerPC/2009-08-17-inline-asm-addr-mode-breakage.ll +++ b/llvm/test/CodeGen/PowerPC/2009-08-17-inline-asm-addr-mode-breakage.ll @@ -10,8 +10,8 @@ target triple = "powerpc-apple-darwin10.0" define void @foo(i32 %y) nounwind ssp { entry: ; CHECK: foo -; CHECK: add r2 -; CHECK: 0(r2) +; CHECK: add r4 +; CHECK: 0(r4) %y_addr = alloca i32 ; [#uses=2] %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] store i32 %y, i32* %y_addr diff --git a/llvm/test/CodeGen/PowerPC/LargeAbsoluteAddr.ll b/llvm/test/CodeGen/PowerPC/LargeAbsoluteAddr.ll index 0f7acacbfac9..2c582a302a4a 100644 --- a/llvm/test/CodeGen/PowerPC/LargeAbsoluteAddr.ll +++ b/llvm/test/CodeGen/PowerPC/LargeAbsoluteAddr.ll @@ -1,9 +1,9 @@ ; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin | \ -; RUN: grep {stw r3, 32751} +; RUN: grep {stw r4, 32751} ; RUN: llc < %s -march=ppc64 -mtriple=powerpc-apple-darwin | \ -; RUN: grep {stw r3, 32751} +; RUN: grep {stw r4, 32751} ; RUN: llc < %s -march=ppc64 -mtriple=powerpc-apple-darwin | \ -; RUN: grep {std r2, 9024} +; RUN: grep {std r3, 9024} define void @test() { store i32 0, i32* inttoptr (i64 48725999 to i32*) diff --git a/llvm/test/CodeGen/PowerPC/indirectbr.ll b/llvm/test/CodeGen/PowerPC/indirectbr.ll index fbc7bd2264b6..2094e10a5879 100644 --- a/llvm/test/CodeGen/PowerPC/indirectbr.ll +++ b/llvm/test/CodeGen/PowerPC/indirectbr.ll @@ -43,13 +43,13 @@ L2: ; preds = %L3, %bb2 L1: ; preds = %L2, %bb2 %res.3 = phi i32 [ %phitmp, %L2 ], [ 2, %bb2 ] ; [#uses=1] -; PIC: addis r4, r2, ha16(L_BA4__foo_L5-"L1$pb") -; PIC: li r5, lo16(L_BA4__foo_L5-"L1$pb") -; PIC: add r4, r4, r5 -; PIC: stw r4 -; STATIC: li r2, lo16(L_BA4__foo_L5) -; STATIC: addis r2, r2, ha16(L_BA4__foo_L5) -; STATIC: stw r2 +; PIC: addis r5, r4, ha16(L_BA4__foo_L5-"L1$pb") +; PIC: li r6, lo16(L_BA4__foo_L5-"L1$pb") +; PIC: add r5, r5, r6 +; PIC: stw r5 +; STATIC: li r4, lo16(L_BA4__foo_L5) +; STATIC: addis r4, r4, ha16(L_BA4__foo_L5) +; STATIC: stw r4 store i8* blockaddress(@foo, %L5), i8** @nextaddr, align 4 ret i32 %res.3 }