forked from OSchip/llvm-project
[AMDGPU] SIFoldOperands: use range-based loops and make_early_inc_range
NFC.
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@ -625,22 +625,17 @@ void SIFoldOperands::foldOperand(
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Register RegSeqDstReg = UseMI->getOperand(0).getReg();
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unsigned RegSeqDstSubReg = UseMI->getOperand(UseOpIdx + 1).getImm();
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MachineRegisterInfo::use_nodbg_iterator Next;
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for (MachineRegisterInfo::use_nodbg_iterator
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RSUse = MRI->use_nodbg_begin(RegSeqDstReg), RSE = MRI->use_nodbg_end();
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RSUse != RSE; RSUse = Next) {
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Next = std::next(RSUse);
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MachineInstr *RSUseMI = RSUse->getParent();
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for (auto &RSUse : make_early_inc_range(MRI->use_nodbg_operands(RegSeqDstReg))) {
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MachineInstr *RSUseMI = RSUse.getParent();
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if (tryToFoldACImm(TII, UseMI->getOperand(0), RSUseMI,
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RSUse.getOperandNo(), FoldList))
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RSUseMI->getOperandNo(&RSUse), FoldList))
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continue;
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if (RSUse->getSubReg() != RegSeqDstSubReg)
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if (RSUse.getSubReg() != RegSeqDstSubReg)
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continue;
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foldOperand(OpToFold, RSUseMI, RSUse.getOperandNo(), FoldList,
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foldOperand(OpToFold, RSUseMI, RSUseMI->getOperandNo(&RSUse), FoldList,
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CopiesToReplace);
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}
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@ -700,17 +695,13 @@ void SIFoldOperands::foldOperand(
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const TargetRegisterClass *DestRC = TRI->getRegClassForReg(*MRI, DestReg);
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if (!DestReg.isPhysical()) {
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if (TRI->isSGPRClass(SrcRC) && TRI->hasVectorRegisters(DestRC)) {
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MachineRegisterInfo::use_nodbg_iterator NextUse;
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SmallVector<FoldCandidate, 4> CopyUses;
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for (MachineRegisterInfo::use_nodbg_iterator Use = MRI->use_nodbg_begin(DestReg),
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E = MRI->use_nodbg_end();
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Use != E; Use = NextUse) {
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NextUse = std::next(Use);
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for (auto &Use : make_early_inc_range(MRI->use_nodbg_operands(DestReg))) {
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// There's no point trying to fold into an implicit operand.
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if (Use->isImplicit())
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if (Use.isImplicit())
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continue;
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FoldCandidate FC = FoldCandidate(Use->getParent(), Use.getOperandNo(),
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FoldCandidate FC = FoldCandidate(Use.getParent(), Use.getParent()->getOperandNo(&Use),
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&UseMI->getOperand(1));
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CopyUses.push_back(FC);
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}
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@ -1207,62 +1198,62 @@ void SIFoldOperands::foldInstOperand(MachineInstr &MI,
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MachineOperand *NonInlineUse = nullptr;
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int NonInlineUseOpNo = -1;
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MachineRegisterInfo::use_nodbg_iterator NextUse;
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for (MachineRegisterInfo::use_nodbg_iterator
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Use = MRI->use_nodbg_begin(Dst.getReg()), E = MRI->use_nodbg_end();
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Use != E; Use = NextUse) {
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NextUse = std::next(Use);
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MachineInstr *UseMI = Use->getParent();
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unsigned OpNo = Use.getOperandNo();
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bool Again;
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do {
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Again = false;
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for (auto &Use : make_early_inc_range(MRI->use_nodbg_operands(Dst.getReg()))) {
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MachineInstr *UseMI = Use.getParent();
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unsigned OpNo = UseMI->getOperandNo(&Use);
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// Folding the immediate may reveal operations that can be constant
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// folded or replaced with a copy. This can happen for example after
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// frame indices are lowered to constants or from splitting 64-bit
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// constants.
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//
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// We may also encounter cases where one or both operands are
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// immediates materialized into a register, which would ordinarily not
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// be folded due to multiple uses or operand constraints.
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// Folding the immediate may reveal operations that can be constant
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// folded or replaced with a copy. This can happen for example after
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// frame indices are lowered to constants or from splitting 64-bit
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// constants.
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//
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// We may also encounter cases where one or both operands are
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// immediates materialized into a register, which would ordinarily not
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// be folded due to multiple uses or operand constraints.
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if (OpToFold.isImm() && tryConstantFoldOp(*MRI, TII, UseMI, &OpToFold)) {
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LLVM_DEBUG(dbgs() << "Constant folded " << *UseMI << '\n');
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if (OpToFold.isImm() && tryConstantFoldOp(*MRI, TII, UseMI, &OpToFold)) {
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LLVM_DEBUG(dbgs() << "Constant folded " << *UseMI << '\n');
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// Some constant folding cases change the same immediate's use to a new
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// instruction, e.g. and x, 0 -> 0. Make sure we re-visit the user
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// again. The same constant folded instruction could also have a second
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// use operand.
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NextUse = MRI->use_nodbg_begin(Dst.getReg());
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FoldList.clear();
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continue;
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}
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// Some constant folding cases change the same immediate's use to a new
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// instruction, e.g. and x, 0 -> 0. Make sure we re-visit the user
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// again. The same constant folded instruction could also have a second
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// use operand.
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FoldList.clear();
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Again = true;
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break;
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}
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// Try to fold any inline immediate uses, and then only fold other
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// constants if they have one use.
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//
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// The legality of the inline immediate must be checked based on the use
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// operand, not the defining instruction, because 32-bit instructions
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// with 32-bit inline immediate sources may be used to materialize
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// constants used in 16-bit operands.
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//
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// e.g. it is unsafe to fold:
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// s_mov_b32 s0, 1.0 // materializes 0x3f800000
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// v_add_f16 v0, v1, s0 // 1.0 f16 inline immediate sees 0x00003c00
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// Try to fold any inline immediate uses, and then only fold other
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// constants if they have one use.
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//
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// The legality of the inline immediate must be checked based on the use
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// operand, not the defining instruction, because 32-bit instructions
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// with 32-bit inline immediate sources may be used to materialize
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// constants used in 16-bit operands.
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//
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// e.g. it is unsafe to fold:
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// s_mov_b32 s0, 1.0 // materializes 0x3f800000
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// v_add_f16 v0, v1, s0 // 1.0 f16 inline immediate sees 0x00003c00
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// Folding immediates with more than one use will increase program size.
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// FIXME: This will also reduce register usage, which may be better
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// in some cases. A better heuristic is needed.
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if (isInlineConstantIfFolded(TII, *UseMI, OpNo, OpToFold)) {
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foldOperand(OpToFold, UseMI, OpNo, FoldList, CopiesToReplace);
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} else if (frameIndexMayFold(TII, *UseMI, OpNo, OpToFold)) {
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foldOperand(OpToFold, UseMI, OpNo, FoldList,
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CopiesToReplace);
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} else {
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if (++NumLiteralUses == 1) {
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NonInlineUse = &*Use;
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NonInlineUseOpNo = OpNo;
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// Folding immediates with more than one use will increase program size.
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// FIXME: This will also reduce register usage, which may be better
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// in some cases. A better heuristic is needed.
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if (isInlineConstantIfFolded(TII, *UseMI, OpNo, OpToFold)) {
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foldOperand(OpToFold, UseMI, OpNo, FoldList, CopiesToReplace);
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} else if (frameIndexMayFold(TII, *UseMI, OpNo, OpToFold)) {
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foldOperand(OpToFold, UseMI, OpNo, FoldList,
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CopiesToReplace);
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} else {
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if (++NumLiteralUses == 1) {
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NonInlineUse = &Use;
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NonInlineUseOpNo = OpNo;
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}
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}
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}
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}
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} while (Again);
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if (NumLiteralUses == 1) {
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MachineInstr *UseMI = NonInlineUse->getParent();
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@ -1270,16 +1261,13 @@ void SIFoldOperands::foldInstOperand(MachineInstr &MI,
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}
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} else {
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// Folding register.
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SmallVector <MachineRegisterInfo::use_nodbg_iterator, 4> UsesToProcess;
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for (MachineRegisterInfo::use_nodbg_iterator
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Use = MRI->use_nodbg_begin(Dst.getReg()), E = MRI->use_nodbg_end();
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Use != E; ++Use) {
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UsesToProcess.push_back(Use);
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}
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SmallVector <MachineOperand *, 4> UsesToProcess;
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for (auto &Use : MRI->use_nodbg_operands(Dst.getReg()))
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UsesToProcess.push_back(&Use);
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for (auto U : UsesToProcess) {
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MachineInstr *UseMI = U->getParent();
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foldOperand(OpToFold, UseMI, U.getOperandNo(),
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foldOperand(OpToFold, UseMI, UseMI->getOperandNo(U),
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FoldList, CopiesToReplace);
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}
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}
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@ -1748,13 +1736,8 @@ bool SIFoldOperands::runOnMachineFunction(MachineFunction &MF) {
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bool HasNSZ = MFI->hasNoSignedZerosFPMath();
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for (MachineBasicBlock *MBB : depth_first(&MF)) {
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MachineBasicBlock::iterator I, Next;
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MachineOperand *CurrentKnownM0Val = nullptr;
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for (I = MBB->begin(); I != MBB->end(); I = Next) {
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Next = std::next(I);
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MachineInstr &MI = *I;
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for (auto &MI : make_early_inc_range(*MBB)) {
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tryFoldCndMask(TII, &MI);
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if (MI.isRegSequence() && tryFoldRegSequence(MI))
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