forked from OSchip/llvm-project
[X86] Stop printing moves between VR64 and GR64 with 'movd' mnemonic. Use 'movq' instead.
This behavior existed to work with an old version of the gnu assembler on MacOS that only accepted this form. Newer versions of GNU assembler and the current LLVM derived version of the assembler on MacOS support movq as well. llvm-svn: 321898
This commit is contained in:
Craig Topper
parent
577d2f2fbd
commit
004867312e
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@ -3208,10 +3208,12 @@ def : InstAlias<"mov\t{$seg, $mem|$mem, $seg}", (MOV16ms i16mem:$mem, SEGMENT_RE
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// Match 'movq <largeimm>, <reg>' as an alias for movabsq.
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def : InstAlias<"mov{q}\t{$imm, $reg|$reg, $imm}", (MOV64ri GR64:$reg, i64imm:$imm), 0>;
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// Match 'movq GR64, MMX' as an alias for movd.
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def : InstAlias<"movq\t{$src, $dst|$dst, $src}",
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// Match 'movd GR64, MMX' as an alias for movq to be compatible with gas,
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// which supports this due to an old AMD documentation bug when 64-bit mode was
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// created.
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def : InstAlias<"movd\t{$src, $dst|$dst, $src}",
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(MMX_MOVD64to64rr VR64:$dst, GR64:$src), 0>;
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def : InstAlias<"movq\t{$src, $dst|$dst, $src}",
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def : InstAlias<"movd\t{$src, $dst|$dst, $src}",
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(MMX_MOVD64from64rr GR64:$dst, VR64:$src), 0>;
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// movsx aliases
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@ -254,13 +254,13 @@ def MMX_MOVD64grr : MMXI<0x7E, MRMDestReg, (outs GR32:$dst), (ins VR64:$src),
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let isBitcast = 1 in
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def MMX_MOVD64to64rr : MMXRI<0x6E, MRMSrcReg, (outs VR64:$dst), (ins GR64:$src),
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"movd\t{$src, $dst|$dst, $src}",
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"movq\t{$src, $dst|$dst, $src}",
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[(set VR64:$dst, (bitconvert GR64:$src))],
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IIC_MMX_MOV_MM_RM>, Sched<[WriteMove]>;
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let isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0, mayLoad = 1 in
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def MMX_MOVD64to64rm : MMXRI<0x6E, MRMSrcMem, (outs VR64:$dst),
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(ins i64mem:$src), "movd\t{$src, $dst|$dst, $src}",
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(ins i64mem:$src), "movq\t{$src, $dst|$dst, $src}",
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[], IIC_MMX_MOVQ_RM>, Sched<[WriteLoad]>;
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// These are 64 bit moves, but since the OS X assembler doesn't
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@ -269,7 +269,7 @@ def MMX_MOVD64to64rm : MMXRI<0x6E, MRMSrcMem, (outs VR64:$dst),
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let SchedRW = [WriteMove], isBitcast = 1 in {
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def MMX_MOVD64from64rr : MMXRI<0x7E, MRMDestReg,
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(outs GR64:$dst), (ins VR64:$src),
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"movd\t{$src, $dst|$dst, $src}",
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"movq\t{$src, $dst|$dst, $src}",
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[(set GR64:$dst,
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(bitconvert VR64:$src))], IIC_MMX_MOV_REG_MM>;
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let hasSideEffects = 0 in
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@ -286,7 +286,7 @@ def MMX_MOVQ64rr_REV : MMXI<0x7F, MRMDestReg, (outs VR64:$dst), (ins VR64:$src),
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let isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0, mayStore = 1 in
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def MMX_MOVD64from64rm : MMXRI<0x7E, MRMDestMem,
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(outs), (ins i64mem:$dst, VR64:$src),
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"movd\t{$src, $dst|$dst, $src}",
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"movq\t{$src, $dst|$dst, $src}",
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[], IIC_MMX_MOV_REG_MM>, Sched<[WriteStore]>;
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let SchedRW = [WriteLoad] in {
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@ -1,7 +1,7 @@
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx | FileCheck %s
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; CHECK: movd %rsi, [[MM0:%mm[0-9]+]]
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; CHECK: movd %rdi, [[MM1:%mm[0-9]+]]
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; CHECK: movq %rsi, [[MM0:%mm[0-9]+]]
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; CHECK: movq %rdi, [[MM1:%mm[0-9]+]]
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; CHECK: paddusw [[MM0]], [[MM1]]
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@R = external global x86_mmx ; <x86_mmx*> [#uses=1]
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@ -16,7 +16,7 @@ define i64 @test_pavgusb(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
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; CHECK: # %bb.0:
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; CHECK-NEXT: pavgusb %mm1, %mm0 # sched: [5:1.00]
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; CHECK-NEXT: pavgusb (%rdi), %mm0 # sched: [9:1.00]
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; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: movq %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: retq # sched: [1:1.00]
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%1 = call x86_mmx @llvm.x86.3dnow.pavgusb(x86_mmx %a0, x86_mmx %a1)
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%2 = load x86_mmx, x86_mmx *%a2, align 8
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@ -31,7 +31,7 @@ define i64 @test_pf2id(x86_mmx* %a0) optsize {
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; CHECK: # %bb.0:
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; CHECK-NEXT: pf2id (%rdi), %mm0 # sched: [7:1.00]
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; CHECK-NEXT: pf2id %mm0, %mm0 # sched: [3:1.00]
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; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: movq %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: retq # sched: [1:1.00]
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%1 = load x86_mmx, x86_mmx *%a0, align 8
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%2 = call x86_mmx @llvm.x86.3dnow.pf2id(x86_mmx %1)
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@ -46,7 +46,7 @@ define i64 @test_pf2iw(x86_mmx* %a0) optsize {
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; CHECK: # %bb.0:
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; CHECK-NEXT: pf2iw (%rdi), %mm0 # sched: [7:1.00]
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; CHECK-NEXT: pf2iw %mm0, %mm0 # sched: [3:1.00]
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; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: movq %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: retq # sched: [1:1.00]
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%1 = load x86_mmx, x86_mmx *%a0, align 8
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%2 = call x86_mmx @llvm.x86.3dnowa.pf2iw(x86_mmx %1)
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@ -61,7 +61,7 @@ define i64 @test_pfacc(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
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; CHECK: # %bb.0:
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; CHECK-NEXT: pfacc %mm1, %mm0 # sched: [3:1.00]
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; CHECK-NEXT: pfacc (%rdi), %mm0 # sched: [7:1.00]
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; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: movq %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: retq # sched: [1:1.00]
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%1 = call x86_mmx @llvm.x86.3dnow.pfacc(x86_mmx %a0, x86_mmx %a1)
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%2 = load x86_mmx, x86_mmx *%a2, align 8
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@ -76,7 +76,7 @@ define i64 @test_pfadd(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
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; CHECK: # %bb.0:
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; CHECK-NEXT: pfadd %mm1, %mm0 # sched: [3:1.00]
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; CHECK-NEXT: pfadd (%rdi), %mm0 # sched: [7:1.00]
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; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: movq %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: retq # sched: [1:1.00]
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%1 = call x86_mmx @llvm.x86.3dnow.pfadd(x86_mmx %a0, x86_mmx %a1)
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%2 = load x86_mmx, x86_mmx *%a2, align 8
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@ -91,7 +91,7 @@ define i64 @test_pfcmpeq(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
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; CHECK: # %bb.0:
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; CHECK-NEXT: pfcmpeq %mm1, %mm0 # sched: [3:1.00]
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; CHECK-NEXT: pfcmpeq (%rdi), %mm0 # sched: [7:1.00]
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; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: movq %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: retq # sched: [1:1.00]
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%1 = call x86_mmx @llvm.x86.3dnow.pfcmpeq(x86_mmx %a0, x86_mmx %a1)
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%2 = load x86_mmx, x86_mmx *%a2, align 8
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@ -106,7 +106,7 @@ define i64 @test_pfcmpge(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
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; CHECK: # %bb.0:
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; CHECK-NEXT: pfcmpge %mm1, %mm0 # sched: [3:1.00]
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; CHECK-NEXT: pfcmpge (%rdi), %mm0 # sched: [7:1.00]
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; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: movq %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: retq # sched: [1:1.00]
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%1 = call x86_mmx @llvm.x86.3dnow.pfcmpge(x86_mmx %a0, x86_mmx %a1)
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%2 = load x86_mmx, x86_mmx *%a2, align 8
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@ -121,7 +121,7 @@ define i64 @test_pfcmpgt(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
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; CHECK: # %bb.0:
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; CHECK-NEXT: pfcmpgt %mm1, %mm0 # sched: [3:1.00]
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; CHECK-NEXT: pfcmpgt (%rdi), %mm0 # sched: [7:1.00]
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; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: movq %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: retq # sched: [1:1.00]
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%1 = call x86_mmx @llvm.x86.3dnow.pfcmpgt(x86_mmx %a0, x86_mmx %a1)
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%2 = load x86_mmx, x86_mmx *%a2, align 8
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@ -136,7 +136,7 @@ define i64 @test_pfmax(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
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; CHECK: # %bb.0:
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; CHECK-NEXT: pfmax %mm1, %mm0 # sched: [3:1.00]
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; CHECK-NEXT: pfmax (%rdi), %mm0 # sched: [7:1.00]
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; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: movq %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: retq # sched: [1:1.00]
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%1 = call x86_mmx @llvm.x86.3dnow.pfmax(x86_mmx %a0, x86_mmx %a1)
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%2 = load x86_mmx, x86_mmx *%a2, align 8
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@ -151,7 +151,7 @@ define i64 @test_pfmin(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
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; CHECK: # %bb.0:
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; CHECK-NEXT: pfmin %mm1, %mm0 # sched: [3:1.00]
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; CHECK-NEXT: pfmin (%rdi), %mm0 # sched: [7:1.00]
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; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: movq %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: retq # sched: [1:1.00]
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%1 = call x86_mmx @llvm.x86.3dnow.pfmin(x86_mmx %a0, x86_mmx %a1)
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%2 = load x86_mmx, x86_mmx *%a2, align 8
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@ -166,7 +166,7 @@ define i64 @test_pfmul(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
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; CHECK: # %bb.0:
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; CHECK-NEXT: pfmul %mm1, %mm0 # sched: [3:1.00]
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; CHECK-NEXT: pfmul (%rdi), %mm0 # sched: [7:1.00]
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; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: movq %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: retq # sched: [1:1.00]
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%1 = call x86_mmx @llvm.x86.3dnow.pfmul(x86_mmx %a0, x86_mmx %a1)
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%2 = load x86_mmx, x86_mmx *%a2, align 8
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@ -181,7 +181,7 @@ define i64 @test_pfnacc(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
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; CHECK: # %bb.0:
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; CHECK-NEXT: pfnacc %mm1, %mm0 # sched: [3:1.00]
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; CHECK-NEXT: pfnacc (%rdi), %mm0 # sched: [7:1.00]
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; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: movq %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: retq # sched: [1:1.00]
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%1 = call x86_mmx @llvm.x86.3dnowa.pfnacc(x86_mmx %a0, x86_mmx %a1)
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%2 = load x86_mmx, x86_mmx *%a2, align 8
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@ -196,7 +196,7 @@ define i64 @test_pfpnacc(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
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; CHECK: # %bb.0:
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; CHECK-NEXT: pfpnacc %mm1, %mm0 # sched: [3:1.00]
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; CHECK-NEXT: pfpnacc (%rdi), %mm0 # sched: [7:1.00]
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; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: movq %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: retq # sched: [1:1.00]
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%1 = call x86_mmx @llvm.x86.3dnowa.pfpnacc(x86_mmx %a0, x86_mmx %a1)
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%2 = load x86_mmx, x86_mmx *%a2, align 8
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@ -211,7 +211,7 @@ define i64 @test_pfrcp(x86_mmx* %a0) optsize {
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; CHECK: # %bb.0:
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; CHECK-NEXT: pfrcp (%rdi), %mm0 # sched: [7:1.00]
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; CHECK-NEXT: pfrcp %mm0, %mm0 # sched: [3:1.00]
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; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: movq %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: retq # sched: [1:1.00]
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%1 = load x86_mmx, x86_mmx *%a0, align 8
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%2 = call x86_mmx @llvm.x86.3dnow.pfrcp(x86_mmx %1)
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@ -226,7 +226,7 @@ define i64 @test_pfrcpit1(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
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; CHECK: # %bb.0:
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; CHECK-NEXT: pfrcpit1 %mm1, %mm0 # sched: [3:1.00]
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; CHECK-NEXT: pfrcpit1 (%rdi), %mm0 # sched: [7:1.00]
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; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: movq %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: retq # sched: [1:1.00]
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%1 = call x86_mmx @llvm.x86.3dnow.pfrcpit1(x86_mmx %a0, x86_mmx %a1)
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%2 = load x86_mmx, x86_mmx *%a2, align 8
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@ -241,7 +241,7 @@ define i64 @test_pfrcpit2(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
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; CHECK: # %bb.0:
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; CHECK-NEXT: pfrcpit2 %mm1, %mm0 # sched: [3:1.00]
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; CHECK-NEXT: pfrcpit2 (%rdi), %mm0 # sched: [7:1.00]
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; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: movq %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: retq # sched: [1:1.00]
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%1 = call x86_mmx @llvm.x86.3dnow.pfrcpit2(x86_mmx %a0, x86_mmx %a1)
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%2 = load x86_mmx, x86_mmx *%a2, align 8
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@ -256,7 +256,7 @@ define i64 @test_pfrsqit1(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
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; CHECK: # %bb.0:
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; CHECK-NEXT: pfrsqit1 %mm1, %mm0 # sched: [3:1.00]
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; CHECK-NEXT: pfrsqit1 (%rdi), %mm0 # sched: [7:1.00]
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; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: movq %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: retq # sched: [1:1.00]
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%1 = call x86_mmx @llvm.x86.3dnow.pfrsqit1(x86_mmx %a0, x86_mmx %a1)
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%2 = load x86_mmx, x86_mmx *%a2, align 8
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@ -271,7 +271,7 @@ define i64 @test_pfrsqrt(x86_mmx* %a0) optsize {
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; CHECK: # %bb.0:
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; CHECK-NEXT: pfrsqrt (%rdi), %mm0 # sched: [7:1.00]
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; CHECK-NEXT: pfrsqrt %mm0, %mm0 # sched: [3:1.00]
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; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: movq %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: retq # sched: [1:1.00]
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%1 = load x86_mmx, x86_mmx *%a0, align 8
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%2 = call x86_mmx @llvm.x86.3dnow.pfrsqrt(x86_mmx %1)
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@ -286,7 +286,7 @@ define i64 @test_pfsub(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
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; CHECK: # %bb.0:
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; CHECK-NEXT: pfsub %mm1, %mm0 # sched: [3:1.00]
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; CHECK-NEXT: pfsub (%rdi), %mm0 # sched: [7:1.00]
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; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: movq %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: retq # sched: [1:1.00]
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%1 = call x86_mmx @llvm.x86.3dnow.pfsub(x86_mmx %a0, x86_mmx %a1)
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%2 = load x86_mmx, x86_mmx *%a2, align 8
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@ -301,7 +301,7 @@ define i64 @test_pfsubr(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
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; CHECK: # %bb.0:
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; CHECK-NEXT: pfsubr %mm1, %mm0 # sched: [3:1.00]
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; CHECK-NEXT: pfsubr (%rdi), %mm0 # sched: [7:1.00]
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; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: movq %mm0, %rax # sched: [1:0.33]
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; CHECK-NEXT: retq # sched: [1:1.00]
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%1 = call x86_mmx @llvm.x86.3dnow.pfsubr(x86_mmx %a0, x86_mmx %a1)
|
||||
%2 = load x86_mmx, x86_mmx *%a2, align 8
|
||||
|
|
@ -316,7 +316,7 @@ define i64 @test_pi2fd(x86_mmx* %a0) optsize {
|
|||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: pi2fd (%rdi), %mm0 # sched: [8:1.00]
|
||||
; CHECK-NEXT: pi2fd %mm0, %mm0 # sched: [4:1.00]
|
||||
; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
|
||||
; CHECK-NEXT: movq %mm0, %rax # sched: [1:0.33]
|
||||
; CHECK-NEXT: retq # sched: [1:1.00]
|
||||
%1 = load x86_mmx, x86_mmx *%a0, align 8
|
||||
%2 = call x86_mmx @llvm.x86.3dnow.pi2fd(x86_mmx %1)
|
||||
|
|
@ -331,7 +331,7 @@ define i64 @test_pi2fw(x86_mmx* %a0) optsize {
|
|||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: pi2fw (%rdi), %mm0 # sched: [8:1.00]
|
||||
; CHECK-NEXT: pi2fw %mm0, %mm0 # sched: [4:1.00]
|
||||
; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
|
||||
; CHECK-NEXT: movq %mm0, %rax # sched: [1:0.33]
|
||||
; CHECK-NEXT: retq # sched: [1:1.00]
|
||||
%1 = load x86_mmx, x86_mmx *%a0, align 8
|
||||
%2 = call x86_mmx @llvm.x86.3dnowa.pi2fw(x86_mmx %1)
|
||||
|
|
@ -346,7 +346,7 @@ define i64 @test_pmulhrw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
|
|||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: pmulhrw %mm1, %mm0 # sched: [5:1.00]
|
||||
; CHECK-NEXT: pmulhrw (%rdi), %mm0 # sched: [9:1.00]
|
||||
; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
|
||||
; CHECK-NEXT: movq %mm0, %rax # sched: [1:0.33]
|
||||
; CHECK-NEXT: retq # sched: [1:1.00]
|
||||
%1 = call x86_mmx @llvm.x86.3dnow.pmulhrw(x86_mmx %a0, x86_mmx %a1)
|
||||
%2 = load x86_mmx, x86_mmx *%a2, align 8
|
||||
|
|
@ -383,7 +383,7 @@ define i64 @test_pswapd(x86_mmx* %a0) optsize {
|
|||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: pswapd (%rdi), %mm0 # mm0 = mem[1,0] sched: [5:1.00]
|
||||
; CHECK-NEXT: pswapd %mm0, %mm0 # mm0 = mm0[1,0] sched: [1:1.00]
|
||||
; CHECK-NEXT: movd %mm0, %rax # sched: [1:0.33]
|
||||
; CHECK-NEXT: movq %mm0, %rax # sched: [1:0.33]
|
||||
; CHECK-NEXT: retq # sched: [1:1.00]
|
||||
%1 = load x86_mmx, x86_mmx *%a0, align 8
|
||||
%2 = call x86_mmx @llvm.x86.3dnowa.pswapd(x86_mmx %1)
|
||||
|
|
|
|||
|
|
@ -11,7 +11,7 @@ define i32 @t0(i64 %x) nounwind {
|
|||
;
|
||||
; X64-LABEL: t0:
|
||||
; X64: # %bb.0: # %entry
|
||||
; X64-NEXT: movd %rdi, %mm0
|
||||
; X64-NEXT: movq %rdi, %mm0
|
||||
; X64-NEXT: pshufw $238, %mm0, %mm0 # mm0 = mm0[2,3,2,3]
|
||||
; X64-NEXT: movd %mm0, %eax
|
||||
; X64-NEXT: retq
|
||||
|
|
@ -47,9 +47,9 @@ define i64 @t1(i64 %x, i32 %n) nounwind {
|
|||
; X64-LABEL: t1:
|
||||
; X64: # %bb.0: # %entry
|
||||
; X64-NEXT: movd %esi, %mm0
|
||||
; X64-NEXT: movd %rdi, %mm1
|
||||
; X64-NEXT: movq %rdi, %mm1
|
||||
; X64-NEXT: psllq %mm0, %mm1
|
||||
; X64-NEXT: movd %mm1, %rax
|
||||
; X64-NEXT: movq %mm1, %rax
|
||||
; X64-NEXT: retq
|
||||
entry:
|
||||
%0 = bitcast i64 %x to x86_mmx
|
||||
|
|
@ -81,9 +81,9 @@ define i64 @t2(i64 %x, i32 %n, i32 %w) nounwind {
|
|||
; X64-NEXT: movd %esi, %mm0
|
||||
; X64-NEXT: movd %edx, %mm1
|
||||
; X64-NEXT: psllq %mm0, %mm1
|
||||
; X64-NEXT: movd %rdi, %mm0
|
||||
; X64-NEXT: movq %rdi, %mm0
|
||||
; X64-NEXT: por %mm1, %mm0
|
||||
; X64-NEXT: movd %mm0, %rax
|
||||
; X64-NEXT: movq %mm0, %rax
|
||||
; X64-NEXT: retq
|
||||
entry:
|
||||
%0 = insertelement <2 x i32> undef, i32 %w, i32 0
|
||||
|
|
@ -120,7 +120,7 @@ define i64 @t3(<1 x i64>* %y, i32* %n) nounwind {
|
|||
; X64-NEXT: movq (%rdi), %mm0
|
||||
; X64-NEXT: movd (%rsi), %mm1
|
||||
; X64-NEXT: psllq %mm1, %mm0
|
||||
; X64-NEXT: movd %mm0, %rax
|
||||
; X64-NEXT: movq %mm0, %rax
|
||||
; X64-NEXT: retq
|
||||
entry:
|
||||
%0 = bitcast <1 x i64>* %y to x86_mmx*
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@ define i64 @t0(x86_mmx* %p) {
|
|||
; CHECK: ## %bb.0:
|
||||
; CHECK-NEXT: movq (%rdi), %mm0
|
||||
; CHECK-NEXT: paddq %mm0, %mm0
|
||||
; CHECK-NEXT: movd %mm0, %rax
|
||||
; CHECK-NEXT: movq %mm0, %rax
|
||||
; CHECK-NEXT: retq
|
||||
%t = load x86_mmx, x86_mmx* %p
|
||||
%u = tail call x86_mmx @llvm.x86.mmx.padd.q(x86_mmx %t, x86_mmx %t)
|
||||
|
|
@ -19,7 +19,7 @@ define i64 @t1(x86_mmx* %p) {
|
|||
; CHECK: ## %bb.0:
|
||||
; CHECK-NEXT: movq (%rdi), %mm0
|
||||
; CHECK-NEXT: paddd %mm0, %mm0
|
||||
; CHECK-NEXT: movd %mm0, %rax
|
||||
; CHECK-NEXT: movq %mm0, %rax
|
||||
; CHECK-NEXT: retq
|
||||
%t = load x86_mmx, x86_mmx* %p
|
||||
%u = tail call x86_mmx @llvm.x86.mmx.padd.d(x86_mmx %t, x86_mmx %t)
|
||||
|
|
@ -32,7 +32,7 @@ define i64 @t2(x86_mmx* %p) {
|
|||
; CHECK: ## %bb.0:
|
||||
; CHECK-NEXT: movq (%rdi), %mm0
|
||||
; CHECK-NEXT: paddw %mm0, %mm0
|
||||
; CHECK-NEXT: movd %mm0, %rax
|
||||
; CHECK-NEXT: movq %mm0, %rax
|
||||
; CHECK-NEXT: retq
|
||||
%t = load x86_mmx, x86_mmx* %p
|
||||
%u = tail call x86_mmx @llvm.x86.mmx.padd.w(x86_mmx %t, x86_mmx %t)
|
||||
|
|
@ -45,7 +45,7 @@ define i64 @t3(x86_mmx* %p) {
|
|||
; CHECK: ## %bb.0:
|
||||
; CHECK-NEXT: movq (%rdi), %mm0
|
||||
; CHECK-NEXT: paddb %mm0, %mm0
|
||||
; CHECK-NEXT: movd %mm0, %rax
|
||||
; CHECK-NEXT: movq %mm0, %rax
|
||||
; CHECK-NEXT: retq
|
||||
%t = load x86_mmx, x86_mmx* %p
|
||||
%u = tail call x86_mmx @llvm.x86.mmx.padd.b(x86_mmx %t, x86_mmx %t)
|
||||
|
|
@ -58,8 +58,8 @@ define i64 @t3(x86_mmx* %p) {
|
|||
define void @t4(<1 x i64> %A, <1 x i64> %B) {
|
||||
; CHECK-LABEL: t4:
|
||||
; CHECK: ## %bb.0: ## %entry
|
||||
; CHECK-NEXT: movd %rdi, %mm0
|
||||
; CHECK-NEXT: movd %rsi, %mm1
|
||||
; CHECK-NEXT: movq %rdi, %mm0
|
||||
; CHECK-NEXT: movq %rsi, %mm1
|
||||
; CHECK-NEXT: paddusw %mm0, %mm1
|
||||
; CHECK-NEXT: movq _R@{{.*}}(%rip), %rax
|
||||
; CHECK-NEXT: movq %mm1, (%rax)
|
||||
|
|
@ -93,9 +93,9 @@ declare x86_mmx @llvm.x86.mmx.pslli.q(x86_mmx, i32)
|
|||
define <1 x i64> @t6(i64 %t) {
|
||||
; CHECK-LABEL: t6:
|
||||
; CHECK: ## %bb.0:
|
||||
; CHECK-NEXT: movd %rdi, %mm0
|
||||
; CHECK-NEXT: movq %rdi, %mm0
|
||||
; CHECK-NEXT: psllq $48, %mm0
|
||||
; CHECK-NEXT: movd %mm0, %rax
|
||||
; CHECK-NEXT: movq %mm0, %rax
|
||||
; CHECK-NEXT: retq
|
||||
%t1 = insertelement <1 x i64> undef, i64 %t, i32 0
|
||||
%t0 = bitcast <1 x i64> %t1 to x86_mmx
|
||||
|
|
|
|||
|
|
@ -346,7 +346,7 @@ define <4 x float> @cvt_v2i32_v2f32(<1 x i64>*) nounwind {
|
|||
; X64: # %bb.0:
|
||||
; X64-NEXT: movq (%rdi), %mm0
|
||||
; X64-NEXT: paddd %mm0, %mm0
|
||||
; X64-NEXT: movd %mm0, %rax
|
||||
; X64-NEXT: movq %mm0, %rax
|
||||
; X64-NEXT: movq %rax, %xmm0
|
||||
; X64-NEXT: cvtdq2ps %xmm0, %xmm0
|
||||
; X64-NEXT: retq
|
||||
|
|
|
|||
|
|
@ -26,7 +26,7 @@ define i64 @t0(<1 x i64>* %a, i32* %b) nounwind {
|
|||
; X64-NEXT: movq (%rdi), %mm0
|
||||
; X64-NEXT: movd (%rsi), %mm1
|
||||
; X64-NEXT: psllq %mm1, %mm0
|
||||
; X64-NEXT: movd %mm0, %rax
|
||||
; X64-NEXT: movq %mm0, %rax
|
||||
; X64-NEXT: retq
|
||||
entry:
|
||||
%0 = bitcast <1 x i64>* %a to x86_mmx*
|
||||
|
|
@ -62,7 +62,7 @@ define i64 @t1(<1 x i64>* %a, i32* %b) nounwind {
|
|||
; X64-NEXT: movq (%rdi), %mm0
|
||||
; X64-NEXT: movd (%rsi), %mm1
|
||||
; X64-NEXT: psrlq %mm1, %mm0
|
||||
; X64-NEXT: movd %mm0, %rax
|
||||
; X64-NEXT: movq %mm0, %rax
|
||||
; X64-NEXT: retq
|
||||
entry:
|
||||
%0 = bitcast <1 x i64>* %a to x86_mmx*
|
||||
|
|
@ -98,7 +98,7 @@ define i64 @t2(<1 x i64>* %a, i32* %b) nounwind {
|
|||
; X64-NEXT: movq (%rdi), %mm0
|
||||
; X64-NEXT: movd (%rsi), %mm1
|
||||
; X64-NEXT: psllw %mm1, %mm0
|
||||
; X64-NEXT: movd %mm0, %rax
|
||||
; X64-NEXT: movq %mm0, %rax
|
||||
; X64-NEXT: retq
|
||||
entry:
|
||||
%0 = bitcast <1 x i64>* %a to x86_mmx*
|
||||
|
|
@ -134,7 +134,7 @@ define i64 @t3(<1 x i64>* %a, i32* %b) nounwind {
|
|||
; X64-NEXT: movq (%rdi), %mm0
|
||||
; X64-NEXT: movd (%rsi), %mm1
|
||||
; X64-NEXT: psrlw %mm1, %mm0
|
||||
; X64-NEXT: movd %mm0, %rax
|
||||
; X64-NEXT: movq %mm0, %rax
|
||||
; X64-NEXT: retq
|
||||
entry:
|
||||
%0 = bitcast <1 x i64>* %a to x86_mmx*
|
||||
|
|
@ -170,7 +170,7 @@ define i64 @t4(<1 x i64>* %a, i32* %b) nounwind {
|
|||
; X64-NEXT: movq (%rdi), %mm0
|
||||
; X64-NEXT: movd (%rsi), %mm1
|
||||
; X64-NEXT: pslld %mm1, %mm0
|
||||
; X64-NEXT: movd %mm0, %rax
|
||||
; X64-NEXT: movq %mm0, %rax
|
||||
; X64-NEXT: retq
|
||||
entry:
|
||||
%0 = bitcast <1 x i64>* %a to x86_mmx*
|
||||
|
|
@ -206,7 +206,7 @@ define i64 @t5(<1 x i64>* %a, i32* %b) nounwind {
|
|||
; X64-NEXT: movq (%rdi), %mm0
|
||||
; X64-NEXT: movd (%rsi), %mm1
|
||||
; X64-NEXT: psrld %mm1, %mm0
|
||||
; X64-NEXT: movd %mm0, %rax
|
||||
; X64-NEXT: movq %mm0, %rax
|
||||
; X64-NEXT: retq
|
||||
entry:
|
||||
%0 = bitcast <1 x i64>* %a to x86_mmx*
|
||||
|
|
@ -242,7 +242,7 @@ define i64 @t6(<1 x i64>* %a, i32* %b) nounwind {
|
|||
; X64-NEXT: movq (%rdi), %mm0
|
||||
; X64-NEXT: movd (%rsi), %mm1
|
||||
; X64-NEXT: psraw %mm1, %mm0
|
||||
; X64-NEXT: movd %mm0, %rax
|
||||
; X64-NEXT: movq %mm0, %rax
|
||||
; X64-NEXT: retq
|
||||
entry:
|
||||
%0 = bitcast <1 x i64>* %a to x86_mmx*
|
||||
|
|
@ -278,7 +278,7 @@ define i64 @t7(<1 x i64>* %a, i32* %b) nounwind {
|
|||
; X64-NEXT: movq (%rdi), %mm0
|
||||
; X64-NEXT: movd (%rsi), %mm1
|
||||
; X64-NEXT: psrad %mm1, %mm0
|
||||
; X64-NEXT: movd %mm0, %rax
|
||||
; X64-NEXT: movq %mm0, %rax
|
||||
; X64-NEXT: retq
|
||||
entry:
|
||||
%0 = bitcast <1 x i64>* %a to x86_mmx*
|
||||
|
|
@ -310,7 +310,7 @@ define i64 @tt0(x86_mmx %t, x86_mmx* %q) nounwind {
|
|||
; X64-LABEL: tt0:
|
||||
; X64: # %bb.0: # %entry
|
||||
; X64-NEXT: paddb (%rdi), %mm0
|
||||
; X64-NEXT: movd %mm0, %rax
|
||||
; X64-NEXT: movq %mm0, %rax
|
||||
; X64-NEXT: emms
|
||||
; X64-NEXT: retq
|
||||
entry:
|
||||
|
|
@ -343,7 +343,7 @@ define i64 @tt1(x86_mmx %t, x86_mmx* %q) nounwind {
|
|||
; X64-LABEL: tt1:
|
||||
; X64: # %bb.0: # %entry
|
||||
; X64-NEXT: paddw (%rdi), %mm0
|
||||
; X64-NEXT: movd %mm0, %rax
|
||||
; X64-NEXT: movq %mm0, %rax
|
||||
; X64-NEXT: emms
|
||||
; X64-NEXT: retq
|
||||
entry:
|
||||
|
|
@ -375,7 +375,7 @@ define i64 @tt2(x86_mmx %t, x86_mmx* %q) nounwind {
|
|||
; X64-LABEL: tt2:
|
||||
; X64: # %bb.0: # %entry
|
||||
; X64-NEXT: paddd (%rdi), %mm0
|
||||
; X64-NEXT: movd %mm0, %rax
|
||||
; X64-NEXT: movq %mm0, %rax
|
||||
; X64-NEXT: emms
|
||||
; X64-NEXT: retq
|
||||
entry:
|
||||
|
|
@ -407,7 +407,7 @@ define i64 @tt3(x86_mmx %t, x86_mmx* %q) nounwind {
|
|||
; X64-LABEL: tt3:
|
||||
; X64: # %bb.0: # %entry
|
||||
; X64-NEXT: paddq (%rdi), %mm0
|
||||
; X64-NEXT: movd %mm0, %rax
|
||||
; X64-NEXT: movq %mm0, %rax
|
||||
; X64-NEXT: emms
|
||||
; X64-NEXT: retq
|
||||
entry:
|
||||
|
|
@ -439,7 +439,7 @@ define i64 @tt4(x86_mmx %t, x86_mmx* %q) nounwind {
|
|||
; X64-LABEL: tt4:
|
||||
; X64: # %bb.0: # %entry
|
||||
; X64-NEXT: paddusb (%rdi), %mm0
|
||||
; X64-NEXT: movd %mm0, %rax
|
||||
; X64-NEXT: movq %mm0, %rax
|
||||
; X64-NEXT: emms
|
||||
; X64-NEXT: retq
|
||||
entry:
|
||||
|
|
@ -471,7 +471,7 @@ define i64 @tt5(x86_mmx %t, x86_mmx* %q) nounwind {
|
|||
; X64-LABEL: tt5:
|
||||
; X64: # %bb.0: # %entry
|
||||
; X64-NEXT: paddusw (%rdi), %mm0
|
||||
; X64-NEXT: movd %mm0, %rax
|
||||
; X64-NEXT: movq %mm0, %rax
|
||||
; X64-NEXT: emms
|
||||
; X64-NEXT: retq
|
||||
entry:
|
||||
|
|
@ -503,7 +503,7 @@ define i64 @tt6(x86_mmx %t, x86_mmx* %q) nounwind {
|
|||
; X64-LABEL: tt6:
|
||||
; X64: # %bb.0: # %entry
|
||||
; X64-NEXT: psrlw (%rdi), %mm0
|
||||
; X64-NEXT: movd %mm0, %rax
|
||||
; X64-NEXT: movq %mm0, %rax
|
||||
; X64-NEXT: emms
|
||||
; X64-NEXT: retq
|
||||
entry:
|
||||
|
|
@ -535,7 +535,7 @@ define i64 @tt7(x86_mmx %t, x86_mmx* %q) nounwind {
|
|||
; X64-LABEL: tt7:
|
||||
; X64: # %bb.0: # %entry
|
||||
; X64-NEXT: psrld (%rdi), %mm0
|
||||
; X64-NEXT: movd %mm0, %rax
|
||||
; X64-NEXT: movq %mm0, %rax
|
||||
; X64-NEXT: emms
|
||||
; X64-NEXT: retq
|
||||
entry:
|
||||
|
|
@ -567,7 +567,7 @@ define i64 @tt8(x86_mmx %t, x86_mmx* %q) nounwind {
|
|||
; X64-LABEL: tt8:
|
||||
; X64: # %bb.0: # %entry
|
||||
; X64-NEXT: psrlq (%rdi), %mm0
|
||||
; X64-NEXT: movd %mm0, %rax
|
||||
; X64-NEXT: movq %mm0, %rax
|
||||
; X64-NEXT: emms
|
||||
; X64-NEXT: retq
|
||||
entry:
|
||||
|
|
@ -603,7 +603,7 @@ define void @test_psrlq_by_volatile_shift_amount(x86_mmx* %t) nounwind {
|
|||
; X64-NEXT: movl $1, -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: movd -{{[0-9]+}}(%rsp), %mm0
|
||||
; X64-NEXT: movl $255, %eax
|
||||
; X64-NEXT: movd %rax, %mm1
|
||||
; X64-NEXT: movq %rax, %mm1
|
||||
; X64-NEXT: psrlq %mm0, %mm1
|
||||
; X64-NEXT: movq %mm1, (%rdi)
|
||||
; X64-NEXT: retq
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -18,9 +18,9 @@ define i64 @test47(i64 %arg) {
|
|||
; X64-NEXT: testq %rdi, %rdi
|
||||
; X64-NEXT: movl $7, %ecx
|
||||
; X64-NEXT: cmoveq %rcx, %rax
|
||||
; X64-NEXT: movd %rax, %mm0
|
||||
; X64-NEXT: movq %rax, %mm0
|
||||
; X64-NEXT: psllw %mm0, %mm0
|
||||
; X64-NEXT: movd %mm0, %rax
|
||||
; X64-NEXT: movq %mm0, %rax
|
||||
; X64-NEXT: retq
|
||||
;
|
||||
; I32-LABEL: test47:
|
||||
|
|
@ -70,9 +70,9 @@ define i64 @test49(i64 %arg, i64 %x, i64 %y) {
|
|||
; X64: # %bb.0:
|
||||
; X64-NEXT: testq %rdi, %rdi
|
||||
; X64-NEXT: cmovneq %rdx, %rsi
|
||||
; X64-NEXT: movd %rsi, %mm0
|
||||
; X64-NEXT: movq %rsi, %mm0
|
||||
; X64-NEXT: psllw %mm0, %mm0
|
||||
; X64-NEXT: movd %mm0, %rax
|
||||
; X64-NEXT: movq %mm0, %rax
|
||||
; X64-NEXT: retq
|
||||
;
|
||||
; I32-LABEL: test49:
|
||||
|
|
|
|||
|
|
@ -30,8 +30,8 @@ entry:
|
|||
; CHECK: callq getFirstParam
|
||||
; CHECK: movq %rax, [[TEMP:%[a-z0-9]+]]
|
||||
; CHECK: callq getSecondParam
|
||||
; CHECK: movd [[TEMP]], [[PARAM1:%[a-z0-9]+]]
|
||||
; CHECK: movd %rax, [[PARAM2:%[a-z0-9]+]]
|
||||
; CHECK: movq [[TEMP]], [[PARAM1:%[a-z0-9]+]]
|
||||
; CHECK: movq %rax, [[PARAM2:%[a-z0-9]+]]
|
||||
; CHECK: psubb [[PARAM2]], [[PARAM1]]
|
||||
; CHECK: ret
|
||||
|
||||
|
|
@ -58,8 +58,8 @@ entry:
|
|||
; CHECK: callq getFirstParam
|
||||
; CHECK: movq %rax, [[TEMP:%[a-z0-9]+]]
|
||||
; CHECK: callq getSecondParam
|
||||
; CHECK: movd [[TEMP]], [[PARAM1:%[a-z0-9]+]]
|
||||
; CHECK: movd %rax, [[PARAM2:%[a-z0-9]+]]
|
||||
; CHECK: movq [[TEMP]], [[PARAM1:%[a-z0-9]+]]
|
||||
; CHECK: movq %rax, [[PARAM2:%[a-z0-9]+]]
|
||||
; CHECK: psubw [[PARAM2]], [[PARAM1]]
|
||||
; CHECK: ret
|
||||
|
||||
|
|
@ -87,8 +87,8 @@ entry:
|
|||
; CHECK: callq getFirstParam
|
||||
; CHECK: movq %rax, [[TEMP:%[a-z0-9]+]]
|
||||
; CHECK: callq getSecondParam
|
||||
; CHECK: movd [[TEMP]], [[PARAM1:%[a-z0-9]+]]
|
||||
; CHECK: movd %rax, [[PARAM2:%[a-z0-9]+]]
|
||||
; CHECK: movq [[TEMP]], [[PARAM1:%[a-z0-9]+]]
|
||||
; CHECK: movq %rax, [[PARAM2:%[a-z0-9]+]]
|
||||
; CHECK: psubd [[PARAM2]], [[PARAM1]]
|
||||
; CHECK: ret
|
||||
|
||||
|
|
@ -115,8 +115,8 @@ entry:
|
|||
; CHECK: callq getFirstParam
|
||||
; CHECK: movq %rax, [[TEMP:%[a-z0-9]+]]
|
||||
; CHECK: callq getSecondParam
|
||||
; CHECK: movd [[TEMP]], [[PARAM1:%[a-z0-9]+]]
|
||||
; CHECK: movd %rax, [[PARAM2:%[a-z0-9]+]]
|
||||
; CHECK: movq [[TEMP]], [[PARAM1:%[a-z0-9]+]]
|
||||
; CHECK: movq %rax, [[PARAM2:%[a-z0-9]+]]
|
||||
; CHECK: psubsb [[PARAM2]], [[PARAM1]]
|
||||
; CHECK: ret
|
||||
|
||||
|
|
@ -143,8 +143,8 @@ entry:
|
|||
; CHECK: callq getFirstParam
|
||||
; CHECK: movq %rax, [[TEMP:%[a-z0-9]+]]
|
||||
; CHECK: callq getSecondParam
|
||||
; CHECK: movd [[TEMP]], [[PARAM1:%[a-z0-9]+]]
|
||||
; CHECK: movd %rax, [[PARAM2:%[a-z0-9]+]]
|
||||
; CHECK: movq [[TEMP]], [[PARAM1:%[a-z0-9]+]]
|
||||
; CHECK: movq %rax, [[PARAM2:%[a-z0-9]+]]
|
||||
; CHECK: psubsw [[PARAM2]], [[PARAM1]]
|
||||
; CHECK: ret
|
||||
|
||||
|
|
@ -171,8 +171,8 @@ entry:
|
|||
; CHECK: callq getFirstParam
|
||||
; CHECK: movq %rax, [[TEMP:%[a-z0-9]+]]
|
||||
; CHECK: callq getSecondParam
|
||||
; CHECK: movd [[TEMP]], [[PARAM1:%[a-z0-9]+]]
|
||||
; CHECK: movd %rax, [[PARAM2:%[a-z0-9]+]]
|
||||
; CHECK: movq [[TEMP]], [[PARAM1:%[a-z0-9]+]]
|
||||
; CHECK: movq %rax, [[PARAM2:%[a-z0-9]+]]
|
||||
; CHECK: psubusb [[PARAM2]], [[PARAM1]]
|
||||
; CHECK: ret
|
||||
|
||||
|
|
@ -199,8 +199,8 @@ entry:
|
|||
; CHECK: callq getFirstParam
|
||||
; CHECK: movq %rax, [[TEMP:%[a-z0-9]+]]
|
||||
; CHECK: callq getSecondParam
|
||||
; CHECK: movd [[TEMP]], [[PARAM1:%[a-z0-9]+]]
|
||||
; CHECK: movd %rax, [[PARAM2:%[a-z0-9]+]]
|
||||
; CHECK: movq [[TEMP]], [[PARAM1:%[a-z0-9]+]]
|
||||
; CHECK: movq %rax, [[PARAM2:%[a-z0-9]+]]
|
||||
; CHECK: psubusw [[PARAM2]], [[PARAM1]]
|
||||
; CHECK: ret
|
||||
|
||||
|
|
|
|||
|
|
@ -236,16 +236,16 @@
|
|||
# CHECK: vmovq %xmm0, %rax
|
||||
0xc4 0xe1 0xf9 0x7e 0xc0
|
||||
|
||||
# CHECK: movd (%rax), %mm0
|
||||
# CHECK: movq (%rax), %mm0
|
||||
0x48 0x0f 0x6e 0x00
|
||||
|
||||
# CHECK: movd %rax, %mm0
|
||||
# CHECK: movq %rax, %mm0
|
||||
0x48 0x0f 0x6e 0xc0
|
||||
|
||||
# CHECK: movd %mm0, (%rax)
|
||||
# CHECK: movq %mm0, (%rax)
|
||||
0x48 0x0f 0x7e 0x00
|
||||
|
||||
# CHECK: movd %mm0, %rax
|
||||
# CHECK: movq %mm0, %rax
|
||||
0x48 0x0f 0x7e 0xc0
|
||||
|
||||
# CHECK: movq (%rax), %xmm0
|
||||
|
|
|
|||
|
|
@ -1131,10 +1131,10 @@ mov %gs, (%rsi) // CHECK: movw %gs, (%rsi) # encoding: [0x8c,0x2e]
|
|||
idiv 0x12345678,%eax
|
||||
|
||||
// PR8524
|
||||
movd %rax, %mm5 // CHECK: movd %rax, %mm5 # encoding: [0x48,0x0f,0x6e,0xe8]
|
||||
movd %mm5, %rbx // CHECK: movd %mm5, %rbx # encoding: [0x48,0x0f,0x7e,0xeb]
|
||||
movq %rax, %mm5 // CHECK: movd %rax, %mm5 # encoding: [0x48,0x0f,0x6e,0xe8]
|
||||
movq %mm5, %rbx // CHECK: movd %mm5, %rbx # encoding: [0x48,0x0f,0x7e,0xeb]
|
||||
movd %rax, %mm5 // CHECK: movq %rax, %mm5 # encoding: [0x48,0x0f,0x6e,0xe8]
|
||||
movd %mm5, %rbx // CHECK: movq %mm5, %rbx # encoding: [0x48,0x0f,0x7e,0xeb]
|
||||
movq %rax, %mm5 // CHECK: movq %rax, %mm5 # encoding: [0x48,0x0f,0x6e,0xe8]
|
||||
movq %mm5, %rbx // CHECK: movq %mm5, %rbx # encoding: [0x48,0x0f,0x7e,0xeb]
|
||||
|
||||
rex64 // CHECK: rex64 # encoding: [0x48]
|
||||
data16 // CHECK: data16 # encoding: [0x66]
|
||||
|
|
|
|||
|
|
@ -82,7 +82,7 @@ movq %gs:(%rdi), %rax
|
|||
// CHECK: encoding: [0xf2,0x48,0x0f,0x38,0xf1,0x43,0x04]
|
||||
crc32q 4(%rbx), %rax
|
||||
|
||||
// CHECK: movd %r8, %mm1
|
||||
// CHECK: movq %r8, %mm1
|
||||
// CHECK: encoding: [0x49,0x0f,0x6e,0xc8]
|
||||
movd %r8, %mm1
|
||||
|
||||
|
|
@ -90,7 +90,7 @@ movd %r8, %mm1
|
|||
// CHECK: encoding: [0x41,0x0f,0x6e,0xc8]
|
||||
movd %r8d, %mm1
|
||||
|
||||
// CHECK: movd %rdx, %mm1
|
||||
// CHECK: movq %rdx, %mm1
|
||||
// CHECK: encoding: [0x48,0x0f,0x6e,0xca]
|
||||
movd %rdx, %mm1
|
||||
|
||||
|
|
@ -98,7 +98,7 @@ movd %rdx, %mm1
|
|||
// CHECK: encoding: [0x0f,0x6e,0xca]
|
||||
movd %edx, %mm1
|
||||
|
||||
// CHECK: movd %mm1, %r8
|
||||
// CHECK: movq %mm1, %r8
|
||||
// CHECK: encoding: [0x49,0x0f,0x7e,0xc8]
|
||||
movd %mm1, %r8
|
||||
|
||||
|
|
@ -106,7 +106,7 @@ movd %mm1, %r8
|
|||
// CHECK: encoding: [0x41,0x0f,0x7e,0xc8]
|
||||
movd %mm1, %r8d
|
||||
|
||||
// CHECK: movd %mm1, %rdx
|
||||
// CHECK: movq %mm1, %rdx
|
||||
// CHECK: encoding: [0x48,0x0f,0x7e,0xca]
|
||||
movd %mm1, %rdx
|
||||
|
||||
|
|
@ -114,6 +114,30 @@ movd %mm1, %rdx
|
|||
// CHECK: encoding: [0x0f,0x7e,0xca]
|
||||
movd %mm1, %edx
|
||||
|
||||
// CHECK: movd %mm1, (%rax)
|
||||
// CHECK: encoding: [0x0f,0x7e,0x08]
|
||||
movd %mm1, (%rax)
|
||||
|
||||
// CHECK: movd (%rax), %mm1
|
||||
// CHECK: encoding: [0x0f,0x6e,0x08]
|
||||
movd (%rax), %mm1
|
||||
|
||||
// CHECK: movq %r8, %mm1
|
||||
// CHECK: encoding: [0x49,0x0f,0x6e,0xc8]
|
||||
movq %r8, %mm1
|
||||
|
||||
// CHECK: movq %rdx, %mm1
|
||||
// CHECK: encoding: [0x48,0x0f,0x6e,0xca]
|
||||
movq %rdx, %mm1
|
||||
|
||||
// CHECK: movq %mm1, %r8
|
||||
// CHECK: encoding: [0x49,0x0f,0x7e,0xc8]
|
||||
movq %mm1, %r8
|
||||
|
||||
// CHECK: movq %mm1, %rdx
|
||||
// CHECK: encoding: [0x48,0x0f,0x7e,0xca]
|
||||
movq %mm1, %rdx
|
||||
|
||||
// rdar://7840289
|
||||
// CHECK: pshufb CPI1_0(%rip), %xmm1
|
||||
// CHECK: encoding: [0x66,0x0f,0x38,0x00,0x0d,A,A,A,A]
|
||||
|
|
|
|||
Loading…
Reference in New Issue