2015-10-06 23:36:44 +08:00
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; RUN: opt %loadPolly -polly-dependences -analyze < %s | FileCheck %s
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2014-06-21 00:37:11 +08:00
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;
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2016-01-15 08:48:42 +08:00
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; CHECK: RAW dependences:
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2016-01-15 23:54:45 +08:00
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; CHECK-NEXT: { Stmt_S2[i0, 0] -> Stmt_S1[1 + i0, 0] : 0 <= i0 <= 97; Stmt_S1[i0, 0] -> Stmt_S2[i0, 0] : 0 <= i0 <= 98 }
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2016-01-15 08:48:42 +08:00
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; CHECK-NEXT: WAR dependences:
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[Polly] [DependenceInfo] change WAR, WAW generation to correct semantics
= Change of WAR, WAW generation: =
- `buildFlow(Sink, MustSource, MaySource, Sink)` treates any flow of the form
`sink <- may source <- must source` as a *may* dependence.
- we used to call:
```lang=cpp, name=old-flow-call.cpp
Flow = buildFlow(MustWrite, MustWrite, Read, Schedule);
WAW = isl_union_flow_get_must_dependence(Flow);
WAR = isl_union_flow_get_may_dependence(Flow);
```
- This caused some WAW dependences to be treated as WAR dependences.
- Incorrect semantics.
- Now, we call WAR and WAW correctly.
== Correct WAW: ==
```lang=cpp, name=new-waw-call.cpp
Flow = buildFlow(Write, MustWrite, MayWrite, Schedule);
WAW = isl_union_flow_get_may_dependence(Flow);
isl_union_flow_free(Flow);
```
== Correct WAR: ==
```lang=cpp, name=new-war-call.cpp
Flow = buildFlow(Write, Read, MustaWrite, Schedule);
WAR = isl_union_flow_get_must_dependence(Flow);
isl_union_flow_free(Flow);
```
- We want the "shortest" WAR possible (exact dependences).
- We mark all the *must-writes* as may-source, reads as must-souce.
- Then, we ask for *must* dependence.
- This removes all the reads that flow through a *must-write*
before reaching a sink.
- Note that we only block ealier writes with *must-writes*. This is
intuitively correct, as we do not want may-writes to block
must-writes.
- Leaves us with direct (R -> W).
- This affects reduction generation since RED is built using WAW and WAR.
= New StrictWAW for Reductions: =
- We used to call:
```lang=cpp,name=old-waw-war-call.cpp
Flow = buildFlow(MustWrite, MustWrite, Read, Schedule);
WAW = isl_union_flow_get_must_dependence(Flow);
WAR = isl_union_flow_get_may_dependence(Flow);
```
- This *is* the right model of WAW we need for reductions, just not in general.
- Reductions need to track only *strict* WAW, without any interfering reductions.
= Explanation: Why the new WAR dependences in tests are correct: =
- We no longer set WAR = WAR - WAW
- Hence, we will have WAR dependences that were originally removed.
- These may look incorrect, but in fact make sense.
== Code: ==
```lang=llvm, name=new-war-dependence.ll
; void manyreductions(long *A) {
; for (long i = 0; i < 1024; i++)
; for (long j = 0; j < 1024; j++)
; S0: *A += 42;
;
; for (long i = 0; i < 1024; i++)
; for (long j = 0; j < 1024; j++)
; S1: *A += 42;
;
```
=== WAR dependence: ===
{ S0[1023, 1023] -> S1[0, 0] }
- Between `S0[1023, 1023]` and `S1[0, 0]`, we will have the dependences:
```lang=cpp, name=dependence-incorrect, counterexample
S0[1023, 1023]:
*-- tmp = *A (load0)--*
WAR 2 add = tmp + 42 |
*-> *A = add (store0) |
WAR 1
S1[0, 0]: |
tmp = *A (load1) |
add = tmp + 42 |
A = add (store1)<-*
```
- One may assume that WAR2 *hides* WAR1 (since store0 happens before
store1). However, within a statement, Polly has no idea about the
ordering of loads and stores.
- Hence, according to Polly, the code may have looked like this:
```lang=cpp, name=dependence-correct
S0[1023, 1023]:
A = add (store0)
tmp = A (load0) ---*
add = A + 42 |
WAR 1
S1[0, 0]: |
tmp = A (load1) |
add = A + 42 |
A = add (store1) <-*
```
- So, Polly generates (correct) WAR dependences. It does not make sense
to remove these dependences, since they are correct with respect to
Polly's model.
Reviewers: grosser, Meinersbur
tags: #polly
Differential revision: https://reviews.llvm.org/D31386
llvm-svn: 299429
2017-04-04 21:08:23 +08:00
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; CHECK-NEXT: { Stmt_S2[i0, 0] -> Stmt_S1[1 + i0, 0] : 0 <= i0 <= 97; Stmt_S1[i0, 0] -> Stmt_S2[i0, 0] : 0 <= i0 <= 98 }
|
2016-01-15 08:48:42 +08:00
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; CHECK-NEXT: WAW dependences:
|
2016-01-15 23:54:45 +08:00
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; CHECK-NEXT: { Stmt_S2[i0, 0] -> Stmt_S1[1 + i0, 0] : 0 <= i0 <= 97; Stmt_S1[i0, 0] -> Stmt_S2[i0, 0] : 0 <= i0 <= 98 }
|
2016-01-15 08:48:42 +08:00
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; CHECK-NEXT: Reduction dependences:
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2016-01-15 23:54:45 +08:00
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; CHECK-NEXT: { Stmt_S2[i0, i1] -> Stmt_S2[1 + i0, i1] : 0 <= i0 <= 97 and 0 < i1 <= 99 }
|
2014-06-21 00:37:11 +08:00
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;
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; void f(int *sum) {
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; for (int i = 0; i < 99; i++) {
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; for (int j = 0; j < 1; j++)
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; S1: sum[j] += 42;
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; for (int j = 0; j < 100; j++)
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; S2: sum[j] += i * j;
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; }
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; }
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;
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target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-n32-S64"
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define void @f(i32* %sum) {
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entry:
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br label %for.cond
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for.cond: ; preds = %for.inc12, %entry
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%i.0 = phi i32 [ 0, %entry ], [ %inc13, %for.inc12 ]
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%exitcond2 = icmp ne i32 %i.0, 99
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br i1 %exitcond2, label %for.body, label %for.end14
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for.body: ; preds = %for.cond
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br label %for.cond1
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for.cond1: ; preds = %for.inc, %for.body
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%j.0 = phi i32 [ 0, %for.body ], [ %inc, %for.inc ]
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%exitcond = icmp ne i32 %j.0, 1
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br i1 %exitcond, label %for.body3, label %for.end
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for.body3: ; preds = %for.cond1
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br label %S1
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S1: ; preds = %for.body3
|
2015-02-28 03:20:19 +08:00
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%arrayidx = getelementptr inbounds i32, i32* %sum, i32 %j.0
|
2015-02-28 05:22:50 +08:00
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|
%tmp = load i32, i32* %arrayidx, align 4
|
2014-06-21 00:37:11 +08:00
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%add = add nsw i32 %tmp, 42
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store i32 %add, i32* %arrayidx, align 4
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br label %for.inc
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for.inc: ; preds = %S1
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%inc = add nsw i32 %j.0, 1
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br label %for.cond1
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for.end: ; preds = %for.cond1
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br label %for.cond4
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for.cond4: ; preds = %for.inc9, %for.end
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%j.1 = phi i32 [ 0, %for.end ], [ %inc10, %for.inc9 ]
|
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%exitcond1 = icmp ne i32 %j.1, 100
|
|
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|
br i1 %exitcond1, label %for.body6, label %for.end11
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for.body6: ; preds = %for.cond4
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br label %S2
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S2: ; preds = %for.body6
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%mul = mul nsw i32 %i.0, %j.1
|
2015-02-28 03:20:19 +08:00
|
|
|
%arrayidx7 = getelementptr inbounds i32, i32* %sum, i32 %j.1
|
2015-02-28 05:22:50 +08:00
|
|
|
%tmp3 = load i32, i32* %arrayidx7, align 4
|
2014-06-21 00:37:11 +08:00
|
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%add8 = add nsw i32 %tmp3, %mul
|
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store i32 %add8, i32* %arrayidx7, align 4
|
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br label %for.inc9
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for.inc9: ; preds = %S2
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%inc10 = add nsw i32 %j.1, 1
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br label %for.cond4
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for.end11: ; preds = %for.cond4
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br label %for.inc12
|
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|
for.inc12: ; preds = %for.end11
|
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|
%inc13 = add nsw i32 %i.0, 1
|
|
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|
br label %for.cond
|
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|
for.end14: ; preds = %for.cond
|
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|
ret void
|
|
|
|
}
|