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llvm-project/llvm/test/MC/ARM/thumb1-relax-bcc.s

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ARM: do not relax Thumb1 -> Thumb2 if only Thumb1 is available. After recognising that a certain narrow instruction might need a relocation to be represented, we used to unconditionally relax it to a Thumb2 instruction to permit this. Unfortunately, some CPUs (e.g. v6m) don't even have most Thumb2 instructions, so we end up emitting a completely invalid instruction. Theoretically, ELF does have relocations for these situations; but they are fairly unusable with such short ranges and the ABI document even says they're documented "for completeness". So an error is probably better there too. rdar://20391953 llvm-svn: 234195
2015-04-07 02:44:42 +08:00
@ RUN: not llvm-mc -triple thumbv6m-none-macho -filetype=obj -o /dev/null %s 2>&1 | FileCheck --check-prefix=CHECK-ERROR %s
@ RUN: not llvm-mc -triple thumbv7m-none-macho -filetype=obj -o /dev/null %s 2>&1 | FileCheck --check-prefix=CHECK-ERROR %s
@ RUN: llvm-mc -triple thumbv7m-none-eabi -filetype=obj -o %t %s
Revert r265817 lld tests need to be addressed. llvm-svn: 265822
2016-04-09 02:15:37 +08:00
@ RUN: llvm-objdump -d -r -triple thumbv7m-none-eabi %t | FileCheck --check-prefix=CHECK-ELF %s
ARM: do not relax Thumb1 -> Thumb2 if only Thumb1 is available. After recognising that a certain narrow instruction might need a relocation to be represented, we used to unconditionally relax it to a Thumb2 instruction to permit this. Unfortunately, some CPUs (e.g. v6m) don't even have most Thumb2 instructions, so we end up emitting a completely invalid instruction. Theoretically, ELF does have relocations for these situations; but they are fairly unusable with such short ranges and the ABI document even says they're documented "for completeness". So an error is probably better there too. rdar://20391953 llvm-svn: 234195
2015-04-07 02:44:42 +08:00
.global func1
_func1:
bne _func2
@ CHECK-ERROR: unsupported relocation on symbol
@ CHECK-ELF: 7f f4 fe af bne.w #-4
[ARM] Incorrect relocation type for Thumb2 B<cond>.w The Thumb2 conditional branch B<cond>.W has a different encoding (T3) to the unconditional branch B.W (T4) as it needs to record <cond>. As the encoding is different the B<cond>.W is given a different relocation type. ELF for the ARM Architecture 4.6.1.6 (Table-13) states that R_ARM_THM_JUMP19 should be used for B<cond>.W. At present the MC layer is using the R_ARM_THM_JUMP24 from B.W. This change makes B<cond>.W use R_ARM_THM_JUMP19 and alters the existing test that checks for R_ARM_THM_JUMP24 to expect R_ARM_THM_JUMP19. llvm-svn: 271997
2016-06-07 18:34:33 +08:00
@ CHECK-ELF-NEXT: R_ARM_THM_JUMP19 _func2