2011-02-17 10:21:03 +08:00
|
|
|
; RUN: opt < %s -instcombine -S | FileCheck %s
|
2008-01-08 15:23:51 +08:00
|
|
|
|
2007-03-05 08:01:38 +08:00
|
|
|
define i64 @test1(i64 %A, i32 %B) {
|
|
|
|
%tmp12 = zext i32 %B to i64
|
|
|
|
%tmp3 = shl i64 %tmp12, 32
|
|
|
|
%tmp5 = add i64 %tmp3, %A
|
|
|
|
%tmp6 = and i64 %tmp5, 123
|
|
|
|
ret i64 %tmp6
|
2013-07-14 09:42:54 +08:00
|
|
|
; CHECK-LABEL: @test1(
|
2011-02-17 10:21:03 +08:00
|
|
|
; CHECK-NEXT: and i64 %A, 123
|
|
|
|
; CHECK-NEXT: ret i64
|
2007-03-05 08:01:38 +08:00
|
|
|
}
|
|
|
|
|
2011-02-17 10:21:03 +08:00
|
|
|
define i32 @test2(i32 %A) {
|
2008-05-20 04:01:56 +08:00
|
|
|
%B = and i32 %A, 7
|
|
|
|
%C = and i32 %A, 32
|
|
|
|
%F = add i32 %B, %C
|
|
|
|
ret i32 %F
|
2013-07-14 09:42:54 +08:00
|
|
|
; CHECK-LABEL: @test2(
|
2011-02-17 10:21:03 +08:00
|
|
|
; CHECK-NEXT: and i32 %A, 39
|
|
|
|
; CHECK-NEXT: ret i32
|
2008-05-20 04:01:56 +08:00
|
|
|
}
|
|
|
|
|
2011-02-17 10:21:03 +08:00
|
|
|
define i32 @test3(i32 %A) {
|
2008-05-20 04:01:56 +08:00
|
|
|
%B = and i32 %A, 128
|
|
|
|
%C = lshr i32 %A, 30
|
|
|
|
%F = add i32 %B, %C
|
|
|
|
ret i32 %F
|
2013-07-14 09:42:54 +08:00
|
|
|
; CHECK-LABEL: @test3(
|
2011-02-17 10:21:03 +08:00
|
|
|
; CHECK-NEXT: and
|
|
|
|
; CHECK-NEXT: lshr
|
|
|
|
; CHECK-NEXT: or i32 %B, %C
|
|
|
|
; CHECK-NEXT: ret i32
|
2008-05-20 04:01:56 +08:00
|
|
|
}
|
|
|
|
|
2011-02-17 10:23:02 +08:00
|
|
|
define i32 @test4(i32 %A) {
|
|
|
|
%B = add nuw i32 %A, %A
|
|
|
|
ret i32 %B
|
2013-07-14 09:42:54 +08:00
|
|
|
; CHECK-LABEL: @test4(
|
2011-02-17 10:23:02 +08:00
|
|
|
; CHECK-NEXT: %B = shl nuw i32 %A, 1
|
|
|
|
; CHECK-NEXT: ret i32 %B
|
|
|
|
}
|
|
|
|
|
2014-01-19 23:24:22 +08:00
|
|
|
define <2 x i1> @test5(<2 x i1> %A, <2 x i1> %B) {
|
|
|
|
%add = add <2 x i1> %A, %B
|
|
|
|
ret <2 x i1> %add
|
|
|
|
; CHECK-LABEL: @test5(
|
|
|
|
; CHECK-NEXT: %add = xor <2 x i1> %A, %B
|
|
|
|
; CHECK-NEXT: ret <2 x i1> %add
|
|
|
|
}
|
|
|
|
|
|
|
|
define <2 x i64> @test6(<2 x i64> %A) {
|
|
|
|
%shl = shl <2 x i64> %A, <i64 2, i64 3>
|
|
|
|
%add = add <2 x i64> %shl, %A
|
|
|
|
ret <2 x i64> %add
|
|
|
|
; CHECK-LABEL: @test6(
|
|
|
|
; CHECK-NEXT: %add = mul <2 x i64> %A, <i64 5, i64 9>
|
|
|
|
; CHECK-NEXT: ret <2 x i64> %add
|
|
|
|
}
|
|
|
|
|
|
|
|
define <2 x i64> @test7(<2 x i64> %A) {
|
|
|
|
%shl = shl <2 x i64> %A, <i64 2, i64 3>
|
|
|
|
%mul = mul <2 x i64> %A, <i64 3, i64 4>
|
|
|
|
%add = add <2 x i64> %shl, %mul
|
|
|
|
ret <2 x i64> %add
|
|
|
|
; CHECK-LABEL: @test7(
|
|
|
|
; CHECK-NEXT: %add = mul <2 x i64> %A, <i64 7, i64 12>
|
|
|
|
; CHECK-NEXT: ret <2 x i64> %add
|
|
|
|
}
|
|
|
|
|
|
|
|
define <2 x i64> @test8(<2 x i64> %A) {
|
|
|
|
%xor = xor <2 x i64> %A, <i64 -1, i64 -1>
|
|
|
|
%add = add <2 x i64> %xor, <i64 2, i64 3>
|
|
|
|
ret <2 x i64> %add
|
|
|
|
; CHECK-LABEL: @test8(
|
|
|
|
; CHECK-NEXT: %add = sub <2 x i64> <i64 1, i64 2>, %A
|
|
|
|
; CHECK-NEXT: ret <2 x i64> %add
|
|
|
|
}
|
2014-06-06 05:29:49 +08:00
|
|
|
|
|
|
|
define i16 @test9(i16 %a) {
|
|
|
|
%b = mul i16 %a, 2
|
|
|
|
%c = mul i16 %a, 32767
|
|
|
|
%d = add i16 %b, %c
|
|
|
|
ret i16 %d
|
|
|
|
; CHECK-LABEL: @test9(
|
|
|
|
; CHECK-NEXT: %d = mul i16 %a, -32767
|
|
|
|
; CHECK-NEXT: ret i16 %d
|
|
|
|
}
|
2014-06-19 16:29:18 +08:00
|
|
|
|
2014-06-27 15:47:35 +08:00
|
|
|
; y + (~((x >> 3) & 0x55555555) + 1) -> y - ((x >> 3) & 0x55555555)
|
|
|
|
define i32 @test10(i32 %x, i32 %y) {
|
|
|
|
%shr = ashr i32 %x, 3
|
|
|
|
%shr.not = or i32 %shr, -1431655766
|
|
|
|
%neg = xor i32 %shr.not, 1431655765
|
|
|
|
%add = add i32 %y, 1
|
2014-06-19 18:36:52 +08:00
|
|
|
%add1 = add i32 %add, %neg
|
|
|
|
ret i32 %add1
|
|
|
|
; CHECK-LABEL: @test10(
|
2014-06-27 15:47:35 +08:00
|
|
|
; CHECK-NEXT: [[SHR:%[a-z0-9]+]] = ashr i32 %x, 3
|
|
|
|
; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 [[SHR]], 1431655765
|
|
|
|
; CHECK-NEXT: [[SUB:%[a-z0-9]+]] = sub i32 %y, [[AND]]
|
|
|
|
; CHECK-NEXT: ret i32 [[SUB]]
|
2014-06-19 18:36:52 +08:00
|
|
|
}
|
|
|
|
|
2014-06-27 15:47:35 +08:00
|
|
|
; y + (~(x & 0x55555555) + 1) -> y - (x & 0x55555555)
|
2014-06-19 18:36:52 +08:00
|
|
|
define i32 @test11(i32 %x, i32 %y) {
|
|
|
|
%x.not = or i32 %x, -1431655766
|
|
|
|
%neg = xor i32 %x.not, 1431655765
|
|
|
|
%add = add i32 %y, 1
|
|
|
|
%add1 = add i32 %add, %neg
|
|
|
|
ret i32 %add1
|
|
|
|
; CHECK-LABEL: @test11(
|
|
|
|
; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, 1431655765
|
|
|
|
; CHECK-NEXT: [[SUB:%[a-z0-9]+]] = sub i32 %y, [[AND]]
|
|
|
|
; CHECK-NEXT: ret i32 [[SUB]]
|
|
|
|
}
|
|
|
|
|
2014-06-27 15:47:35 +08:00
|
|
|
; (y + 1) + ~(x & 0x55555555) -> y - (x & 0x55555555)
|
2014-06-19 18:36:52 +08:00
|
|
|
define i32 @test12(i32 %x, i32 %y) {
|
2014-06-27 15:47:35 +08:00
|
|
|
%add = add nsw i32 %y, 1
|
|
|
|
%x.not = or i32 %x, -1431655766
|
|
|
|
%neg = xor i32 %x.not, 1431655765
|
|
|
|
%add1 = add nsw i32 %add, %neg
|
2014-06-19 18:36:52 +08:00
|
|
|
ret i32 %add1
|
|
|
|
; CHECK-LABEL: @test12(
|
2014-06-27 15:47:35 +08:00
|
|
|
; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, 1431655765
|
2014-06-19 18:36:52 +08:00
|
|
|
; CHECK-NEXT: [[SUB:%[a-z0-9]+]] = sub i32 %y, [[AND]]
|
|
|
|
; CHECK-NEXT: ret i32 [[SUB]]
|
|
|
|
}
|
|
|
|
|
2014-06-27 15:47:35 +08:00
|
|
|
; y + (~(x & 0x55555556) + 1) -> y - (x & 0x55555556)
|
2014-06-19 18:36:52 +08:00
|
|
|
define i32 @test13(i32 %x, i32 %y) {
|
|
|
|
%x.not = or i32 %x, -1431655767
|
|
|
|
%neg = xor i32 %x.not, 1431655766
|
|
|
|
%add = add i32 %y, 1
|
|
|
|
%add1 = add i32 %add, %neg
|
|
|
|
ret i32 %add1
|
|
|
|
; CHECK-LABEL: @test13(
|
|
|
|
; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, 1431655766
|
|
|
|
; CHECK-NEXT: [[SUB:%[a-z0-9]+]] = sub i32 %y, [[AND]]
|
|
|
|
; CHECK-NEXT: ret i32 [[SUB]]
|
|
|
|
}
|
|
|
|
|
2014-06-27 15:47:35 +08:00
|
|
|
; (y + 1) + ~(x & 0x55555556) -> y - (x & 0x55555556)
|
2014-06-19 18:36:52 +08:00
|
|
|
define i32 @test14(i32 %x, i32 %y) {
|
2014-06-27 15:47:35 +08:00
|
|
|
%add = add nsw i32 %y, 1
|
|
|
|
%x.not = or i32 %x, -1431655767
|
|
|
|
%neg = xor i32 %x.not, 1431655766
|
|
|
|
%add1 = add nsw i32 %add, %neg
|
2014-06-19 18:36:52 +08:00
|
|
|
ret i32 %add1
|
|
|
|
; CHECK-LABEL: @test14(
|
2014-06-27 15:47:35 +08:00
|
|
|
; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, 1431655766
|
2014-06-19 18:36:52 +08:00
|
|
|
; CHECK-NEXT: [[SUB:%[a-z0-9]+]] = sub i32 %y, [[AND]]
|
|
|
|
; CHECK-NEXT: ret i32 [[SUB]]
|
|
|
|
}
|
|
|
|
|
2014-06-27 15:47:35 +08:00
|
|
|
; y + (~(x | 0x55555556) + 1) -> y - (x | 0x55555556)
|
2014-06-26 13:40:22 +08:00
|
|
|
define i32 @test15(i32 %x, i32 %y) {
|
2014-06-27 15:47:35 +08:00
|
|
|
%x.not = and i32 %x, -1431655767
|
|
|
|
%neg = xor i32 %x.not, -1431655767
|
|
|
|
%add = add i32 %y, 1
|
|
|
|
%add1 = add i32 %add, %neg
|
|
|
|
ret i32 %add1
|
2014-06-26 13:40:22 +08:00
|
|
|
; CHECK-LABEL: @test15(
|
2014-06-27 15:47:35 +08:00
|
|
|
; CHECK-NEXT: [[AND:%[a-z0-9]+]] = or i32 %x, 1431655766
|
|
|
|
; CHECK-NEXT: [[SUB:%[a-z0-9]+]] = sub i32 %y, [[AND]]
|
2014-06-26 13:40:22 +08:00
|
|
|
; CHECK-NEXT: ret i32 [[SUB]]
|
|
|
|
}
|
|
|
|
|
2014-06-27 15:47:35 +08:00
|
|
|
; (y + 1) + ~(x | 0x55555556) -> y - (x | 0x555555556)
|
2014-06-26 13:40:22 +08:00
|
|
|
define i32 @test16(i32 %x, i32 %y) {
|
2014-06-27 15:47:35 +08:00
|
|
|
%add = add nsw i32 %y, 1
|
|
|
|
%x.not = and i32 %x, -1431655767
|
|
|
|
%neg = xor i32 %x.not, -1431655767
|
|
|
|
%add1 = add nsw i32 %add, %neg
|
|
|
|
ret i32 %add1
|
2014-06-26 13:40:22 +08:00
|
|
|
; CHECK-LABEL: @test16(
|
2014-06-27 15:47:35 +08:00
|
|
|
; CHECK-NEXT: [[AND:%[a-z0-9]+]] = or i32 %x, 1431655766
|
|
|
|
; CHECK-NEXT: [[SUB:%[a-z0-9]+]] = sub i32 %y, [[AND]]
|
|
|
|
; CHECK-NEXT: ret i32 [[SUB]]
|
|
|
|
}
|
|
|
|
|
|
|
|
; y + (~(x | 0x55555555) + 1) -> y - (x | 0x55555555)
|
|
|
|
define i32 @test17(i32 %x, i32 %y) {
|
|
|
|
%x.not = and i32 %x, -1431655766
|
|
|
|
%add2 = xor i32 %x.not, -1431655765
|
|
|
|
%add1 = add nsw i32 %add2, %y
|
|
|
|
ret i32 %add1
|
|
|
|
; CHECK-LABEL: @test17(
|
|
|
|
; CHECK-NEXT: [[AND:%[a-z0-9]+]] = or i32 %x, 1431655765
|
|
|
|
; CHECK-NEXT: [[SUB:%[a-z0-9]+]] = sub i32 %y, [[AND]]
|
|
|
|
; CHECK-NEXT: ret i32 [[SUB]]
|
|
|
|
}
|
|
|
|
|
|
|
|
; (y + 1) + ~(x | 0x55555555) -> y - (x | 0x55555555)
|
|
|
|
define i32 @test18(i32 %x, i32 %y) {
|
|
|
|
%add = add nsw i32 %y, 1
|
|
|
|
%x.not = and i32 %x, -1431655766
|
|
|
|
%neg = xor i32 %x.not, -1431655766
|
|
|
|
%add1 = add nsw i32 %add, %neg
|
|
|
|
ret i32 %add1
|
|
|
|
; CHECK-LABEL: @test18(
|
|
|
|
; CHECK-NEXT: [[AND:%[a-z0-9]+]] = or i32 %x, 1431655765
|
|
|
|
; CHECK-NEXT: [[SUB:%[a-z0-9]+]] = sub i32 %y, [[AND]]
|
2014-06-26 13:40:22 +08:00
|
|
|
; CHECK-NEXT: ret i32 [[SUB]]
|
|
|
|
}
|
|
|
|
|
2014-06-19 16:29:18 +08:00
|
|
|
define i16 @add_nsw_mul_nsw(i16 %x) {
|
|
|
|
%add1 = add nsw i16 %x, %x
|
|
|
|
%add2 = add nsw i16 %add1, %x
|
|
|
|
ret i16 %add2
|
|
|
|
; CHECK-LABEL: @add_nsw_mul_nsw(
|
|
|
|
; CHECK-NEXT: %add2 = mul nsw i16 %x, 3
|
|
|
|
; CHECK-NEXT: ret i16 %add2
|
|
|
|
}
|
|
|
|
|
|
|
|
define i16 @mul_add_to_mul_1(i16 %x) {
|
|
|
|
%mul1 = mul nsw i16 %x, 8
|
|
|
|
%add2 = add nsw i16 %x, %mul1
|
|
|
|
ret i16 %add2
|
|
|
|
; CHECK-LABEL: @mul_add_to_mul_1(
|
2014-10-11 18:19:52 +08:00
|
|
|
; CHECK-NEXT: %add2 = mul i16 %x, 9
|
2014-06-19 16:29:18 +08:00
|
|
|
; CHECK-NEXT: ret i16 %add2
|
|
|
|
}
|
|
|
|
|
|
|
|
define i16 @mul_add_to_mul_2(i16 %x) {
|
|
|
|
%mul1 = mul nsw i16 %x, 8
|
|
|
|
%add2 = add nsw i16 %mul1, %x
|
|
|
|
ret i16 %add2
|
|
|
|
; CHECK-LABEL: @mul_add_to_mul_2(
|
2014-10-11 18:19:52 +08:00
|
|
|
; CHECK-NEXT: %add2 = mul i16 %x, 9
|
2014-06-19 16:29:18 +08:00
|
|
|
; CHECK-NEXT: ret i16 %add2
|
|
|
|
}
|
|
|
|
|
|
|
|
define i16 @mul_add_to_mul_3(i16 %a) {
|
|
|
|
%mul1 = mul i16 %a, 2
|
|
|
|
%mul2 = mul i16 %a, 3
|
|
|
|
%add = add nsw i16 %mul1, %mul2
|
|
|
|
ret i16 %add
|
|
|
|
; CHECK-LABEL: @mul_add_to_mul_3(
|
|
|
|
; CHECK-NEXT: %add = mul i16 %a, 5
|
|
|
|
; CHECK-NEXT: ret i16 %add
|
|
|
|
}
|
|
|
|
|
|
|
|
define i16 @mul_add_to_mul_4(i16 %a) {
|
|
|
|
%mul1 = mul nsw i16 %a, 2
|
|
|
|
%mul2 = mul nsw i16 %a, 7
|
|
|
|
%add = add nsw i16 %mul1, %mul2
|
|
|
|
ret i16 %add
|
|
|
|
; CHECK-LABEL: @mul_add_to_mul_4(
|
2014-10-11 18:19:52 +08:00
|
|
|
; CHECK-NEXT: %add = mul i16 %a, 9
|
2014-06-19 16:29:18 +08:00
|
|
|
; CHECK-NEXT: ret i16 %add
|
|
|
|
}
|
|
|
|
|
|
|
|
define i16 @mul_add_to_mul_5(i16 %a) {
|
|
|
|
%mul1 = mul nsw i16 %a, 3
|
|
|
|
%mul2 = mul nsw i16 %a, 7
|
|
|
|
%add = add nsw i16 %mul1, %mul2
|
|
|
|
ret i16 %add
|
|
|
|
; CHECK-LABEL: @mul_add_to_mul_5(
|
|
|
|
; CHECK-NEXT: %add = mul nsw i16 %a, 10
|
|
|
|
; CHECK-NEXT: ret i16 %add
|
|
|
|
}
|
|
|
|
|
|
|
|
define i32 @mul_add_to_mul_6(i32 %x, i32 %y) {
|
|
|
|
%mul1 = mul nsw i32 %x, %y
|
|
|
|
%mul2 = mul nsw i32 %mul1, 5
|
|
|
|
%add = add nsw i32 %mul1, %mul2
|
|
|
|
ret i32 %add
|
|
|
|
; CHECK-LABEL: @mul_add_to_mul_6(
|
|
|
|
; CHECK-NEXT: %mul1 = mul nsw i32 %x, %y
|
|
|
|
; CHECK-NEXT: %add = mul nsw i32 %mul1, 6
|
|
|
|
; CHECK-NEXT: ret i32 %add
|
|
|
|
}
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2014-06-20 00:50:16 +08:00
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; This test and the next test verify that when a range metadata is attached to
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; llvm.cttz, ValueTracking correctly intersects the range specified by the
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; metadata and the range implied by the intrinsic.
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;
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; In this test, the range specified by the metadata is more strict. Therefore,
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; ValueTracking uses that range.
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define i16 @add_cttz(i16 %a) {
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; CHECK-LABEL: @add_cttz(
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; llvm.cttz.i16(..., /*is_zero_undefined=*/true) implies the value returned
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; is in [0, 16). The range metadata indicates the value returned is in [0, 8).
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; Intersecting these ranges, we know the value returned is in [0, 8).
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; Therefore, InstCombine will transform
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; add %cttz, 1111 1111 1111 1000 ; decimal -8
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; to
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; or %cttz, 1111 1111 1111 1000
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%cttz = call i16 @llvm.cttz.i16(i16 %a, i1 true), !range !0
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%b = add i16 %cttz, -8
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; CHECK: or i16 %cttz, -8
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ret i16 %b
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}
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declare i16 @llvm.cttz.i16(i16, i1)
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!0 = metadata !{i16 0, i16 8}
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; Similar to @add_cttz, but in this test, the range implied by the
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; intrinsic is more strict. Therefore, ValueTracking uses that range.
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define i16 @add_cttz_2(i16 %a) {
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; CHECK-LABEL: @add_cttz_2(
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; llvm.cttz.i16(..., /*is_zero_undefined=*/true) implies the value returned
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; is in [0, 16). The range metadata indicates the value returned is in
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; [0, 32). Intersecting these ranges, we know the value returned is in
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; [0, 16). Therefore, InstCombine will transform
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; add %cttz, 1111 1111 1111 0000 ; decimal -16
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; to
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; or %cttz, 1111 1111 1111 0000
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%cttz = call i16 @llvm.cttz.i16(i16 %a, i1 true), !range !1
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%b = add i16 %cttz, -16
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; CHECK: or i16 %cttz, -16
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ret i16 %b
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}
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!1 = metadata !{i16 0, i16 32}
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2014-08-12 06:32:02 +08:00
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define i32 @add_or_and(i32 %x, i32 %y) {
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%or = or i32 %x, %y
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%and = and i32 %x, %y
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%add = add i32 %or, %and
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ret i32 %add
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; CHECK-LABEL: @add_or_and(
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; CHECK-NEXT: add i32 %x, %y
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; CHECK-NEXT: ret i32
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}
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define i32 @add_nsw_or_and(i32 %x, i32 %y) {
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%or = or i32 %x, %y
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%and = and i32 %x, %y
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%add = add nsw i32 %or, %and
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ret i32 %add
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; CHECK-LABEL: @add_nsw_or_and(
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; CHECK-NEXT: add nsw i32 %x, %y
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; CHECK-NEXT: ret i32
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}
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define i32 @add_nuw_or_and(i32 %x, i32 %y) {
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%or = or i32 %x, %y
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%and = and i32 %x, %y
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%add = add nuw i32 %or, %and
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ret i32 %add
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; CHECK-LABEL: @add_nuw_or_and(
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; CHECK-NEXT: add nuw i32 %x, %y
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; CHECK-NEXT: ret i32
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}
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define i32 @add_nuw_nsw_or_and(i32 %x, i32 %y) {
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%or = or i32 %x, %y
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%and = and i32 %x, %y
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%add = add nsw nuw i32 %or, %and
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ret i32 %add
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; CHECK-LABEL: @add_nuw_nsw_or_and(
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; CHECK-NEXT: add nuw nsw i32 %x, %y
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; CHECK-NEXT: ret i32
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}
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