2016-09-14 05:55:41 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i386-unknown | FileCheck %s --check-prefix=X32
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; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
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define void @test_512(i512* %a, i512* %b, i512* %out) nounwind {
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; X32-LABEL: test_512:
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; X32: # BB#0:
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; X32-NEXT: pushl %ebp
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; X32-NEXT: movl %esp, %ebp
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; X32-NEXT: pushl %ebx
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; X32-NEXT: pushl %edi
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; X32-NEXT: pushl %esi
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; X32-NEXT: andl $-8, %esp
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: subl $656, %esp # imm = 0x290
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; X32-NEXT: movl 8(%ebp), %eax
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; X32-NEXT: movl 48(%eax), %ecx
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: movl 52(%eax), %ecx
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: movl 56(%eax), %ecx
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: movl 60(%eax), %ecx
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: movl 40(%eax), %ecx
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: movl 44(%eax), %ecx
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: movl 32(%eax), %ecx
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: movl 36(%eax), %ecx
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: movl (%eax), %ecx
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: movl 4(%eax), %ecx
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: movl 16(%eax), %ecx
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: movl 20(%eax), %ecx
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: movl 8(%eax), %ecx
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: movl 12(%eax), %ecx
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: movl 24(%eax), %ecx
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: movl 28(%eax), %eax
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: movl %eax, {{[0-9]+}}(%esp) # 4-byte Spill
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: movl 12(%ebp), %eax
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; X32-NEXT: movl 48(%eax), %ecx
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; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
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; X32-NEXT: movl 52(%eax), %ecx
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; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
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; X32-NEXT: movl 56(%eax), %ecx
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; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
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; X32-NEXT: movl 60(%eax), %ecx
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; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
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; X32-NEXT: movl 32(%eax), %ecx
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; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
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; X32-NEXT: movl 36(%eax), %ecx
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; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
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; X32-NEXT: movl 40(%eax), %ecx
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; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
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; X32-NEXT: movl 44(%eax), %ecx
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; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
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; X32-NEXT: movl (%eax), %ecx
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; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
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; X32-NEXT: movl 4(%eax), %ecx
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; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
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; X32-NEXT: movl 8(%eax), %ecx
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; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
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; X32-NEXT: movl 12(%eax), %ecx
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; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
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; X32-NEXT: movl 16(%eax), %esi
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; X32-NEXT: movl 20(%eax), %edi
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; X32-NEXT: movl 24(%eax), %ebx
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; X32-NEXT: movl 28(%eax), %eax
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2017-05-20 02:20:44 +08:00
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; X32-NEXT: movl %eax, (%esp) # 4-byte Spill
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: pushl $0
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; X32-NEXT: pushl $0
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; X32-NEXT: pushl $0
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; X32-NEXT: pushl $0
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; X32-NEXT: pushl %eax
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: pushl %ebx
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: pushl %edi
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; X32-NEXT: pushl %esi
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; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: pushl %eax
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; X32-NEXT: calll __multi3
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; X32-NEXT: addl $32, %esp
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; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: pushl $0
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; X32-NEXT: pushl $0
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: pushl %edi
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: movl %edi, {{[0-9]+}}(%esp) # 4-byte Spill
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: pushl %esi
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: movl %esi, {{[0-9]+}}(%esp) # 4-byte Spill
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; X32-NEXT: pushl $0
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; X32-NEXT: pushl $0
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
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; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
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; X32-NEXT: pushl %eax
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; X32-NEXT: calll __multi3
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; X32-NEXT: addl $32, %esp
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; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: pushl $0
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; X32-NEXT: pushl $0
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: pushl %ebx
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2017-05-20 02:20:44 +08:00
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; X32-NEXT: movl %ebx, {{[0-9]+}}(%esp) # 4-byte Spill
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: pushl $0
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; X32-NEXT: pushl $0
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
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; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
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; X32-NEXT: pushl %eax
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; X32-NEXT: calll __multi3
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; X32-NEXT: addl $32, %esp
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; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
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; X32-NEXT: pushl $0
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; X32-NEXT: pushl $0
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: pushl %edi
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; X32-NEXT: pushl %esi
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: pushl $0
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; X32-NEXT: pushl $0
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: movl {{[0-9]+}}(%esp), %edi # 4-byte Reload
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: pushl %edi
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2017-05-20 02:20:44 +08:00
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; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: pushl %eax
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; X32-NEXT: calll __multi3
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; X32-NEXT: addl $32, %esp
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; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
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; X32-NEXT: pushl $0
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; X32-NEXT: pushl $0
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; X32-NEXT: movl {{[0-9]+}}(%esp), %esi # 4-byte Reload
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; X32-NEXT: pushl %esi
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2017-05-20 02:20:44 +08:00
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; X32-NEXT: pushl %ebx
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: pushl $0
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; X32-NEXT: pushl $0
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2017-05-20 02:20:44 +08:00
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx # 4-byte Reload
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; X32-NEXT: pushl %ebx
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: pushl %eax
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; X32-NEXT: calll __multi3
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; X32-NEXT: addl $32, %esp
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; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
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; X32-NEXT: pushl $0
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; X32-NEXT: pushl $0
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; X32-NEXT: pushl %esi
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2017-05-20 02:20:44 +08:00
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; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: pushl $0
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; X32-NEXT: pushl $0
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: pushl %edi
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2017-05-20 02:20:44 +08:00
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; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: pushl %eax
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; X32-NEXT: calll __multi3
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; X32-NEXT: addl $32, %esp
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; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: pushl $0
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; X32-NEXT: pushl $0
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: movl {{[0-9]+}}(%esp), %edi # 4-byte Reload
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; X32-NEXT: pushl %edi
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2017-05-20 02:20:44 +08:00
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; X32-NEXT: movl {{[0-9]+}}(%esp), %esi # 4-byte Reload
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; X32-NEXT: pushl %esi
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: pushl $0
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; X32-NEXT: pushl $0
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2017-05-20 02:20:44 +08:00
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; X32-NEXT: pushl %ebx
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
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; X32-NEXT: pushl %eax
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; X32-NEXT: calll __multi3
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; X32-NEXT: addl $32, %esp
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; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: pushl $0
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; X32-NEXT: pushl $0
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
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2017-05-20 02:20:44 +08:00
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; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: pushl $0
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; X32-NEXT: pushl $0
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
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; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
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; X32-NEXT: pushl %eax
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; X32-NEXT: calll __multi3
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; X32-NEXT: addl $32, %esp
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; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
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; X32-NEXT: pushl $0
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; X32-NEXT: pushl $0
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: pushl %edi
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2017-05-20 02:20:44 +08:00
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; X32-NEXT: pushl %esi
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: pushl $0
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; X32-NEXT: pushl $0
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: movl {{[0-9]+}}(%esp), %edi # 4-byte Reload
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: pushl %edi
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2017-05-20 02:20:44 +08:00
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx # 4-byte Reload
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; X32-NEXT: pushl %ebx
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: pushl %eax
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; X32-NEXT: calll __multi3
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; X32-NEXT: addl $32, %esp
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; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
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; X32-NEXT: pushl $0
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; X32-NEXT: pushl $0
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
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2017-05-20 02:20:44 +08:00
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; X32-NEXT: movl {{[0-9]+}}(%esp), %esi # 4-byte Reload
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; X32-NEXT: pushl %esi
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: pushl $0
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; X32-NEXT: pushl $0
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2016-09-14 05:55:41 +08:00
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; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
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2016-11-16 02:29:24 +08:00
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; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
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; X32-NEXT: pushl %eax
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; X32-NEXT: calll __multi3
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; X32-NEXT: addl $32, %esp
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; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
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; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl %edi
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: pushl %ebx
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl %eax
|
|
|
|
|
; X32-NEXT: calll __multi3
|
|
|
|
|
; X32-NEXT: addl $32, %esp
|
|
|
|
|
; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: pushl %esi
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi # 4-byte Reload
|
|
|
|
|
; X32-NEXT: pushl %esi
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl %eax
|
|
|
|
|
; X32-NEXT: calll __multi3
|
|
|
|
|
; X32-NEXT: addl $32, %esp
|
|
|
|
|
; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl %edi
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: pushl %ebx
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl %eax
|
|
|
|
|
; X32-NEXT: calll __multi3
|
|
|
|
|
; X32-NEXT: addl $32, %esp
|
|
|
|
|
; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edi # 4-byte Reload
|
|
|
|
|
; X32-NEXT: pushl %edi
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx # 4-byte Reload
|
|
|
|
|
; X32-NEXT: pushl %ebx
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: pushl %esi
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl %eax
|
|
|
|
|
; X32-NEXT: calll __multi3
|
|
|
|
|
; X32-NEXT: addl $32, %esp
|
|
|
|
|
; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi # 4-byte Reload
|
|
|
|
|
; X32-NEXT: pushl %esi
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl %eax
|
|
|
|
|
; X32-NEXT: calll __multi3
|
|
|
|
|
; X32-NEXT: addl $32, %esp
|
|
|
|
|
; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: pushl %edi
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: pushl %ebx
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edi # 4-byte Reload
|
|
|
|
|
; X32-NEXT: pushl %edi
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl %esi
|
|
|
|
|
; X32-NEXT: pushl %eax
|
|
|
|
|
; X32-NEXT: calll __multi3
|
|
|
|
|
; X32-NEXT: addl $32, %esp
|
|
|
|
|
; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx # 4-byte Reload
|
|
|
|
|
; X32-NEXT: pushl %ebx
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl %eax
|
|
|
|
|
; X32-NEXT: calll __multi3
|
|
|
|
|
; X32-NEXT: addl $32, %esp
|
|
|
|
|
; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: pushl %edi
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: pushl %esi
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl %ebx
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi # 4-byte Reload
|
|
|
|
|
; X32-NEXT: pushl %esi
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl %eax
|
|
|
|
|
; X32-NEXT: calll __multi3
|
|
|
|
|
; X32-NEXT: addl $32, %esp
|
|
|
|
|
; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: pushl %ebx
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: pushl %esi
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl %eax
|
|
|
|
|
; X32-NEXT: calll __multi3
|
|
|
|
|
; X32-NEXT: addl $32, %esp
|
|
|
|
|
; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: pushl (%esp) # 4-byte Folded Reload
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl %eax
|
|
|
|
|
; X32-NEXT: calll __multi3
|
|
|
|
|
; X32-NEXT: addl $32, %esp
|
|
|
|
|
; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl %eax
|
|
|
|
|
; X32-NEXT: calll __multi3
|
|
|
|
|
; X32-NEXT: addl $32, %esp
|
|
|
|
|
; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx # 4-byte Reload
|
|
|
|
|
; X32-NEXT: pushl %ebx
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edi # 4-byte Reload
|
|
|
|
|
; X32-NEXT: pushl %edi
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: pushl %eax
|
|
|
|
|
; X32-NEXT: calll __multi3
|
|
|
|
|
; X32-NEXT: addl $32, %esp
|
|
|
|
|
; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: pushl %esi
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl %eax
|
|
|
|
|
; X32-NEXT: calll __multi3
|
|
|
|
|
; X32-NEXT: addl $32, %esp
|
|
|
|
|
; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: pushl %ebx
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: pushl %edi
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi # 4-byte Reload
|
|
|
|
|
; X32-NEXT: pushl %esi
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx # 4-byte Reload
|
|
|
|
|
; X32-NEXT: pushl %ebx
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: pushl %eax
|
|
|
|
|
; X32-NEXT: calll __multi3
|
|
|
|
|
; X32-NEXT: addl $32, %esp
|
|
|
|
|
; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl %eax
|
|
|
|
|
; X32-NEXT: calll __multi3
|
|
|
|
|
; X32-NEXT: addl $32, %esp
|
|
|
|
|
; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edi # 4-byte Reload
|
|
|
|
|
; X32-NEXT: pushl %edi
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl %esi
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: pushl %ebx
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl %eax
|
|
|
|
|
; X32-NEXT: calll __multi3
|
|
|
|
|
; X32-NEXT: addl $32, %esp
|
|
|
|
|
; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi # 4-byte Reload
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl %esi
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx # 4-byte Reload
|
|
|
|
|
; X32-NEXT: pushl %ebx
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl %eax
|
|
|
|
|
; X32-NEXT: calll __multi3
|
|
|
|
|
; X32-NEXT: addl $32, %esp
|
|
|
|
|
; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl %edi
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edi # 4-byte Reload
|
|
|
|
|
; X32-NEXT: pushl %edi
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl %eax
|
|
|
|
|
; X32-NEXT: calll __multi3
|
|
|
|
|
; X32-NEXT: addl $32, %esp
|
|
|
|
|
; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl %esi
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: pushl %ebx
|
|
|
|
|
; X32-NEXT: pushl %eax
|
|
|
|
|
; X32-NEXT: calll __multi3
|
|
|
|
|
; X32-NEXT: addl $32, %esp
|
|
|
|
|
; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: pushl %edi
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edi # 4-byte Reload
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl %edi
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi # 4-byte Reload
|
|
|
|
|
; X32-NEXT: pushl %esi
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl %ebx
|
|
|
|
|
; X32-NEXT: pushl %eax
|
|
|
|
|
; X32-NEXT: calll __multi3
|
|
|
|
|
; X32-NEXT: addl $32, %esp
|
|
|
|
|
; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl $0
|
|
|
|
|
; X32-NEXT: pushl %edi
|
|
|
|
|
; X32-NEXT: pushl %esi
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: pushl %eax
|
|
|
|
|
; X32-NEXT: calll __multi3
|
|
|
|
|
; X32-NEXT: addl $32, %esp
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: addl {{[0-9]+}}(%esp), %ecx
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %eax
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: adcl $0, %esi
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: adcl $0, %edx
|
|
|
|
|
; X32-NEXT: addl {{[0-9]+}}(%esp), %ecx
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: movl %eax, {{[0-9]+}}(%esp) # 4-byte Spill
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: adcl $0, %eax
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
|
|
|
; X32-NEXT: adcl $0, %ecx
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: addl %esi, %eax
|
|
|
|
|
; X32-NEXT: adcl %edx, %ecx
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: setb %dl
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: addl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %ecx
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movzbl %dl, %edx
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %edx
|
|
|
|
|
; X32-NEXT: movl %edx, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: adcl $0, %edx
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: movl %edx, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
|
|
|
|
|
; X32-NEXT: movl %edx, {{[0-9]+}}(%esp) # 4-byte Spill
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edi
|
|
|
|
|
; X32-NEXT: movl %edi, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: addl %edx, %edi
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: movl %edx, {{[0-9]+}}(%esp) # 4-byte Spill
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx
|
|
|
|
|
; X32-NEXT: movl %ebx, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: adcl %edx, %ebx
|
|
|
|
|
; X32-NEXT: movl %ebx, %edx
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movl %esi, (%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: movl %ebx, {{[0-9]+}}(%esp) # 4-byte Spill
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: adcl %esi, %ebx
|
|
|
|
|
; X32-NEXT: movl %ebx, %esi
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx
|
|
|
|
|
; X32-NEXT: movl %ebx, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx
|
|
|
|
|
; X32-NEXT: movl %ebx, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %ebx # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: addl %eax, %edi
|
|
|
|
|
; X32-NEXT: movl %edi, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: adcl %ecx, %edx
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: movl %edx, {{[0-9]+}}(%esp) # 4-byte Spill
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %esi # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: movl %esi, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %ebx # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: movl %ebx, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
|
|
|
|
|
; X32-NEXT: addl {{[0-9]+}}(%esp), %edx
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %eax
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movl %eax, %esi
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: adcl $0, %eax
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
|
|
|
; X32-NEXT: adcl $0, %ecx
|
|
|
|
|
; X32-NEXT: addl {{[0-9]+}}(%esp), %edx
|
|
|
|
|
; X32-NEXT: movl %edx, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %esi
|
|
|
|
|
; X32-NEXT: movl %esi, {{[0-9]+}}(%esp) # 4-byte Spill
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
|
|
|
|
|
; X32-NEXT: adcl $0, %edx
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
|
|
|
|
|
; X32-NEXT: adcl $0, %esi
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: addl %eax, %edx
|
|
|
|
|
; X32-NEXT: adcl %ecx, %esi
|
|
|
|
|
; X32-NEXT: setb %al
|
|
|
|
|
; X32-NEXT: addl {{[0-9]+}}(%esp), %edx
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %esi
|
|
|
|
|
; X32-NEXT: movzbl %al, %eax
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: movl %eax, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: adcl $0, %eax
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movl %eax, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: movl %eax, {{[0-9]+}}(%esp) # 4-byte Spill
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edi # 4-byte Reload
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: addl %eax, %edi
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: movl %eax, {{[0-9]+}}(%esp) # 4-byte Spill
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx # 4-byte Reload
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: adcl %eax, %ecx
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: movl %eax, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: adcl %eax, (%esp) # 4-byte Folded Spill
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: movl %ebx, {{[0-9]+}}(%esp) # 4-byte Spill
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax # 4-byte Reload
|
|
|
|
|
; X32-NEXT: adcl %ebx, %eax
|
|
|
|
|
; X32-NEXT: addl %edx, %edi
|
|
|
|
|
; X32-NEXT: movl %ecx, %edx
|
|
|
|
|
; X32-NEXT: adcl %esi, %edx
|
|
|
|
|
; X32-NEXT: movl (%esp), %ecx # 4-byte Reload
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %ecx # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %eax # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: addl {{[0-9]+}}(%esp), %edi
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: movl %edi, {{[0-9]+}}(%esp) # 4-byte Spill
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %edx
|
|
|
|
|
; X32-NEXT: movl %edx, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %ecx # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: movl %ecx, (%esp) # 4-byte Spill
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %eax # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: movl %eax, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: adcl $0, {{[0-9]+}}(%esp) # 4-byte Folded Spill
|
|
|
|
|
; X32-NEXT: adcl $0, {{[0-9]+}}(%esp) # 4-byte Folded Spill
|
|
|
|
|
; X32-NEXT: adcl $0, {{[0-9]+}}(%esp) # 4-byte Folded Spill
|
|
|
|
|
; X32-NEXT: adcl $0, {{[0-9]+}}(%esp) # 4-byte Folded Spill
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
|
|
|
|
|
; X32-NEXT: addl {{[0-9]+}}(%esp), %edx
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %eax
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movl %eax, %esi
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: adcl $0, %eax
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
|
|
|
; X32-NEXT: adcl $0, %ecx
|
|
|
|
|
; X32-NEXT: addl {{[0-9]+}}(%esp), %edx
|
|
|
|
|
; X32-NEXT: movl %edx, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %esi
|
|
|
|
|
; X32-NEXT: movl %esi, {{[0-9]+}}(%esp) # 4-byte Spill
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
|
|
|
|
|
; X32-NEXT: adcl $0, %edx
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
|
|
|
|
|
; X32-NEXT: adcl $0, %esi
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: addl %eax, %edx
|
|
|
|
|
; X32-NEXT: adcl %ecx, %esi
|
|
|
|
|
; X32-NEXT: setb %al
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: addl {{[0-9]+}}(%esp), %edx
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %esi
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movzbl %al, %eax
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: movl %eax, {{[0-9]+}}(%esp) # 4-byte Spill
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: adcl $0, %eax
|
|
|
|
|
; X32-NEXT: movl %eax, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: movl %eax, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx # 4-byte Reload
|
|
|
|
|
; X32-NEXT: addl %eax, %ebx
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
|
|
|
; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax # 4-byte Reload
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: adcl %ecx, %eax
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edi
|
|
|
|
|
; X32-NEXT: movl %edi, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx # 4-byte Reload
|
|
|
|
|
; X32-NEXT: adcl %edi, %ecx
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edi
|
|
|
|
|
; X32-NEXT: movl %edi, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: adcl %edi, {{[0-9]+}}(%esp) # 4-byte Folded Spill
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: addl %edx, %ebx
|
|
|
|
|
; X32-NEXT: adcl %esi, %eax
|
|
|
|
|
; X32-NEXT: movl %eax, %esi
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %ecx # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx # 4-byte Reload
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %edx # 4-byte Folded Reload
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax # 4-byte Reload
|
|
|
|
|
; X32-NEXT: addl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: movl %eax, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax # 4-byte Reload
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: movl %eax, {{[0-9]+}}(%esp) # 4-byte Spill
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movl (%esp), %eax # 4-byte Reload
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: adcl %eax, {{[0-9]+}}(%esp) # 4-byte Folded Spill
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax # 4-byte Reload
|
|
|
|
|
; X32-NEXT: adcl %eax, {{[0-9]+}}(%esp) # 4-byte Folded Spill
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: adcl $0, %ebx
|
|
|
|
|
; X32-NEXT: movl %esi, %eax
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: adcl $0, %eax
|
|
|
|
|
; X32-NEXT: adcl $0, %ecx
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: adcl $0, %edx
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: addl {{[0-9]+}}(%esp), %ebx # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: movl %ebx, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %eax # 4-byte Folded Reload
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: movl %eax, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %ecx # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %edx # 4-byte Folded Reload
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: movl %edx, {{[0-9]+}}(%esp) # 4-byte Spill
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: setb (%esp) # 1-byte Folded Spill
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: addl {{[0-9]+}}(%esp), %edx
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: movl %eax, %esi
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: adcl $0, %eax
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
|
|
|
; X32-NEXT: adcl $0, %ecx
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: addl {{[0-9]+}}(%esp), %edx
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: movl %edx, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %esi
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movl %esi, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
|
|
|
|
|
; X32-NEXT: adcl $0, %esi
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
|
|
|
|
|
; X32-NEXT: adcl $0, %edx
|
|
|
|
|
; X32-NEXT: addl %eax, %esi
|
|
|
|
|
; X32-NEXT: adcl %ecx, %edx
|
|
|
|
|
; X32-NEXT: setb %al
|
|
|
|
|
; X32-NEXT: addl {{[0-9]+}}(%esp), %esi
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %edx
|
|
|
|
|
; X32-NEXT: movzbl %al, %ebx
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %ebx
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: adcl $0, %eax
|
|
|
|
|
; X32-NEXT: movl %eax, {{[0-9]+}}(%esp) # 4-byte Spill
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edi # 4-byte Reload
|
|
|
|
|
; X32-NEXT: addl {{[0-9]+}}(%esp), %edi # 4-byte Folded Reload
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax # 4-byte Reload
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %eax # 4-byte Folded Reload
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx # 4-byte Reload
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: adcl %ecx, {{[0-9]+}}(%esp) # 4-byte Folded Spill
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx # 4-byte Reload
|
|
|
|
|
; X32-NEXT: adcl %ecx, {{[0-9]+}}(%esp) # 4-byte Folded Spill
|
|
|
|
|
; X32-NEXT: addl %esi, %edi
|
|
|
|
|
; X32-NEXT: movl %edi, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: movl %eax, %esi
|
|
|
|
|
; X32-NEXT: adcl %edx, %esi
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx # 4-byte Reload
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: adcl %ebx, %edx
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edi # 4-byte Reload
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %edi # 4-byte Folded Reload
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax # 4-byte Reload
|
|
|
|
|
; X32-NEXT: addl {{[0-9]+}}(%esp), %eax
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: movl %eax, {{[0-9]+}}(%esp) # 4-byte Spill
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax # 4-byte Reload
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: movl %eax, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax # 4-byte Reload
|
|
|
|
|
; X32-NEXT: adcl %eax, {{[0-9]+}}(%esp) # 4-byte Folded Spill
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax # 4-byte Reload
|
|
|
|
|
; X32-NEXT: adcl %eax, {{[0-9]+}}(%esp) # 4-byte Folded Spill
|
|
|
|
|
; X32-NEXT: movzbl (%esp), %eax # 1-byte Folded Reload
|
|
|
|
|
; X32-NEXT: adcl %eax, {{[0-9]+}}(%esp) # 4-byte Folded Spill
|
|
|
|
|
; X32-NEXT: adcl $0, %esi
|
|
|
|
|
; X32-NEXT: movl %esi, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: adcl $0, %edx
|
|
|
|
|
; X32-NEXT: movl %edx, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: adcl $0, %edi
|
|
|
|
|
; X32-NEXT: movl %edi, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
|
|
|
|
|
; X32-NEXT: addl {{[0-9]+}}(%esp), %edx
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: movl %eax, %esi
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: adcl $0, %eax
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: adcl $0, %ecx
|
|
|
|
|
; X32-NEXT: addl {{[0-9]+}}(%esp), %edx
|
|
|
|
|
; X32-NEXT: movl %edx, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %esi
|
|
|
|
|
; X32-NEXT: movl %esi, {{[0-9]+}}(%esp) # 4-byte Spill
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
|
|
|
|
|
; X32-NEXT: adcl $0, %edx
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
|
|
|
|
|
; X32-NEXT: adcl $0, %esi
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: addl %eax, %edx
|
|
|
|
|
; X32-NEXT: adcl %ecx, %esi
|
|
|
|
|
; X32-NEXT: setb %al
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: addl {{[0-9]+}}(%esp), %edx
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %esi
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movzbl %al, %eax
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: movl %eax, {{[0-9]+}}(%esp) # 4-byte Spill
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: adcl $0, %eax
|
|
|
|
|
; X32-NEXT: movl %eax, (%esp) # 4-byte Spill
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edi
|
|
|
|
|
; X32-NEXT: addl {{[0-9]+}}(%esp), %edi
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %ebx
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %ecx
|
|
|
|
|
; X32-NEXT: addl %edx, %edi
|
|
|
|
|
; X32-NEXT: movl %edi, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: adcl %esi, %ebx
|
|
|
|
|
; X32-NEXT: movl %ebx, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %eax # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: movl %eax, {{[0-9]+}}(%esp) # 4-byte Spill
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: adcl (%esp), %ecx # 4-byte Folded Reload
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
|
|
|
|
|
; X32-NEXT: addl {{[0-9]+}}(%esp), %edx
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: movl %eax, %esi
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: adcl $0, %eax
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
|
|
|
; X32-NEXT: adcl $0, %ecx
|
|
|
|
|
; X32-NEXT: addl {{[0-9]+}}(%esp), %edx
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movl %edx, (%esp) # 4-byte Spill
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %esi
|
|
|
|
|
; X32-NEXT: movl %esi, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edi
|
|
|
|
|
; X32-NEXT: adcl $0, %edi
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
|
|
|
|
|
; X32-NEXT: adcl $0, %esi
|
|
|
|
|
; X32-NEXT: addl %eax, %edi
|
|
|
|
|
; X32-NEXT: adcl %ecx, %esi
|
|
|
|
|
; X32-NEXT: setb %al
|
|
|
|
|
; X32-NEXT: addl {{[0-9]+}}(%esp), %edi
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %esi
|
|
|
|
|
; X32-NEXT: movzbl %al, %eax
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: movl %eax, {{[0-9]+}}(%esp) # 4-byte Spill
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: adcl $0, %eax
|
|
|
|
|
; X32-NEXT: movl %eax, {{[0-9]+}}(%esp) # 4-byte Spill
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp) # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: pushl %eax
|
|
|
|
|
; X32-NEXT: calll __multi3
|
|
|
|
|
; X32-NEXT: addl $32, %esp
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx
|
|
|
|
|
; X32-NEXT: addl {{[0-9]+}}(%esp), %ebx
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %ecx
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %edx
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %eax
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: addl %edi, %ebx
|
|
|
|
|
; X32-NEXT: adcl %esi, %ecx
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %edx # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %eax # 4-byte Folded Reload
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: addl {{[0-9]+}}(%esp), %esi
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: movl %esi, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %esi
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: movl %esi, {{[0-9]+}}(%esp) # 4-byte Spill
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movl (%esp), %edi # 4-byte Reload
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %edi # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi # 4-byte Reload
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %esi # 4-byte Folded Reload
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %ebx # 4-byte Folded Reload
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: movl %ebx, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %ecx # 4-byte Folded Reload
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %edx # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %eax # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx # 4-byte Reload
|
|
|
|
|
; X32-NEXT: addl {{[0-9]+}}(%esp), %ebx # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: movl %ebx, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx # 4-byte Reload
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %ebx # 4-byte Folded Reload
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %edi # 4-byte Folded Reload
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movl %edi, (%esp) # 4-byte Spill
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %esi # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: movl %esi, {{[0-9]+}}(%esp) # 4-byte Spill
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi # 4-byte Reload
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %esi # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: movl %esi, {{[0-9]+}}(%esp) # 4-byte Spill
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %ecx # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %edx # 4-byte Folded Reload
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: adcl {{[0-9]+}}(%esp), %eax # 4-byte Folded Reload
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
|
|
|
|
|
; X32-NEXT: movl %esi, {{[0-9]+}}(%esp) # 4-byte Spill
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edi
|
2016-11-16 02:29:24 +08:00
|
|
|
; X32-NEXT: movl 16(%ebp), %esi
|
2017-05-20 02:20:44 +08:00
|
|
|
; X32-NEXT: movl %edi, 4(%esi)
|
|
|
|
|
; X32-NEXT: movl 16(%ebp), %edi
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi # 4-byte Reload
|
|
|
|
|
; X32-NEXT: movl %esi, (%edi)
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi # 4-byte Reload
|
|
|
|
|
; X32-NEXT: movl %esi, 8(%edi)
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi # 4-byte Reload
|
|
|
|
|
; X32-NEXT: movl %esi, 12(%edi)
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi # 4-byte Reload
|
|
|
|
|
; X32-NEXT: movl %esi, 16(%edi)
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi # 4-byte Reload
|
|
|
|
|
; X32-NEXT: movl %esi, 20(%edi)
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi # 4-byte Reload
|
|
|
|
|
; X32-NEXT: movl %esi, 24(%edi)
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi # 4-byte Reload
|
|
|
|
|
; X32-NEXT: movl %esi, 28(%edi)
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi # 4-byte Reload
|
|
|
|
|
; X32-NEXT: movl %esi, 32(%edi)
|
|
|
|
|
; X32-NEXT: movl %ebx, 36(%edi)
|
|
|
|
|
; X32-NEXT: movl (%esp), %esi # 4-byte Reload
|
|
|
|
|
; X32-NEXT: movl %esi, 40(%edi)
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi # 4-byte Reload
|
|
|
|
|
; X32-NEXT: movl %esi, 44(%edi)
|
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi # 4-byte Reload
|
|
|
|
|
; X32-NEXT: movl %esi, 48(%edi)
|
|
|
|
|
; X32-NEXT: movl %ecx, 52(%edi)
|
|
|
|
|
; X32-NEXT: movl %edx, 56(%edi)
|
|
|
|
|
; X32-NEXT: movl %eax, 60(%edi)
|
2016-09-14 05:55:41 +08:00
|
|
|
; X32-NEXT: leal -12(%ebp), %esp
|
|
|
|
|
; X32-NEXT: popl %esi
|
|
|
|
|
; X32-NEXT: popl %edi
|
|
|
|
|
; X32-NEXT: popl %ebx
|
|
|
|
|
; X32-NEXT: popl %ebp
|
|
|
|
|
; X32-NEXT: retl
|
|
|
|
|
;
|
|
|
|
|
; X64-LABEL: test_512:
|
|
|
|
|
; X64: # BB#0:
|
|
|
|
|
; X64-NEXT: pushq %rbp
|
|
|
|
|
; X64-NEXT: pushq %r15
|
|
|
|
|
; X64-NEXT: pushq %r14
|
|
|
|
|
; X64-NEXT: pushq %r13
|
|
|
|
|
; X64-NEXT: pushq %r12
|
|
|
|
|
; X64-NEXT: pushq %rbx
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: pushq %rax
|
|
|
|
|
; X64-NEXT: movq %rdx, (%rsp) # 8-byte Spill
|
[DAGCombine] (uaddo X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)
Summary: This is a common pattern that arise when legalizing large integers operations. Only do it when Y + 1 cannot overflow as this would change the carry behavior of uaddo .
Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32687
llvm-svn: 301922
2017-05-02 22:15:48 +08:00
|
|
|
; X64-NEXT: movq 24(%rdi), %r11
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: movq 16(%rdi), %r15
|
2016-09-14 05:55:41 +08:00
|
|
|
; X64-NEXT: movq %rsi, -{{[0-9]+}}(%rsp) # 8-byte Spill
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: movq (%rsi), %rdx
|
[DAGCombine] (uaddo X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)
Summary: This is a common pattern that arise when legalizing large integers operations. Only do it when Y + 1 cannot overflow as this would change the carry behavior of uaddo .
Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32687
llvm-svn: 301922
2017-05-02 22:15:48 +08:00
|
|
|
; X64-NEXT: movq 8(%rsi), %rbp
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: movq %r15, %rax
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: movq %rdx, %rsi
|
2017-10-04 00:59:13 +08:00
|
|
|
; X64-NEXT: mulq %rsi
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: movq %rdx, %r9
|
|
|
|
|
; X64-NEXT: movq %rax, %r8
|
[DAGCombine] (uaddo X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)
Summary: This is a common pattern that arise when legalizing large integers operations. Only do it when Y + 1 cannot overflow as this would change the carry behavior of uaddo .
Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32687
llvm-svn: 301922
2017-05-02 22:15:48 +08:00
|
|
|
; X64-NEXT: movq %r11, %rax
|
|
|
|
|
; X64-NEXT: movq %r11, -{{[0-9]+}}(%rsp) # 8-byte Spill
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: mulq %rsi
|
[DAGCombine] (uaddo X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)
Summary: This is a common pattern that arise when legalizing large integers operations. Only do it when Y + 1 cannot overflow as this would change the carry behavior of uaddo .
Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32687
llvm-svn: 301922
2017-05-02 22:15:48 +08:00
|
|
|
; X64-NEXT: movq %rsi, %r10
|
2016-09-14 05:55:41 +08:00
|
|
|
; X64-NEXT: movq %rdx, %rbx
|
|
|
|
|
; X64-NEXT: movq %rax, %rsi
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: addq %r9, %rsi
|
2016-09-14 05:55:41 +08:00
|
|
|
; X64-NEXT: adcq $0, %rbx
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: movq %r15, %rax
|
|
|
|
|
; X64-NEXT: movq %r15, -{{[0-9]+}}(%rsp) # 8-byte Spill
|
[DAGCombine] (uaddo X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)
Summary: This is a common pattern that arise when legalizing large integers operations. Only do it when Y + 1 cannot overflow as this would change the carry behavior of uaddo .
Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32687
llvm-svn: 301922
2017-05-02 22:15:48 +08:00
|
|
|
; X64-NEXT: mulq %rbp
|
2016-09-14 05:55:41 +08:00
|
|
|
; X64-NEXT: movq %rdx, %rcx
|
[DAGCombine] (uaddo X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)
Summary: This is a common pattern that arise when legalizing large integers operations. Only do it when Y + 1 cannot overflow as this would change the carry behavior of uaddo .
Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32687
llvm-svn: 301922
2017-05-02 22:15:48 +08:00
|
|
|
; X64-NEXT: movq %rax, %r9
|
|
|
|
|
; X64-NEXT: addq %rsi, %r9
|
|
|
|
|
; X64-NEXT: adcq %rbx, %rcx
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: setb %al
|
|
|
|
|
; X64-NEXT: movzbl %al, %ebx
|
[DAGCombine] (uaddo X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)
Summary: This is a common pattern that arise when legalizing large integers operations. Only do it when Y + 1 cannot overflow as this would change the carry behavior of uaddo .
Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32687
llvm-svn: 301922
2017-05-02 22:15:48 +08:00
|
|
|
; X64-NEXT: movq %r11, %rax
|
|
|
|
|
; X64-NEXT: mulq %rbp
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: movq %rbp, %r14
|
2017-10-04 00:59:13 +08:00
|
|
|
; X64-NEXT: movq %r14, -{{[0-9]+}}(%rsp) # 8-byte Spill
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: movq %rdx, %rsi
|
|
|
|
|
; X64-NEXT: movq %rax, %rbp
|
|
|
|
|
; X64-NEXT: addq %rcx, %rbp
|
|
|
|
|
; X64-NEXT: adcq %rbx, %rsi
|
|
|
|
|
; X64-NEXT: xorl %ecx, %ecx
|
[DAGCombine] (uaddo X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)
Summary: This is a common pattern that arise when legalizing large integers operations. Only do it when Y + 1 cannot overflow as this would change the carry behavior of uaddo .
Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32687
llvm-svn: 301922
2017-05-02 22:15:48 +08:00
|
|
|
; X64-NEXT: movq %r10, %rbx
|
2017-10-04 00:59:13 +08:00
|
|
|
; X64-NEXT: movq %rbx, -{{[0-9]+}}(%rsp) # 8-byte Spill
|
|
|
|
|
; X64-NEXT: movq %rbx, %rax
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: mulq %rcx
|
|
|
|
|
; X64-NEXT: movq %rdx, %r13
|
|
|
|
|
; X64-NEXT: movq %rax, %r10
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: movq %r15, %rax
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: mulq %rcx
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: movq %rdx, -{{[0-9]+}}(%rsp) # 8-byte Spill
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: movq %rax, %r15
|
2017-10-04 00:59:13 +08:00
|
|
|
; X64-NEXT: movq %r15, -{{[0-9]+}}(%rsp) # 8-byte Spill
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: addq %r10, %r15
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: adcq %r13, %rdx
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: addq %rbp, %r15
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: adcq %rsi, %rdx
|
|
|
|
|
; X64-NEXT: movq %rdx, %r12
|
2016-09-14 05:55:41 +08:00
|
|
|
; X64-NEXT: movq %rdi, -{{[0-9]+}}(%rsp) # 8-byte Spill
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: movq (%rdi), %rcx
|
|
|
|
|
; X64-NEXT: movq %rcx, %rax
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: mulq %rbx
|
|
|
|
|
; X64-NEXT: movq %rax, -{{[0-9]+}}(%rsp) # 8-byte Spill
|
|
|
|
|
; X64-NEXT: movq %rdx, %r11
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: movq 8(%rdi), %rdi
|
|
|
|
|
; X64-NEXT: movq %rdi, %rax
|
|
|
|
|
; X64-NEXT: movq %rdi, -{{[0-9]+}}(%rsp) # 8-byte Spill
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: mulq %rbx
|
|
|
|
|
; X64-NEXT: movq %rdx, %rbp
|
|
|
|
|
; X64-NEXT: movq %rax, %rsi
|
|
|
|
|
; X64-NEXT: addq %r11, %rsi
|
|
|
|
|
; X64-NEXT: adcq $0, %rbp
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: movq %rcx, %rax
|
|
|
|
|
; X64-NEXT: mulq %r14
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: movq %rdx, %rbx
|
|
|
|
|
; X64-NEXT: addq %rsi, %rax
|
|
|
|
|
; X64-NEXT: movq %rax, -{{[0-9]+}}(%rsp) # 8-byte Spill
|
[DAGCombine] (uaddo X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)
Summary: This is a common pattern that arise when legalizing large integers operations. Only do it when Y + 1 cannot overflow as this would change the carry behavior of uaddo .
Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32687
llvm-svn: 301922
2017-05-02 22:15:48 +08:00
|
|
|
; X64-NEXT: adcq %rbp, %rbx
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: setb %r11b
|
|
|
|
|
; X64-NEXT: movq %rdi, %rax
|
|
|
|
|
; X64-NEXT: mulq %r14
|
2016-09-14 05:55:41 +08:00
|
|
|
; X64-NEXT: movq %rdx, %rsi
|
|
|
|
|
; X64-NEXT: movq %rax, %rbp
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: addq %rbx, %rbp
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: movzbl %r11b, %eax
|
|
|
|
|
; X64-NEXT: adcq %rax, %rsi
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: movq %rcx, %rax
|
|
|
|
|
; X64-NEXT: xorl %edx, %edx
|
|
|
|
|
; X64-NEXT: mulq %rdx
|
|
|
|
|
; X64-NEXT: movq %rdx, %r14
|
|
|
|
|
; X64-NEXT: movq %rax, %r11
|
2017-10-04 00:59:13 +08:00
|
|
|
; X64-NEXT: addq %r11, %r10
|
|
|
|
|
; X64-NEXT: adcq %r14, %r13
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: addq %rbp, %r10
|
|
|
|
|
; X64-NEXT: adcq %rsi, %r13
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: addq %r8, %r10
|
[DAGCombine] (uaddo X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)
Summary: This is a common pattern that arise when legalizing large integers operations. Only do it when Y + 1 cannot overflow as this would change the carry behavior of uaddo .
Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32687
llvm-svn: 301922
2017-05-02 22:15:48 +08:00
|
|
|
; X64-NEXT: adcq %r9, %r13
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: adcq $0, %r15
|
[DAGCombine] (uaddo X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)
Summary: This is a common pattern that arise when legalizing large integers operations. Only do it when Y + 1 cannot overflow as this would change the carry behavior of uaddo .
Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32687
llvm-svn: 301922
2017-05-02 22:15:48 +08:00
|
|
|
; X64-NEXT: adcq $0, %r12
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: movq %r12, -{{[0-9]+}}(%rsp) # 8-byte Spill
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: movq -{{[0-9]+}}(%rsp), %rsi # 8-byte Reload
|
|
|
|
|
; X64-NEXT: movq 16(%rsi), %r8
|
|
|
|
|
; X64-NEXT: movq %rcx, %rax
|
|
|
|
|
; X64-NEXT: movq %rcx, %r9
|
2017-10-04 00:59:13 +08:00
|
|
|
; X64-NEXT: movq %r9, -{{[0-9]+}}(%rsp) # 8-byte Spill
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: mulq %r8
|
|
|
|
|
; X64-NEXT: movq %rdx, %rdi
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: movq %rax, %r12
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: movq -{{[0-9]+}}(%rsp), %rcx # 8-byte Reload
|
|
|
|
|
; X64-NEXT: movq %rcx, %rax
|
|
|
|
|
; X64-NEXT: mulq %r8
|
[DAGCombine] (uaddo X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)
Summary: This is a common pattern that arise when legalizing large integers operations. Only do it when Y + 1 cannot overflow as this would change the carry behavior of uaddo .
Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32687
llvm-svn: 301922
2017-05-02 22:15:48 +08:00
|
|
|
; X64-NEXT: movq %rdx, %rbp
|
|
|
|
|
; X64-NEXT: movq %rax, %rbx
|
|
|
|
|
; X64-NEXT: addq %rdi, %rbx
|
|
|
|
|
; X64-NEXT: adcq $0, %rbp
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: movq 24(%rsi), %rdi
|
|
|
|
|
; X64-NEXT: movq %r9, %rax
|
|
|
|
|
; X64-NEXT: mulq %rdi
|
|
|
|
|
; X64-NEXT: movq %rdx, %rsi
|
[DAGCombine] (uaddo X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)
Summary: This is a common pattern that arise when legalizing large integers operations. Only do it when Y + 1 cannot overflow as this would change the carry behavior of uaddo .
Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32687
llvm-svn: 301922
2017-05-02 22:15:48 +08:00
|
|
|
; X64-NEXT: addq %rbx, %rax
|
2016-09-14 05:55:41 +08:00
|
|
|
; X64-NEXT: movq %rax, -{{[0-9]+}}(%rsp) # 8-byte Spill
|
[DAGCombine] (uaddo X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)
Summary: This is a common pattern that arise when legalizing large integers operations. Only do it when Y + 1 cannot overflow as this would change the carry behavior of uaddo .
Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32687
llvm-svn: 301922
2017-05-02 22:15:48 +08:00
|
|
|
; X64-NEXT: adcq %rbp, %rsi
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: setb %bpl
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: movq %rcx, %rax
|
|
|
|
|
; X64-NEXT: mulq %rdi
|
|
|
|
|
; X64-NEXT: movq %rdx, %rbx
|
|
|
|
|
; X64-NEXT: movq %rax, %r9
|
|
|
|
|
; X64-NEXT: addq %rsi, %r9
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: movzbl %bpl, %eax
|
|
|
|
|
; X64-NEXT: adcq %rax, %rbx
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: movq %r8, %rax
|
|
|
|
|
; X64-NEXT: xorl %ecx, %ecx
|
|
|
|
|
; X64-NEXT: mulq %rcx
|
2016-09-14 05:55:41 +08:00
|
|
|
; X64-NEXT: movq %rdx, -{{[0-9]+}}(%rsp) # 8-byte Spill
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: movq %rax, %rbp
|
2017-10-04 00:59:13 +08:00
|
|
|
; X64-NEXT: addq %rbp, %r11
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: adcq %rdx, %r14
|
|
|
|
|
; X64-NEXT: addq %r9, %r11
|
|
|
|
|
; X64-NEXT: adcq %rbx, %r14
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: addq %r10, %r12
|
|
|
|
|
; X64-NEXT: movq %r12, -{{[0-9]+}}(%rsp) # 8-byte Spill
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: adcq %r13, -{{[0-9]+}}(%rsp) # 8-byte Folded Spill
|
|
|
|
|
; X64-NEXT: adcq $0, %r11
|
2016-09-14 05:55:41 +08:00
|
|
|
; X64-NEXT: adcq $0, %r14
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: addq %r15, %r11
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: adcq -{{[0-9]+}}(%rsp), %r14 # 8-byte Folded Reload
|
|
|
|
|
; X64-NEXT: setb %r9b
|
2016-09-14 05:55:41 +08:00
|
|
|
; X64-NEXT: movq -{{[0-9]+}}(%rsp), %rcx # 8-byte Reload
|
|
|
|
|
; X64-NEXT: movq %rcx, %rax
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: mulq %r8
|
2016-09-14 05:55:41 +08:00
|
|
|
; X64-NEXT: movq %rdx, %r15
|
|
|
|
|
; X64-NEXT: movq %rax, %r12
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: movq -{{[0-9]+}}(%rsp), %r10 # 8-byte Reload
|
2016-09-14 05:55:41 +08:00
|
|
|
; X64-NEXT: movq %r10, %rax
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: mulq %r8
|
|
|
|
|
; X64-NEXT: movq %rdx, %rsi
|
|
|
|
|
; X64-NEXT: movq %rax, %rbx
|
|
|
|
|
; X64-NEXT: addq %r15, %rbx
|
|
|
|
|
; X64-NEXT: adcq $0, %rsi
|
|
|
|
|
; X64-NEXT: movq %rcx, %rax
|
2016-09-14 05:55:41 +08:00
|
|
|
; X64-NEXT: mulq %rdi
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: movq %rdx, %rcx
|
|
|
|
|
; X64-NEXT: addq %rbx, %rax
|
|
|
|
|
; X64-NEXT: movq %rax, %rbx
|
[DAGCombine] (uaddo X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)
Summary: This is a common pattern that arise when legalizing large integers operations. Only do it when Y + 1 cannot overflow as this would change the carry behavior of uaddo .
Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32687
llvm-svn: 301922
2017-05-02 22:15:48 +08:00
|
|
|
; X64-NEXT: adcq %rsi, %rcx
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: setb %sil
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: movq %r10, %rax
|
|
|
|
|
; X64-NEXT: mulq %rdi
|
|
|
|
|
; X64-NEXT: addq %rcx, %rax
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: movzbl %sil, %ecx
|
|
|
|
|
; X64-NEXT: adcq %rcx, %rdx
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: movq -{{[0-9]+}}(%rsp), %rsi # 8-byte Reload
|
|
|
|
|
; X64-NEXT: addq %rbp, %rsi
|
|
|
|
|
; X64-NEXT: movq -{{[0-9]+}}(%rsp), %rcx # 8-byte Reload
|
|
|
|
|
; X64-NEXT: adcq -{{[0-9]+}}(%rsp), %rcx # 8-byte Folded Reload
|
|
|
|
|
; X64-NEXT: addq %rax, %rsi
|
|
|
|
|
; X64-NEXT: adcq %rdx, %rcx
|
|
|
|
|
; X64-NEXT: addq %r11, %r12
|
|
|
|
|
; X64-NEXT: movq %r12, -{{[0-9]+}}(%rsp) # 8-byte Spill
|
|
|
|
|
; X64-NEXT: adcq %r14, %rbx
|
|
|
|
|
; X64-NEXT: movq %rbx, -{{[0-9]+}}(%rsp) # 8-byte Spill
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: movzbl %r9b, %eax
|
|
|
|
|
; X64-NEXT: adcq %rax, %rsi
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: movq %rsi, -{{[0-9]+}}(%rsp) # 8-byte Spill
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: adcq $0, %rcx
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: movq %rcx, -{{[0-9]+}}(%rsp) # 8-byte Spill
|
2016-09-14 05:55:41 +08:00
|
|
|
; X64-NEXT: movq -{{[0-9]+}}(%rsp), %rcx # 8-byte Reload
|
|
|
|
|
; X64-NEXT: movq 32(%rcx), %rsi
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: imulq %rsi, %rdi
|
2016-09-14 05:55:41 +08:00
|
|
|
; X64-NEXT: movq %rsi, %rax
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: mulq %r8
|
[DAGCombine] (uaddo X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)
Summary: This is a common pattern that arise when legalizing large integers operations. Only do it when Y + 1 cannot overflow as this would change the carry behavior of uaddo .
Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32687
llvm-svn: 301922
2017-05-02 22:15:48 +08:00
|
|
|
; X64-NEXT: movq %rax, %r10
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: addq %rdi, %rdx
|
|
|
|
|
; X64-NEXT: movq 40(%rcx), %r9
|
|
|
|
|
; X64-NEXT: imulq %r9, %r8
|
|
|
|
|
; X64-NEXT: addq %rdx, %r8
|
2016-09-14 05:55:41 +08:00
|
|
|
; X64-NEXT: movq 48(%rcx), %rax
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: movq %rcx, %rbx
|
|
|
|
|
; X64-NEXT: movq %rax, %rdi
|
|
|
|
|
; X64-NEXT: movq -{{[0-9]+}}(%rsp), %rcx # 8-byte Reload
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: imulq %rcx, %rdi
|
|
|
|
|
; X64-NEXT: movq -{{[0-9]+}}(%rsp), %rbp # 8-byte Reload
|
|
|
|
|
; X64-NEXT: mulq %rbp
|
|
|
|
|
; X64-NEXT: movq %rax, %r14
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: addq %rdi, %rdx
|
|
|
|
|
; X64-NEXT: movq 56(%rbx), %rbx
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: imulq %rbp, %rbx
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: addq %rdx, %rbx
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: addq %r10, %r14
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: adcq %r8, %rbx
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: movq %rbp, %rax
|
|
|
|
|
; X64-NEXT: movq %rbp, %r10
|
2016-09-14 05:55:41 +08:00
|
|
|
; X64-NEXT: mulq %rsi
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: movq %rdx, %rdi
|
|
|
|
|
; X64-NEXT: movq %rax, -{{[0-9]+}}(%rsp) # 8-byte Spill
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: movq %rcx, %rax
|
|
|
|
|
; X64-NEXT: movq %rcx, %r8
|
2016-09-14 05:55:41 +08:00
|
|
|
; X64-NEXT: mulq %rsi
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: movq %rdx, %rsi
|
|
|
|
|
; X64-NEXT: movq %rax, %rbp
|
|
|
|
|
; X64-NEXT: addq %rdi, %rbp
|
|
|
|
|
; X64-NEXT: adcq $0, %rsi
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: movq %r10, %rax
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: mulq %r9
|
|
|
|
|
; X64-NEXT: movq %rdx, %rdi
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: movq %rax, %r13
|
|
|
|
|
; X64-NEXT: addq %rbp, %r13
|
[DAGCombine] (uaddo X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)
Summary: This is a common pattern that arise when legalizing large integers operations. Only do it when Y + 1 cannot overflow as this would change the carry behavior of uaddo .
Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32687
llvm-svn: 301922
2017-05-02 22:15:48 +08:00
|
|
|
; X64-NEXT: adcq %rsi, %rdi
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: setb %cl
|
|
|
|
|
; X64-NEXT: movq %r8, %rax
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: mulq %r9
|
[DAGCombine] (uaddo X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)
Summary: This is a common pattern that arise when legalizing large integers operations. Only do it when Y + 1 cannot overflow as this would change the carry behavior of uaddo .
Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32687
llvm-svn: 301922
2017-05-02 22:15:48 +08:00
|
|
|
; X64-NEXT: movq %rdx, %r11
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: movq %rax, %r9
|
|
|
|
|
; X64-NEXT: addq %rdi, %r9
|
|
|
|
|
; X64-NEXT: movzbl %cl, %eax
|
|
|
|
|
; X64-NEXT: adcq %rax, %r11
|
|
|
|
|
; X64-NEXT: addq %r14, %r9
|
[DAGCombine] (uaddo X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)
Summary: This is a common pattern that arise when legalizing large integers operations. Only do it when Y + 1 cannot overflow as this would change the carry behavior of uaddo .
Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32687
llvm-svn: 301922
2017-05-02 22:15:48 +08:00
|
|
|
; X64-NEXT: adcq %rbx, %r11
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: movq -{{[0-9]+}}(%rsp), %rdx # 8-byte Reload
|
|
|
|
|
; X64-NEXT: movq 56(%rdx), %rcx
|
[DAGCombine] (uaddo X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)
Summary: This is a common pattern that arise when legalizing large integers operations. Only do it when Y + 1 cannot overflow as this would change the carry behavior of uaddo .
Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32687
llvm-svn: 301922
2017-05-02 22:15:48 +08:00
|
|
|
; X64-NEXT: movq -{{[0-9]+}}(%rsp), %r10 # 8-byte Reload
|
|
|
|
|
; X64-NEXT: imulq %r10, %rcx
|
|
|
|
|
; X64-NEXT: movq 48(%rdx), %rbx
|
|
|
|
|
; X64-NEXT: movq %rdx, %rbp
|
|
|
|
|
; X64-NEXT: movq %r10, %rax
|
|
|
|
|
; X64-NEXT: mulq %rbx
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: movq %rax, %rsi
|
|
|
|
|
; X64-NEXT: addq %rcx, %rdx
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: movq -{{[0-9]+}}(%rsp), %r15 # 8-byte Reload
|
|
|
|
|
; X64-NEXT: imulq %r15, %rbx
|
[DAGCombine] (uaddo X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)
Summary: This is a common pattern that arise when legalizing large integers operations. Only do it when Y + 1 cannot overflow as this would change the carry behavior of uaddo .
Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32687
llvm-svn: 301922
2017-05-02 22:15:48 +08:00
|
|
|
; X64-NEXT: addq %rdx, %rbx
|
|
|
|
|
; X64-NEXT: movq 32(%rbp), %rdi
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: movq 40(%rbp), %r8
|
2016-09-14 05:55:41 +08:00
|
|
|
; X64-NEXT: movq -{{[0-9]+}}(%rsp), %rax # 8-byte Reload
|
|
|
|
|
; X64-NEXT: movq %rax, %rcx
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: imulq %r8, %rcx
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: mulq %rdi
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: movq %rax, %r14
|
2016-09-14 05:55:41 +08:00
|
|
|
; X64-NEXT: addq %rcx, %rdx
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: movq -{{[0-9]+}}(%rsp), %rax # 8-byte Reload
|
|
|
|
|
; X64-NEXT: imulq %rdi, %rax
|
|
|
|
|
; X64-NEXT: addq %rdx, %rax
|
|
|
|
|
; X64-NEXT: addq %rsi, %r14
|
|
|
|
|
; X64-NEXT: adcq %rbx, %rax
|
|
|
|
|
; X64-NEXT: movq %rax, -{{[0-9]+}}(%rsp) # 8-byte Spill
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: movq %rdi, %rax
|
[DAGCombine] (uaddo X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)
Summary: This is a common pattern that arise when legalizing large integers operations. Only do it when Y + 1 cannot overflow as this would change the carry behavior of uaddo .
Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32687
llvm-svn: 301922
2017-05-02 22:15:48 +08:00
|
|
|
; X64-NEXT: mulq %r10
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: movq %rdx, %r12
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: movq %rax, %rsi
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: movq %r8, %rax
|
[DAGCombine] (uaddo X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)
Summary: This is a common pattern that arise when legalizing large integers operations. Only do it when Y + 1 cannot overflow as this would change the carry behavior of uaddo .
Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32687
llvm-svn: 301922
2017-05-02 22:15:48 +08:00
|
|
|
; X64-NEXT: mulq %r10
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: movq %rdx, %rcx
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: movq %rax, %rbx
|
|
|
|
|
; X64-NEXT: addq %r12, %rbx
|
|
|
|
|
; X64-NEXT: adcq $0, %rcx
|
|
|
|
|
; X64-NEXT: movq %rdi, %rax
|
|
|
|
|
; X64-NEXT: mulq %r15
|
|
|
|
|
; X64-NEXT: movq %rdx, %rbp
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: movq %rax, %rdi
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: addq %rbx, %rdi
|
|
|
|
|
; X64-NEXT: adcq %rcx, %rbp
|
|
|
|
|
; X64-NEXT: setb %cl
|
|
|
|
|
; X64-NEXT: movq %r8, %rax
|
|
|
|
|
; X64-NEXT: mulq %r15
|
|
|
|
|
; X64-NEXT: addq %rbp, %rax
|
|
|
|
|
; X64-NEXT: movzbl %cl, %ecx
|
|
|
|
|
; X64-NEXT: adcq %rcx, %rdx
|
|
|
|
|
; X64-NEXT: addq %r14, %rax
|
|
|
|
|
; X64-NEXT: adcq -{{[0-9]+}}(%rsp), %rdx # 8-byte Folded Reload
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: addq -{{[0-9]+}}(%rsp), %rsi # 8-byte Folded Reload
|
2017-05-20 02:20:44 +08:00
|
|
|
; X64-NEXT: adcq %r13, %rdi
|
|
|
|
|
; X64-NEXT: adcq %r9, %rax
|
[DAGCombine] (uaddo X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)
Summary: This is a common pattern that arise when legalizing large integers operations. Only do it when Y + 1 cannot overflow as this would change the carry behavior of uaddo .
Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32687
llvm-svn: 301922
2017-05-02 22:15:48 +08:00
|
|
|
; X64-NEXT: adcq %r11, %rdx
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: addq -{{[0-9]+}}(%rsp), %rsi # 8-byte Folded Reload
|
|
|
|
|
; X64-NEXT: adcq -{{[0-9]+}}(%rsp), %rdi # 8-byte Folded Reload
|
2016-09-14 05:55:41 +08:00
|
|
|
; X64-NEXT: adcq -{{[0-9]+}}(%rsp), %rax # 8-byte Folded Reload
|
|
|
|
|
; X64-NEXT: adcq -{{[0-9]+}}(%rsp), %rdx # 8-byte Folded Reload
|
2016-11-16 02:29:24 +08:00
|
|
|
; X64-NEXT: movq (%rsp), %rcx # 8-byte Reload
|
|
|
|
|
; X64-NEXT: movq -{{[0-9]+}}(%rsp), %rbp # 8-byte Reload
|
|
|
|
|
; X64-NEXT: movq %rbp, (%rcx)
|
|
|
|
|
; X64-NEXT: movq -{{[0-9]+}}(%rsp), %rbp # 8-byte Reload
|
|
|
|
|
; X64-NEXT: movq %rbp, 8(%rcx)
|
|
|
|
|
; X64-NEXT: movq -{{[0-9]+}}(%rsp), %rbp # 8-byte Reload
|
|
|
|
|
; X64-NEXT: movq %rbp, 16(%rcx)
|
|
|
|
|
; X64-NEXT: movq -{{[0-9]+}}(%rsp), %rbp # 8-byte Reload
|
|
|
|
|
; X64-NEXT: movq %rbp, 24(%rcx)
|
|
|
|
|
; X64-NEXT: movq %rsi, 32(%rcx)
|
|
|
|
|
; X64-NEXT: movq %rdi, 40(%rcx)
|
|
|
|
|
; X64-NEXT: movq %rax, 48(%rcx)
|
|
|
|
|
; X64-NEXT: movq %rdx, 56(%rcx)
|
|
|
|
|
; X64-NEXT: addq $8, %rsp
|
2016-09-14 05:55:41 +08:00
|
|
|
; X64-NEXT: popq %rbx
|
|
|
|
|
; X64-NEXT: popq %r12
|
|
|
|
|
; X64-NEXT: popq %r13
|
|
|
|
|
; X64-NEXT: popq %r14
|
|
|
|
|
; X64-NEXT: popq %r15
|
|
|
|
|
; X64-NEXT: popq %rbp
|
|
|
|
|
; X64-NEXT: retq
|
|
|
|
|
%av = load i512, i512* %a
|
|
|
|
|
%bv = load i512, i512* %b
|
|
|
|
|
%r = mul i512 %av, %bv
|
|
|
|
|
store i512 %r, i512* %out
|
|
|
|
|
ret void
|
|
|
|
|
}
|
