2012-02-18 20:03:15 +08:00
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//===- HexagonSchedule.td - Hexagon Scheduling Definitions -*- tablegen -*-===//
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2011-12-13 05:14:40 +08:00
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//
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2019-01-19 16:50:56 +08:00
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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2011-12-13 05:14:40 +08:00
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//
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//===----------------------------------------------------------------------===//
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2017-05-04 04:10:36 +08:00
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def Hex_FWD : Bypass;
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def HVX_FWD : Bypass;
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// Functional Units.
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def SLOT0 : FuncUnit;
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def SLOT1 : FuncUnit;
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def SLOT2 : FuncUnit;
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def SLOT3 : FuncUnit;
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// Endloop is a pseudo instruction that is encoded with 2 bits in a packet
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// rather than taking an execution slot. This special unit is needed
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// to schedule an ENDLOOP with 4 other instructions.
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def SLOT_ENDLOOP: FuncUnit;
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// CVI pipes from the "Hexagon Multimedia Co-Processor Extensions Arch Spec".
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def CVI_ST : FuncUnit;
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def CVI_XLANE : FuncUnit;
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def CVI_SHIFT : FuncUnit;
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def CVI_MPY0 : FuncUnit;
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def CVI_MPY1 : FuncUnit;
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def CVI_LD : FuncUnit;
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2018-12-06 05:01:07 +08:00
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def CVI_ZW : FuncUnit; // Z register write port
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2017-05-04 04:10:36 +08:00
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// Combined functional units.
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def CVI_XLSHF : FuncUnit;
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def CVI_MPY01 : FuncUnit;
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def CVI_ALL : FuncUnit;
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def CVI_ALL_NOMEM : FuncUnit;
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// Combined functional unit data.
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def HexagonComboFuncsV60 :
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ComboFuncUnits<[
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ComboFuncData<CVI_XLSHF , [CVI_XLANE, CVI_SHIFT]>,
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ComboFuncData<CVI_MPY01 , [CVI_MPY0, CVI_MPY1]>,
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ComboFuncData<CVI_ALL , [CVI_ST, CVI_XLANE, CVI_SHIFT,
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CVI_MPY0, CVI_MPY1, CVI_LD]>,
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ComboFuncData<CVI_ALL_NOMEM, [CVI_XLANE, CVI_SHIFT, CVI_MPY0, CVI_MPY1]>
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]>;
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// Itinerary classes.
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def PSEUDO : InstrItinClass;
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def PSEUDOM : InstrItinClass;
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def DUPLEX : InstrItinClass;
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def tc_ENDLOOP : InstrItinClass;
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//===----------------------------------------------------------------------===//
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// Auto-generated itinerary classes
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//===----------------------------------------------------------------------===//
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include "HexagonDepIICScalar.td"
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include "HexagonDepIICHVX.td"
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2011-12-13 05:14:40 +08:00
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//===----------------------------------------------------------------------===//
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2018-10-20 01:31:11 +08:00
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// V5 Machine Info +
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2011-12-13 05:14:40 +08:00
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//===----------------------------------------------------------------------===//
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2018-10-20 01:31:11 +08:00
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include "HexagonScheduleV5.td"
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2011-12-13 05:14:40 +08:00
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2015-10-17 09:33:04 +08:00
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// V55 Machine Info +
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include "HexagonScheduleV55.td"
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2011-12-13 05:14:40 +08:00
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//===----------------------------------------------------------------------===//
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2015-11-23 22:09:26 +08:00
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// V60 Machine Info -
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2011-12-13 05:14:40 +08:00
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//===----------------------------------------------------------------------===//
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2015-10-17 09:33:04 +08:00
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2017-02-11 07:46:45 +08:00
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include "HexagonIICScalar.td"
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include "HexagonIICHVX.td"
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2017-05-04 04:10:36 +08:00
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include "HexagonScheduleV60.td"
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2017-02-11 07:46:45 +08:00
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//===----------------------------------------------------------------------===//
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// V62 Machine Info +
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//===----------------------------------------------------------------------===//
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include "HexagonScheduleV62.td"
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2017-12-12 02:57:54 +08:00
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//===----------------------------------------------------------------------===//
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// V65 Machine Info +
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//===----------------------------------------------------------------------===//
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include "HexagonScheduleV65.td"
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2018-12-06 05:01:07 +08:00
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//===----------------------------------------------------------------------===//
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// V66 Machine Info +
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//===----------------------------------------------------------------------===//
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include "HexagonScheduleV66.td"
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