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llvm-project/llvm/test/CodeGen/Mips/micromips-rdhwr-directives.ll

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[mips][microMIPS] Implement SDBBP and RDHWR instructions. Differential Revision: http://reviews.llvm.org/D5240 llvm-svn: 222347
2014-11-19 19:25:50 +08:00
; RUN: llc -march=mipsel -mcpu=mips32 -relocation-model=static < %s \
; RUN: -mattr=+micromips | FileCheck %s
@a = external thread_local global i32
define i32 @foo() nounwind readonly {
entry:
; CHECK: .set push
; CHECK: .set mips32r2
; CHECK: rdhwr
; CHECK: .set pop
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load i32, i32* @a, align 4
[mips][microMIPS] Implement SDBBP and RDHWR instructions. Differential Revision: http://reviews.llvm.org/D5240 llvm-svn: 222347
2014-11-19 19:25:50 +08:00
ret i32 %0
}