maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
llvm-project/llvm/test/Transforms/IndVarSimplify/pr22222.ll

47 lines
1.6 KiB
LLVM
Raw Normal View History

Fix PR22222 The bug was introduced in r225282. r225282 assumed that sub X, Y is the same as add X, -Y. This is not correct if we are going to upgrade the sub to sub nuw. This change fixes the issue by making the optimization ignore sub instructions. Differential Revision: http://reviews.llvm.org/D6979 llvm-svn: 226075
2015-01-15 09:46:09 +08:00
; RUN: opt -indvars -S < %s | FileCheck %s
@b = common global i32 0, align 4
@c = common global i32 0, align 4
@a = common global i32 0, align 4
declare void @abort() #1
; Function Attrs: nounwind ssp uwtable
define i32 @main() {
entry:
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%a.promoted13 = load i32, i32* @a, align 4
Fix PR22222 The bug was introduced in r225282. r225282 assumed that sub X, Y is the same as add X, -Y. This is not correct if we are going to upgrade the sub to sub nuw. This change fixes the issue by making the optimization ignore sub instructions. Differential Revision: http://reviews.llvm.org/D6979 llvm-svn: 226075
2015-01-15 09:46:09 +08:00
br label %for.cond1.preheader
for.cond1.preheader: ; preds = %entry, %for.end
%or.lcssa14 = phi i32 [ %a.promoted13, %entry ], [ %or.lcssa, %for.end ]
%d.010 = phi i32 [ 1, %entry ], [ 0, %for.end ]
br label %for.body3
for.body3: ; preds = %for.cond1.preheader, %for.body3
%inc12 = phi i32 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
%or11 = phi i32 [ %or.lcssa14, %for.cond1.preheader ], [ %or, %for.body3 ]
; CHECK-NOT: sub nuw i32 %inc12, %d.010
; CHECK: sub i32 %inc12, %d.010
%add = sub i32 %inc12, %d.010
%or = or i32 %or11, %add
%inc = add i32 %inc12, 1
br i1 false, label %for.body3, label %for.end
for.end: ; preds = %for.body3
%or.lcssa = phi i32 [ %or, %for.body3 ]
br i1 false, label %for.cond1.preheader, label %for.end6
for.end6: ; preds = %for.end
%or.lcssa.lcssa = phi i32 [ %or.lcssa, %for.end ]
store i32 %or.lcssa.lcssa, i32* @a, align 4
%cmp7 = icmp eq i32 %or.lcssa.lcssa, -1
br i1 %cmp7, label %if.end, label %if.then
if.then: ; preds = %for.end6
tail call void @abort() #2
unreachable
if.end: ; preds = %for.end6
ret i32 0
}