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llvm-project/lld/test/ELF/riscv-pcrel-hilo.s

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[RISCV] Rewrite tests to use llvm-mc/llvm-objdump Previously the tests in lld for RISC-V were given in yaml format as LLVM's RISC-V assembler support was incomplete. Now that the assembler/disassembler has matured we can rewrite all tests to use LLVM's tools. Differential Revision: https://reviews.llvm.org/D60415 llvm-svn: 357996
2019-04-09 19:39:50 +08:00
# REQUIRES: riscv
# RUN: llvm-mc -filetype=obj -triple=riscv32-unknown-elf -mattr=-relax %s -o %t.rv32.o
# RUN: llvm-mc -filetype=obj -triple=riscv64-unknown-elf -mattr=-relax %s -o %t.rv64.o
# RUN: ld.lld %t.rv32.o --defsym foo=_start+12 --defsym bar=_start -o %t.rv32
# RUN: ld.lld %t.rv64.o --defsym foo=_start+12 --defsym bar=_start -o %t.rv64
[ELF][RISCV] Add R_RISCV_PC_INDIRECT to isRelExpr() So that R_RISCV_PCREL_LO12_[IS] are considered as link-time constants in -pie mode, otherwise there are bogus errors: ld.lld: error: can't create dynamic relocation R_RISCV_PCREL_LO12_I against symbol: .L0 in readonly segment; recompile object files with -fPIC or pass '-Wl,-z,notext' to allow text relocations in the output Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D63123 llvm-svn: 363064
2019-06-11 21:39:08 +08:00
# RUN: llvm-objdump -d --no-show-raw-insn %t.rv32 | FileCheck %s
# RUN: llvm-objdump -d --no-show-raw-insn %t.rv64 | FileCheck %s
# RUN: ld.lld -pie %t.rv32.o --defsym foo=_start+12 --defsym bar=_start -o %t.rv32
# RUN: ld.lld -pie %t.rv64.o --defsym foo=_start+12 --defsym bar=_start -o %t.rv64
# RUN: llvm-objdump -d --no-show-raw-insn %t.rv32 | FileCheck %s
# RUN: llvm-objdump -d --no-show-raw-insn %t.rv64 | FileCheck %s
# CHECK: auipc a0, 0
# CHECK-NEXT: addi a0, a0, 12
# CHECK-NEXT: sw zero, 12(a0)
# CHECK: auipc a0, 0
# CHECK-NEXT: addi a0, a0, -12
# CHECK-NEXT: sw zero, -12(a0)
[RISCV] Rewrite tests to use llvm-mc/llvm-objdump Previously the tests in lld for RISC-V were given in yaml format as LLVM's RISC-V assembler support was incomplete. Now that the assembler/disassembler has matured we can rewrite all tests to use LLVM's tools. Differential Revision: https://reviews.llvm.org/D60415 llvm-svn: 357996
2019-04-09 19:39:50 +08:00
# RUN: ld.lld %t.rv32.o --defsym foo=_start+0x7ffff7ff --defsym bar=_start+12-0x80000800 -o %t.rv32.limits
# RUN: ld.lld %t.rv64.o --defsym foo=_start+0x7ffff7ff --defsym bar=_start+12-0x80000800 -o %t.rv64.limits
[ELF][RISCV] Add R_RISCV_PC_INDIRECT to isRelExpr() So that R_RISCV_PCREL_LO12_[IS] are considered as link-time constants in -pie mode, otherwise there are bogus errors: ld.lld: error: can't create dynamic relocation R_RISCV_PCREL_LO12_I against symbol: .L0 in readonly segment; recompile object files with -fPIC or pass '-Wl,-z,notext' to allow text relocations in the output Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D63123 llvm-svn: 363064
2019-06-11 21:39:08 +08:00
# RUN: llvm-objdump -d --no-show-raw-insn %t.rv32.limits | FileCheck --check-prefix=LIMITS %s
# RUN: llvm-objdump -d --no-show-raw-insn %t.rv64.limits | FileCheck --check-prefix=LIMITS %s
# LIMITS: auipc a0, 524287
# LIMITS-NEXT: addi a0, a0, 2047
# LIMITS-NEXT: sw zero, 2047(a0)
# LIMITS: auipc a0, 524288
# LIMITS-NEXT: addi a0, a0, -2048
# LIMITS-NEXT: sw zero, -2048(a0)
[RISCV] Rewrite tests to use llvm-mc/llvm-objdump Previously the tests in lld for RISC-V were given in yaml format as LLVM's RISC-V assembler support was incomplete. Now that the assembler/disassembler has matured we can rewrite all tests to use LLVM's tools. Differential Revision: https://reviews.llvm.org/D60415 llvm-svn: 357996
2019-04-09 19:39:50 +08:00
# RUN: ld.lld %t.rv32.o --defsym foo=_start+0x7ffff800 --defsym bar=_start+12-0x80000801 -o %t
# RUN: not ld.lld %t.rv64.o --defsym foo=_start+0x7ffff800 --defsym bar=_start+12-0x80000801 -o %t 2>&1 | FileCheck --check-prefix=ERROR %s
# ERROR: relocation R_RISCV_PCREL_HI20 out of range: 524288 is not in [-524288, 524287]
# ERROR-NEXT: relocation R_RISCV_PCREL_HI20 out of range: -524289 is not in [-524288, 524287]
.global _start
_start:
auipc a0, %pcrel_hi(foo)
addi a0, a0, %pcrel_lo(_start)
sw x0, %pcrel_lo(_start)(a0)
.L1:
auipc a0, %pcrel_hi(bar)
addi a0, a0, %pcrel_lo(.L1)
sw x0, %pcrel_lo(.L1)(a0)