forked from OSchip/llvm-project
32 lines
1.1 KiB
ArmAsm
32 lines
1.1 KiB
ArmAsm
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# REQUIRES: aarch64
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# RUN: llvm-mc -filetype=obj -triple=aarch64 %s -o %t.o
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# RUN: ld.lld %t.o -o %t
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# RUN: llvm-readelf -S -l %t | FileCheck --check-prefix=SEC %s
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# RUN: llvm-objdump -d %t | FileCheck --check-prefix=DIS %s
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# SEC: Name Type Address Off Size ES Flg Lk Inf Al
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# SEC: .tdata PROGBITS 0000000000220200 000200 000001 00 WAT 0 0 1
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# SEC: .tbss NOBITS 0000000000220300 000201 000008 00 WAT 0 0 256
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# SEC: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align
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# SEC: TLS 0x000200 0x0000000000220200 0x0000000000220200 0x000001 0x000108 R 0x100
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## We currently have a hack in Writer.cpp:fixSectionAlignments() to force
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## p_vaddr(PT_TLS)%p_align(PT_TLS)=0, to work around bugs in some dynamic loaders.
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## a@tprel = st_value(a) + GAP + (p_vaddr-GAP_ABOVE_TP & p_align-1) =
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## .tbss-.tdata + 16 + GAP_ABOVE_TP + (p_vaddr-GAP_ABOVE_TP & p_align-1) =
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## 0x220300-0x220200 + 16 + (0x220200-16 & 0x100-1) = 512
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# DIS: add x0, x0, #512
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add x0, x0, :tprel_lo12_nc:a
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.section .tdata,"awT"
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.byte 0
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.section .tbss,"awT"
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.p2align 8
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a:
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.quad 0
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