2017-04-26 20:23:32 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE-32
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE-64
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX-32
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX-64
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define void @PR15298(<4 x float>* nocapture %source, <8 x float>* nocapture %dest) nounwind noinline {
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; SSE-32-LABEL: PR15298:
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; SSE-32: # BB#0: # %L.entry
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; SSE-32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; SSE-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; SSE-32-NEXT: movaps 304(%ecx), %xmm0
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; SSE-32-NEXT: xorps %xmm1, %xmm1
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; SSE-32-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,1]
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; SSE-32-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0,1,3]
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; SSE-32-NEXT: movups %xmm1, 624(%eax)
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; SSE-32-NEXT: movups %xmm0, 608(%eax)
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; SSE-32-NEXT: retl
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;
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; SSE-64-LABEL: PR15298:
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; SSE-64: # BB#0: # %L.entry
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; SSE-64-NEXT: movaps 304(%rdi), %xmm0
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; SSE-64-NEXT: xorps %xmm1, %xmm1
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; SSE-64-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,1]
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; SSE-64-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0,1,3]
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; SSE-64-NEXT: movups %xmm1, 624(%rsi)
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; SSE-64-NEXT: movups %xmm0, 608(%rsi)
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; SSE-64-NEXT: retq
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;
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; AVX-32-LABEL: PR15298:
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; AVX-32: # BB#0: # %L.entry
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; AVX-32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; AVX-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; AVX-32-NEXT: vbroadcastss 304(%ecx), %xmm0
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2017-07-28 01:47:01 +08:00
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; AVX-32-NEXT: vxorps %xmm1, %xmm1, %xmm1
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2017-04-26 20:23:32 +08:00
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; AVX-32-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0],ymm0[1,2],ymm1[3,4,5,6,7]
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; AVX-32-NEXT: vmovups %ymm0, 608(%eax)
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; AVX-32-NEXT: vzeroupper
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; AVX-32-NEXT: retl
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;
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; AVX-64-LABEL: PR15298:
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; AVX-64: # BB#0: # %L.entry
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; AVX-64-NEXT: vbroadcastss 304(%rdi), %xmm0
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2017-07-28 01:47:01 +08:00
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; AVX-64-NEXT: vxorps %xmm1, %xmm1, %xmm1
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2017-04-26 20:23:32 +08:00
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; AVX-64-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0],ymm0[1,2],ymm1[3,4,5,6,7]
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; AVX-64-NEXT: vmovups %ymm0, 608(%rsi)
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; AVX-64-NEXT: vzeroupper
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; AVX-64-NEXT: retq
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L.entry:
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%0 = getelementptr inbounds <4 x float>, <4 x float>* %source, i32 19
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%1 = load <4 x float>, <4 x float>* %0, align 16
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%2 = extractelement <4 x float> %1, i32 0
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%3 = insertelement <8 x float> <float 0.000000e+00, float undef, float undef, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00>, float %2, i32 2
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%4 = insertelement <8 x float> %3, float %2, i32 1
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%5 = getelementptr <8 x float>, <8 x float>* %dest, i32 19
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store <8 x float> %4, <8 x float>* %5, align 4
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ret void
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}
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