maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
llvm-project/llvm/test/CodeGen/X86/inline-asm-fpstack.ll

522 lines
18 KiB
LLVM
Raw Normal View History

[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
Updated test with -verify-machineinstrs to check for PR21931 llvm-svn: 288242
2016-11-30 21:21:12 +08:00
; RUN: llc < %s -mcpu=generic -mtriple=i386-apple-darwin -verify-machineinstrs -no-integrated-as | FileCheck %s
Add ScheduleDAG support for copytoreg where the src/dst register are in different register classes, e.g. copy of ST(0) to RFP*. This gets some really trivial inline asm working that plops things on the top of stack (PR879) llvm-svn: 48105
2008-03-09 16:49:15 +08:00
FileCheckize inline asm FP stack tests llvm-svn: 108046
2010-07-11 00:30:25 +08:00
; There should be no stack manipulations between the inline asm and ret.
Add ScheduleDAG support for copytoreg where the src/dst register are in different register classes, e.g. copy of ST(0) to RFP*. This gets some really trivial inline asm working that plops things on the top of stack (PR879) llvm-svn: 48105
2008-03-09 16:49:15 +08:00
define x86_fp80 @test1() {
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
; CHECK-LABEL: test1:
; CHECK: ## BB#0:
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: fld0
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: retl
%tmp85 = call x86_fp80 asm sideeffect "fld0", "={st(0)}"()
ret x86_fp80 %tmp85
Add ScheduleDAG support for copytoreg where the src/dst register are in different register classes, e.g. copy of ST(0) to RFP*. This gets some really trivial inline asm working that plops things on the top of stack (PR879) llvm-svn: 48105
2008-03-09 16:49:15 +08:00
}
define double @test2() {
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
; CHECK-LABEL: test2:
; CHECK: ## BB#0:
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: fld0
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: retl
%tmp85 = call double asm sideeffect "fld0", "={st(0)}"()
ret double %tmp85
Add ScheduleDAG support for copytoreg where the src/dst register are in different register classes, e.g. copy of ST(0) to RFP*. This gets some really trivial inline asm working that plops things on the top of stack (PR879) llvm-svn: 48105
2008-03-09 16:49:15 +08:00
}
FileCheckize inline asm FP stack tests llvm-svn: 108046
2010-07-11 00:30:25 +08:00
; Setting up argument in st(0) should be a single fld.
; Asm consumes stack, nothing should be popped.
teach X86InstrInfo::copyRegToReg how to copy into ST(0) from an RFP register class. Teach ScheduleDAG how to handle CopyToReg with different src/dst reg classes. This allows us to compile trivial inline asms that expect stuff on the top of x87-fp stack. llvm-svn: 48107
2008-03-09 17:15:31 +08:00
define void @test3(x86_fp80 %X) {
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
; CHECK-LABEL: test3:
; CHECK: ## BB#0:
; CHECK-NEXT: fldt {{[0-9]+}}(%esp)
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: frob
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: retl
call void asm sideeffect "frob ", "{st(0)},~{st},~{dirflag},~{fpsr},~{flags}"( x86_fp80 %X)
ret void
teach X86InstrInfo::copyRegToReg how to copy into ST(0) from an RFP register class. Teach ScheduleDAG how to handle CopyToReg with different src/dst reg classes. This allows us to compile trivial inline asms that expect stuff on the top of x87-fp stack. llvm-svn: 48107
2008-03-09 17:15:31 +08:00
}
define void @test4(double %X) {
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
; CHECK-LABEL: test4:
; CHECK: ## BB#0:
; CHECK-NEXT: fldl {{[0-9]+}}(%esp)
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: frob
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: retl
call void asm sideeffect "frob ", "{st(0)},~{st},~{dirflag},~{fpsr},~{flags}"( double %X)
ret void
teach X86InstrInfo::copyRegToReg how to copy into ST(0) from an RFP register class. Teach ScheduleDAG how to handle CopyToReg with different src/dst reg classes. This allows us to compile trivial inline asms that expect stuff on the top of x87-fp stack. llvm-svn: 48107
2008-03-09 17:15:31 +08:00
}
FileCheckize inline asm FP stack tests llvm-svn: 108046
2010-07-11 00:30:25 +08:00
; Same as test3/4, but using value from fadd.
; The fadd can be done in xmm or x87 regs - we don't test that.
teach X86InstrInfo::copyRegToReg how to copy into ST(0) from an RFP register class. Teach ScheduleDAG how to handle CopyToReg with different src/dst reg classes. This allows us to compile trivial inline asms that expect stuff on the top of x87-fp stack. llvm-svn: 48107
2008-03-09 17:15:31 +08:00
define void @test5(double %X) {
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
; CHECK-LABEL: test5:
; CHECK: ## BB#0:
; CHECK-NEXT: fldl {{[0-9]+}}(%esp)
; CHECK-NEXT: fadds LCPI4_0
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: frob
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: retl
%Y = fadd double %X, 123.0
call void asm sideeffect "frob ", "{st(0)},~{st},~{dirflag},~{fpsr},~{flags}"( double %Y)
ret void
teach X86InstrInfo::copyRegToReg how to copy into ST(0) from an RFP register class. Teach ScheduleDAG how to handle CopyToReg with different src/dst reg classes. This allows us to compile trivial inline asms that expect stuff on the top of x87-fp stack. llvm-svn: 48107
2008-03-09 17:15:31 +08:00
}
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
define void @test6(double %A, double %B, double %C, double %D, double %E) nounwind {
; CHECK-LABEL: test6:
; CHECK: ## BB#0: ## %entry
; CHECK-NEXT: fldl {{[0-9]+}}(%esp)
; CHECK-NEXT: fldl {{[0-9]+}}(%esp)
; CHECK-NEXT: fldl {{[0-9]+}}(%esp)
; CHECK-NEXT: fldl {{[0-9]+}}(%esp)
; CHECK-NEXT: fldl {{[0-9]+}}(%esp)
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: foo %st(0) %st(0)
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: fstp %st(0)
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: bar %st(1) %st(0)
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: fstp %st(1)
; CHECK-NEXT: fstp %st(0)
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: baz %st(1) %st(0)
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: fstp %st(0)
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: baz %st(0)
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: fstp %st(0)
; CHECK-NEXT: retl
; CHECK-NEXT: ## -- End function
Implement basic support for the 'f' register class constraint. This basically works, but probably won't if you mix it with 't' or 'u' yet. llvm-svn: 48243
2008-03-12 03:50:13 +08:00
entry:
FileCheckize inline asm FP stack tests llvm-svn: 108046
2010-07-11 00:30:25 +08:00
; Uses the same value twice, should have one fstp after the asm.
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
tail call void asm sideeffect "foo $0 $1", "f,f,~{dirflag},~{fpsr},~{flags}"( double %A, double %A ) nounwind
FileCheckize inline asm FP stack tests llvm-svn: 108046
2010-07-11 00:30:25 +08:00
; Uses two different values, should be in st(0)/st(1) and both be popped.
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
tail call void asm sideeffect "bar $0 $1", "f,f,~{dirflag},~{fpsr},~{flags}"( double %B, double %C ) nounwind
; Uses two different values, one of which isn't killed in this asm, it should not be popped after the asm.
tail call void asm sideeffect "baz $0 $1", "f,f,~{dirflag},~{fpsr},~{flags}"( double %D, double %E ) nounwind
FileCheckize inline asm FP stack tests llvm-svn: 108046
2010-07-11 00:30:25 +08:00
; This is the last use of %D, so it should be popped after.
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
tail call void asm sideeffect "baz $0", "f,~{dirflag},~{fpsr},~{flags}"( double %D ) nounwind
ret void
Implement basic support for the 'f' register class constraint. This basically works, but probably won't if you mix it with 't' or 'u' yet. llvm-svn: 48243
2008-03-12 03:50:13 +08:00
}
Add ScheduleDAG support for copytoreg where the src/dst register are in different register classes, e.g. copy of ST(0) to RFP*. This gets some really trivial inline asm working that plops things on the top of stack (PR879) llvm-svn: 48105
2008-03-09 16:49:15 +08:00
Move all inline-asm-fpstack tests to a single file. Also fix some of the tests that were actually testing wrong behavior - An input operand in {st} is only popped by the inline asm when {st} is also in the clobber list. The original bug reports all had ~{st} clobbers as they should. llvm-svn: 133916
2011-06-28 01:27:37 +08:00
; PR4185
; Passing a non-killed value to asm in {st}.
; Make sure it is duped before.
; asm kills st(0), so we shouldn't pop anything
; A valid alternative would be to remat the constant pool load before each
; inline asm.
define void @testPR4185() {
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
; CHECK-LABEL: testPR4185:
; CHECK: ## BB#0: ## %return
; CHECK-NEXT: flds LCPI6_0
; CHECK-NEXT: fld %st(0)
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: fistpl %st(0)
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: fistpl %st(0)
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: retl
Move all inline-asm-fpstack tests to a single file. Also fix some of the tests that were actually testing wrong behavior - An input operand in {st} is only popped by the inline asm when {st} is also in the clobber list. The original bug reports all had ~{st} clobbers as they should. llvm-svn: 133916
2011-06-28 01:27:37 +08:00
return:
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
call void asm sideeffect "fistpl $0", "{st},~{st}"(double 1.000000e+06)
call void asm sideeffect "fistpl $0", "{st},~{st}"(double 1.000000e+06)
ret void
Move all inline-asm-fpstack tests to a single file. Also fix some of the tests that were actually testing wrong behavior - An input operand in {st} is only popped by the inline asm when {st} is also in the clobber list. The original bug reports all had ~{st} clobbers as they should. llvm-svn: 133916
2011-06-28 01:27:37 +08:00
}
Clean up the handling of the x87 fp stack to make it more robust. Drop the FpMov instructions, use plain COPY instead. Drop the FpSET/GET instruction for accessing fixed stack positions. Instead use normal COPY to/from ST registers around inline assembly, and provide a single new FpPOP_RETVAL instruction that can access the return value(s) from a call. This is still necessary since you cannot tell from the CALL instruction alone if it returns anything on the FP stack. Teach fast isel to use this. This provides a much more robust way of handling fixed stack registers - we can tolerate arbitrary FP stack instructions inserted around calls and inline assembly. Live range splitting could sometimes break x87 code by inserting spill code in unfortunate places. As a bonus we handle floating point inline assembly correctly now. llvm-svn: 134018
2011-06-29 02:32:28 +08:00
; Passing a non-killed value through asm in {st}.
; Make sure it is not duped before.
; Second asm kills st(0), so we shouldn't pop anything
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
; A valid alternative would be to remat the constant pool load before each inline asm.
Clean up the handling of the x87 fp stack to make it more robust. Drop the FpMov instructions, use plain COPY instead. Drop the FpSET/GET instruction for accessing fixed stack positions. Instead use normal COPY to/from ST registers around inline assembly, and provide a single new FpPOP_RETVAL instruction that can access the return value(s) from a call. This is still necessary since you cannot tell from the CALL instruction alone if it returns anything on the FP stack. Teach fast isel to use this. This provides a much more robust way of handling fixed stack registers - we can tolerate arbitrary FP stack instructions inserted around calls and inline assembly. Live range splitting could sometimes break x87 code by inserting spill code in unfortunate places. As a bonus we handle floating point inline assembly correctly now. llvm-svn: 134018
2011-06-29 02:32:28 +08:00
define void @testPR4185b() {
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
; CHECK-LABEL: testPR4185b:
; CHECK: ## BB#0: ## %return
; CHECK-NEXT: flds LCPI7_0
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: fistl %st(0)
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: fistpl %st(0)
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: retl
Clean up the handling of the x87 fp stack to make it more robust. Drop the FpMov instructions, use plain COPY instead. Drop the FpSET/GET instruction for accessing fixed stack positions. Instead use normal COPY to/from ST registers around inline assembly, and provide a single new FpPOP_RETVAL instruction that can access the return value(s) from a call. This is still necessary since you cannot tell from the CALL instruction alone if it returns anything on the FP stack. Teach fast isel to use this. This provides a much more robust way of handling fixed stack registers - we can tolerate arbitrary FP stack instructions inserted around calls and inline assembly. Live range splitting could sometimes break x87 code by inserting spill code in unfortunate places. As a bonus we handle floating point inline assembly correctly now. llvm-svn: 134018
2011-06-29 02:32:28 +08:00
return:
call void asm sideeffect "fistl $0", "{st}"(double 1.000000e+06)
call void asm sideeffect "fistpl $0", "{st},~{st}"(double 1.000000e+06)
ret void
}
Move all inline-asm-fpstack tests to a single file. Also fix some of the tests that were actually testing wrong behavior - An input operand in {st} is only popped by the inline asm when {st} is also in the clobber list. The original bug reports all had ~{st} clobbers as they should. llvm-svn: 133916
2011-06-28 01:27:37 +08:00
; PR4459
; The return value from ceil must be duped before being consumed by asm.
define void @testPR4459(x86_fp80 %a) {
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
; CHECK-LABEL: testPR4459:
; CHECK: ## BB#0: ## %entry
; CHECK-NEXT: subl $28, %esp
; CHECK-NEXT: Lcfi0:
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: fldt {{[0-9]+}}(%esp)
; CHECK-NEXT: fstpt (%esp)
; CHECK-NEXT: calll _ceil
; CHECK-NEXT: fld %st(0)
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding" Issues addressed since original review: - Moved removal of dead instructions found by LiveIntervals::shrinkToUses() outside of loop iterating over instructions to avoid instructions being deleted while pointed to by iterator. - Fixed ARMLoadStoreOptimizer bug exposed by this change in r311907. - The pass no longer forwards COPYs to physical register uses, since doing so can break code that implicitly relies on the physical register number of the use. - The pass no longer forwards COPYs to undef uses, since doing so can break the machine verifier by creating LiveRanges that don't end on a use (since the undef operand is not considered a use). [MachineCopyPropagation] Extend pass to do COPY source forwarding This change extends MachineCopyPropagation to do COPY source forwarding. This change also extends the MachineCopyPropagation pass to be able to be run during register allocation, after physical registers have been assigned, but before the virtual registers have been re-written, which allows it to remove virtual register COPY LiveIntervals that become dead through the forwarding of all of their uses. llvm-svn: 312328
2017-09-01 22:27:20 +08:00
; CHECK-NEXT: fxch %st(1)
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: fistpl %st(0)
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: fstpt (%esp)
; CHECK-NEXT: calll _test3
; CHECK-NEXT: addl $28, %esp
; CHECK-NEXT: retl
Move all inline-asm-fpstack tests to a single file. Also fix some of the tests that were actually testing wrong behavior - An input operand in {st} is only popped by the inline asm when {st} is also in the clobber list. The original bug reports all had ~{st} clobbers as they should. llvm-svn: 133916
2011-06-28 01:27:37 +08:00
entry:
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
%0 = call x86_fp80 @ceil(x86_fp80 %a)
call void asm sideeffect "fistpl $0", "{st},~{st}"( x86_fp80 %0)
call void @test3(x86_fp80 %0 )
ret void
Move all inline-asm-fpstack tests to a single file. Also fix some of the tests that were actually testing wrong behavior - An input operand in {st} is only popped by the inline asm when {st} is also in the clobber list. The original bug reports all had ~{st} clobbers as they should. llvm-svn: 133916
2011-06-28 01:27:37 +08:00
}
declare x86_fp80 @ceil(x86_fp80)
; PR4484
; test1 leaves a value on the stack that is needed after the asm.
; Load %a from stack after ceil
; Set up call to test.
define void @testPR4484(x86_fp80 %a) {
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
; CHECK-LABEL: testPR4484:
; CHECK: ## BB#0: ## %entry
; CHECK-NEXT: subl $28, %esp
; CHECK-NEXT: Lcfi1:
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: fldt {{[0-9]+}}(%esp)
; CHECK-NEXT: fstpt {{[0-9]+}}(%esp) ## 10-byte Folded Spill
; CHECK-NEXT: calll _test1
; CHECK-NEXT: fldt {{[0-9]+}}(%esp) ## 10-byte Folded Reload
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: fistpl %st(0)
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: fstpt (%esp)
; CHECK-NEXT: calll _test3
; CHECK-NEXT: addl $28, %esp
; CHECK-NEXT: retl
Move all inline-asm-fpstack tests to a single file. Also fix some of the tests that were actually testing wrong behavior - An input operand in {st} is only popped by the inline asm when {st} is also in the clobber list. The original bug reports all had ~{st} clobbers as they should. llvm-svn: 133916
2011-06-28 01:27:37 +08:00
entry:
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
%0 = call x86_fp80 @test1()
call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %a)
call void @test3(x86_fp80 %0)
ret void
Move all inline-asm-fpstack tests to a single file. Also fix some of the tests that were actually testing wrong behavior - An input operand in {st} is only popped by the inline asm when {st} is also in the clobber list. The original bug reports all had ~{st} clobbers as they should. llvm-svn: 133916
2011-06-28 01:27:37 +08:00
}
; PR4485
define void @testPR4485(x86_fp80* %a) {
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
; CHECK-LABEL: testPR4485:
; CHECK: ## BB#0: ## %entry
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: fldt (%eax)
; CHECK-NEXT: flds LCPI10_0
; CHECK-NEXT: fmul %st(0), %st(1)
; CHECK-NEXT: flds LCPI10_1
; CHECK-NEXT: fmul %st(0), %st(2)
; CHECK-NEXT: fxch %st(2)
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: fistpl %st(0)
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: fldt (%eax)
; CHECK-NEXT: fmulp %st(1)
; CHECK-NEXT: fmulp %st(1)
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: fistpl %st(0)
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: retl
Move all inline-asm-fpstack tests to a single file. Also fix some of the tests that were actually testing wrong behavior - An input operand in {st} is only popped by the inline asm when {st} is also in the clobber list. The original bug reports all had ~{st} clobbers as they should. llvm-svn: 133916
2011-06-28 01:27:37 +08:00
entry:
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
%0 = load x86_fp80, x86_fp80* %a, align 16
%1 = fmul x86_fp80 %0, 0xK4006B400000000000000
%2 = fmul x86_fp80 %1, 0xK4012F424000000000000
tail call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %2)
%3 = load x86_fp80, x86_fp80* %a, align 16
%4 = fmul x86_fp80 %3, 0xK4006B400000000000000
%5 = fmul x86_fp80 %4, 0xK4012F424000000000000
tail call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %5)
ret void
Move all inline-asm-fpstack tests to a single file. Also fix some of the tests that were actually testing wrong behavior - An input operand in {st} is only popped by the inline asm when {st} is also in the clobber list. The original bug reports all had ~{st} clobbers as they should. llvm-svn: 133916
2011-06-28 01:27:37 +08:00
}
Clean up the handling of the x87 fp stack to make it more robust. Drop the FpMov instructions, use plain COPY instead. Drop the FpSET/GET instruction for accessing fixed stack positions. Instead use normal COPY to/from ST registers around inline assembly, and provide a single new FpPOP_RETVAL instruction that can access the return value(s) from a call. This is still necessary since you cannot tell from the CALL instruction alone if it returns anything on the FP stack. Teach fast isel to use this. This provides a much more robust way of handling fixed stack registers - we can tolerate arbitrary FP stack instructions inserted around calls and inline assembly. Live range splitting could sometimes break x87 code by inserting spill code in unfortunate places. As a bonus we handle floating point inline assembly correctly now. llvm-svn: 134018
2011-06-29 02:32:28 +08:00
; An input argument in a fixed position is implicitly popped by the asm only if
; the input argument is tied to an output register, or it is in the clobber list.
; The clobber list case is tested above.
;
; This doesn't implicitly pop the stack:
;
; void fist1(long double x, int *p) {
; asm volatile ("fistl %1" : : "t"(x), "m"(*p));
; }
define void @fist1(x86_fp80 %x, i32* %p) nounwind ssp {
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
; CHECK-LABEL: fist1:
; CHECK: ## BB#0: ## %entry
; CHECK-NEXT: fldt {{[0-9]+}}(%esp)
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: fistl (%eax)
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: fstp %st(0)
; CHECK-NEXT: retl
; CHECK-NEXT: ## -- End function
Clean up the handling of the x87 fp stack to make it more robust. Drop the FpMov instructions, use plain COPY instead. Drop the FpSET/GET instruction for accessing fixed stack positions. Instead use normal COPY to/from ST registers around inline assembly, and provide a single new FpPOP_RETVAL instruction that can access the return value(s) from a call. This is still necessary since you cannot tell from the CALL instruction alone if it returns anything on the FP stack. Teach fast isel to use this. This provides a much more robust way of handling fixed stack registers - we can tolerate arbitrary FP stack instructions inserted around calls and inline assembly. Live range splitting could sometimes break x87 code by inserting spill code in unfortunate places. As a bonus we handle floating point inline assembly correctly now. llvm-svn: 134018
2011-06-29 02:32:28 +08:00
entry:
tail call void asm sideeffect "fistl $1", "{st},*m,~{memory},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %x, i32* %p) nounwind
ret void
}
; Here, the input operand is tied to an output which means that is is
; implicitly popped (and then the output is implicitly pushed).
;
; long double fist2(long double x, int *p) {
; long double y;
; asm ("fistl %1" : "=&t"(y) : "0"(x), "m"(*p) : "memory");
; return y;
; }
define x86_fp80 @fist2(x86_fp80 %x, i32* %p) nounwind ssp {
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
; CHECK-LABEL: fist2:
; CHECK: ## BB#0: ## %entry
; CHECK-NEXT: fldt {{[0-9]+}}(%esp)
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: fistl (%eax)
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: retl
; CHECK-NEXT: ## -- End function
Clean up the handling of the x87 fp stack to make it more robust. Drop the FpMov instructions, use plain COPY instead. Drop the FpSET/GET instruction for accessing fixed stack positions. Instead use normal COPY to/from ST registers around inline assembly, and provide a single new FpPOP_RETVAL instruction that can access the return value(s) from a call. This is still necessary since you cannot tell from the CALL instruction alone if it returns anything on the FP stack. Teach fast isel to use this. This provides a much more robust way of handling fixed stack registers - we can tolerate arbitrary FP stack instructions inserted around calls and inline assembly. Live range splitting could sometimes break x87 code by inserting spill code in unfortunate places. As a bonus we handle floating point inline assembly correctly now. llvm-svn: 134018
2011-06-29 02:32:28 +08:00
entry:
%0 = tail call x86_fp80 asm "fistl $2", "=&{st},0,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %x, i32* %p) nounwind
ret x86_fp80 %0
}
; An 'f' constraint is never implicitly popped:
;
; void fucomp1(long double x, long double y) {
; asm volatile ("fucomp %1" : : "t"(x), "f"(y) : "st");
; }
define void @fucomp1(x86_fp80 %x, x86_fp80 %y) nounwind ssp {
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
; CHECK-LABEL: fucomp1:
; CHECK: ## BB#0: ## %entry
; CHECK-NEXT: fldt {{[0-9]+}}(%esp)
; CHECK-NEXT: fldt {{[0-9]+}}(%esp)
; CHECK-NEXT: fxch %st(1)
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: fucomp %st(1)
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: fstp %st(0)
; CHECK-NEXT: retl
; CHECK-NEXT: ## -- End function
Clean up the handling of the x87 fp stack to make it more robust. Drop the FpMov instructions, use plain COPY instead. Drop the FpSET/GET instruction for accessing fixed stack positions. Instead use normal COPY to/from ST registers around inline assembly, and provide a single new FpPOP_RETVAL instruction that can access the return value(s) from a call. This is still necessary since you cannot tell from the CALL instruction alone if it returns anything on the FP stack. Teach fast isel to use this. This provides a much more robust way of handling fixed stack registers - we can tolerate arbitrary FP stack instructions inserted around calls and inline assembly. Live range splitting could sometimes break x87 code by inserting spill code in unfortunate places. As a bonus we handle floating point inline assembly correctly now. llvm-svn: 134018
2011-06-29 02:32:28 +08:00
entry:
tail call void asm sideeffect "fucomp $1", "{st},f,~{st},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %x, x86_fp80 %y) nounwind
ret void
}
; The 'u' constraint is only popped implicitly when clobbered:
;
; void fucomp2(long double x, long double y) {
; asm volatile ("fucomp %1" : : "t"(x), "u"(y) : "st");
; }
;
; void fucomp3(long double x, long double y) {
; asm volatile ("fucompp %1" : : "t"(x), "u"(y) : "st", "st(1)");
; }
;
define void @fucomp2(x86_fp80 %x, x86_fp80 %y) nounwind ssp {
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
; CHECK-LABEL: fucomp2:
; CHECK: ## BB#0: ## %entry
; CHECK-NEXT: fldt {{[0-9]+}}(%esp)
; CHECK-NEXT: fldt {{[0-9]+}}(%esp)
; CHECK-NEXT: fxch %st(1)
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: fucomp %st(1)
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: fstp %st(0)
; CHECK-NEXT: retl
; CHECK-NEXT: ## -- End function
Clean up the handling of the x87 fp stack to make it more robust. Drop the FpMov instructions, use plain COPY instead. Drop the FpSET/GET instruction for accessing fixed stack positions. Instead use normal COPY to/from ST registers around inline assembly, and provide a single new FpPOP_RETVAL instruction that can access the return value(s) from a call. This is still necessary since you cannot tell from the CALL instruction alone if it returns anything on the FP stack. Teach fast isel to use this. This provides a much more robust way of handling fixed stack registers - we can tolerate arbitrary FP stack instructions inserted around calls and inline assembly. Live range splitting could sometimes break x87 code by inserting spill code in unfortunate places. As a bonus we handle floating point inline assembly correctly now. llvm-svn: 134018
2011-06-29 02:32:28 +08:00
entry:
tail call void asm sideeffect "fucomp $1", "{st},{st(1)},~{st},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %x, x86_fp80 %y) nounwind
ret void
}
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
Clean up the handling of the x87 fp stack to make it more robust. Drop the FpMov instructions, use plain COPY instead. Drop the FpSET/GET instruction for accessing fixed stack positions. Instead use normal COPY to/from ST registers around inline assembly, and provide a single new FpPOP_RETVAL instruction that can access the return value(s) from a call. This is still necessary since you cannot tell from the CALL instruction alone if it returns anything on the FP stack. Teach fast isel to use this. This provides a much more robust way of handling fixed stack registers - we can tolerate arbitrary FP stack instructions inserted around calls and inline assembly. Live range splitting could sometimes break x87 code by inserting spill code in unfortunate places. As a bonus we handle floating point inline assembly correctly now. llvm-svn: 134018
2011-06-29 02:32:28 +08:00
define void @fucomp3(x86_fp80 %x, x86_fp80 %y) nounwind ssp {
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
; CHECK-LABEL: fucomp3:
; CHECK: ## BB#0: ## %entry
; CHECK-NEXT: fldt {{[0-9]+}}(%esp)
; CHECK-NEXT: fldt {{[0-9]+}}(%esp)
; CHECK-NEXT: fxch %st(1)
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: fucompp %st(1)
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: retl
; CHECK-NEXT: ## -- End function
Clean up the handling of the x87 fp stack to make it more robust. Drop the FpMov instructions, use plain COPY instead. Drop the FpSET/GET instruction for accessing fixed stack positions. Instead use normal COPY to/from ST registers around inline assembly, and provide a single new FpPOP_RETVAL instruction that can access the return value(s) from a call. This is still necessary since you cannot tell from the CALL instruction alone if it returns anything on the FP stack. Teach fast isel to use this. This provides a much more robust way of handling fixed stack registers - we can tolerate arbitrary FP stack instructions inserted around calls and inline assembly. Live range splitting could sometimes break x87 code by inserting spill code in unfortunate places. As a bonus we handle floating point inline assembly correctly now. llvm-svn: 134018
2011-06-29 02:32:28 +08:00
entry:
tail call void asm sideeffect "fucompp $1", "{st},{st(1)},~{st},~{st(1)},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %x, x86_fp80 %y) nounwind
ret void
}
; One input, two outputs, one dead output.
%complex = type { float, float }
define float @sincos1(float %x) nounwind ssp {
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
; CHECK-LABEL: sincos1:
; CHECK: ## BB#0: ## %entry
; CHECK-NEXT: flds {{[0-9]+}}(%esp)
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: sincos
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: fstp %st(1)
; CHECK-NEXT: retl
; CHECK-NEXT: ## -- End function
Clean up the handling of the x87 fp stack to make it more robust. Drop the FpMov instructions, use plain COPY instead. Drop the FpSET/GET instruction for accessing fixed stack positions. Instead use normal COPY to/from ST registers around inline assembly, and provide a single new FpPOP_RETVAL instruction that can access the return value(s) from a call. This is still necessary since you cannot tell from the CALL instruction alone if it returns anything on the FP stack. Teach fast isel to use this. This provides a much more robust way of handling fixed stack registers - we can tolerate arbitrary FP stack instructions inserted around calls and inline assembly. Live range splitting could sometimes break x87 code by inserting spill code in unfortunate places. As a bonus we handle floating point inline assembly correctly now. llvm-svn: 134018
2011-06-29 02:32:28 +08:00
entry:
%0 = tail call %complex asm "sincos", "={st},={st(1)},0,~{dirflag},~{fpsr},~{flags}"(float %x) nounwind
%asmresult = extractvalue %complex %0, 0
ret float %asmresult
}
; Same thing, swapped output operands.
define float @sincos2(float %x) nounwind ssp {
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
; CHECK-LABEL: sincos2:
; CHECK: ## BB#0: ## %entry
; CHECK-NEXT: flds {{[0-9]+}}(%esp)
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: sincos
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: fstp %st(1)
; CHECK-NEXT: retl
; CHECK-NEXT: ## -- End function
Clean up the handling of the x87 fp stack to make it more robust. Drop the FpMov instructions, use plain COPY instead. Drop the FpSET/GET instruction for accessing fixed stack positions. Instead use normal COPY to/from ST registers around inline assembly, and provide a single new FpPOP_RETVAL instruction that can access the return value(s) from a call. This is still necessary since you cannot tell from the CALL instruction alone if it returns anything on the FP stack. Teach fast isel to use this. This provides a much more robust way of handling fixed stack registers - we can tolerate arbitrary FP stack instructions inserted around calls and inline assembly. Live range splitting could sometimes break x87 code by inserting spill code in unfortunate places. As a bonus we handle floating point inline assembly correctly now. llvm-svn: 134018
2011-06-29 02:32:28 +08:00
entry:
%0 = tail call %complex asm "sincos", "={st(1)},={st},1,~{dirflag},~{fpsr},~{flags}"(float %x) nounwind
%asmresult = extractvalue %complex %0, 1
ret float %asmresult
}
; Clobber st(0) after it was live-out/dead from the previous asm.
; Load x, make a copy for the second asm.
; Discard dead result in st(0), bring x to the top.
; x is now in st(0) for the second asm
; Discard both results.
define float @sincos3(float %x) nounwind ssp {
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
; CHECK-LABEL: sincos3:
; CHECK: ## BB#0: ## %entry
; CHECK-NEXT: flds {{[0-9]+}}(%esp)
; CHECK-NEXT: fld %st(0)
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: sincos
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: fstp %st(0)
; CHECK-NEXT: fxch %st(1)
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: sincos
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: fstp %st(1)
; CHECK-NEXT: fstp %st(0)
; CHECK-NEXT: retl
; CHECK-NEXT: ## -- End function
Clean up the handling of the x87 fp stack to make it more robust. Drop the FpMov instructions, use plain COPY instead. Drop the FpSET/GET instruction for accessing fixed stack positions. Instead use normal COPY to/from ST registers around inline assembly, and provide a single new FpPOP_RETVAL instruction that can access the return value(s) from a call. This is still necessary since you cannot tell from the CALL instruction alone if it returns anything on the FP stack. Teach fast isel to use this. This provides a much more robust way of handling fixed stack registers - we can tolerate arbitrary FP stack instructions inserted around calls and inline assembly. Live range splitting could sometimes break x87 code by inserting spill code in unfortunate places. As a bonus we handle floating point inline assembly correctly now. llvm-svn: 134018
2011-06-29 02:32:28 +08:00
entry:
%0 = tail call %complex asm sideeffect "sincos", "={st(1)},={st},1,~{dirflag},~{fpsr},~{flags}"(float %x) nounwind
%1 = tail call %complex asm sideeffect "sincos", "={st(1)},={st},1,~{dirflag},~{fpsr},~{flags}"(float %x) nounwind
%asmresult = extractvalue %complex %0, 0
ret float %asmresult
}
Don't clobber pending ST regs when FP regs are killed. X86FloatingPoint keeps track of pending ST registers for an upcoming inline asm instruction with fixed stack register constraints. It does this by remembering which FP register holds the value that should appear at a fixed stack position for the inline asm. When that FP register is killed before the inline asm, make sure to duplicate it to a scratch register, so the ST register still has a live FP reference. This could happen when the same FP register was copied to two ST registers, or when a spill instruction is inserted between the ST copy and the inline asm. This fixes PR10602. llvm-svn: 137050
2011-08-09 01:15:43 +08:00
; Pass the same value in two fixed stack slots.
define i32 @PR10602() nounwind ssp {
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
; CHECK-LABEL: PR10602:
; CHECK: ## BB#0: ## %entry
; CHECK-NEXT: flds LCPI19_0
; CHECK-NEXT: fld %st(0)
; CHECK-NEXT: fxch %st(1)
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: fcomi %st(1), %st(0); pushf; pop %eax
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: fstp %st(0)
; CHECK-NEXT: fstp %st(0)
; CHECK-NEXT: retl
; CHECK-NEXT: ## -- End function
Don't clobber pending ST regs when FP regs are killed. X86FloatingPoint keeps track of pending ST registers for an upcoming inline asm instruction with fixed stack register constraints. It does this by remembering which FP register holds the value that should appear at a fixed stack position for the inline asm. When that FP register is killed before the inline asm, make sure to duplicate it to a scratch register, so the ST register still has a live FP reference. This could happen when the same FP register was copied to two ST registers, or when a spill instruction is inserted between the ST copy and the inline asm. This fixes PR10602. llvm-svn: 137050
2011-08-09 01:15:43 +08:00
entry:
%0 = tail call i32 asm "fcomi $2, $1; pushf; pop $0", "=r,{st},{st(1)},~{dirflag},~{fpsr},~{flags}"(double 2.000000e+00, double 2.000000e+00) nounwind
ret i32 %0
}
[X86] Simplify X87 stackifier pass. Stop using ST registers for function returns and inline-asm instructions and use FP registers instead. This allows removing a large amount of code in the stackifier pass that was needed to track register liveness and handle copies between ST and FP registers and function calls returning floating point values. It also fixes a bug which manifests when an ST register defined by an inline-asm instruction was live across another inline-asm instruction, as shown in the following sequence of machine instructions: 1. INLINEASM <es:frndint> $0:[regdef], %ST0<imp-def,tied5> 2. INLINEASM <es:fldcw $0> 3. %FP0<def> = COPY %ST0 <rdar://problem/16952634> llvm-svn: 214580
2014-08-02 06:19:41 +08:00
; <rdar://problem/16952634>
; X87 stackifier asserted when there was an ST register defined by an
; inline-asm instruction and the ST register was live across another
; inline-asm instruction.
;
; INLINEASM <es:frndint> [sideeffect] [attdialect], $0:[regdef], %ST0<imp-def,tied5>, $1:[reguse tiedto:$0], %ST0<tied3>, $2:[clobber], %EFLAGS<earlyclobber,imp-def,dead>
; INLINEASM <es:fldcw $0> [sideeffect] [mayload] [attdialect], $0:[mem], %EAX<undef>, 1, %noreg, 0, %noreg, $1:[clobber], %EFLAGS<earlyclobber,imp-def,dead>
; %FP0<def> = COPY %ST0
%struct.fpu_t = type { [8 x x86_fp80], x86_fp80, %struct.anon1, %struct.anon2, i32, i8, [15 x i8] }
%struct.anon1 = type { i32, i32, i32 }
%struct.anon2 = type { i32, i32, i32, i32 }
@fpu = external global %struct.fpu_t, align 16
; Function Attrs: ssp
define void @test_live_st(i32 %a1) {
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
; CHECK-LABEL: test_live_st:
; CHECK: ## BB#0: ## %entry
; CHECK-NEXT: subl $12, %esp
; CHECK-NEXT: Lcfi2:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: fldt (%eax)
; CHECK-NEXT: cmpl $1, {{[0-9]+}}(%esp)
; CHECK-NEXT: jne LBB20_2
; CHECK-NEXT: ## BB#1: ## %sw.bb4.i
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: frndint
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: fldcw (%eax)
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: LBB20_2: ## %_Z5tointRKe.exit
; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp)
; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movw $3199, {{[0-9]+}}(%esp) ## imm = 0xC7F
; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp)
; CHECK-NEXT: fistpl {{[0-9]+}}(%esp)
; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp)
; CHECK-NEXT: fildl {{[0-9]+}}(%esp)
; CHECK-NEXT: movl L_fpu$non_lazy_ptr, %eax
; CHECK-NEXT: fstpt 128(%eax)
; CHECK-NEXT: addl $12, %esp
; CHECK-NEXT: retl
[X86] Simplify X87 stackifier pass. Stop using ST registers for function returns and inline-asm instructions and use FP registers instead. This allows removing a large amount of code in the stackifier pass that was needed to track register liveness and handle copies between ST and FP registers and function calls returning floating point values. It also fixes a bug which manifests when an ST register defined by an inline-asm instruction was live across another inline-asm instruction, as shown in the following sequence of machine instructions: 1. INLINEASM <es:frndint> $0:[regdef], %ST0<imp-def,tied5> 2. INLINEASM <es:fldcw $0> 3. %FP0<def> = COPY %ST0 <rdar://problem/16952634> llvm-svn: 214580
2014-08-02 06:19:41 +08:00
entry:
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load x86_fp80, x86_fp80* undef, align 16
[X86] Simplify X87 stackifier pass. Stop using ST registers for function returns and inline-asm instructions and use FP registers instead. This allows removing a large amount of code in the stackifier pass that was needed to track register liveness and handle copies between ST and FP registers and function calls returning floating point values. It also fixes a bug which manifests when an ST register defined by an inline-asm instruction was live across another inline-asm instruction, as shown in the following sequence of machine instructions: 1. INLINEASM <es:frndint> $0:[regdef], %ST0<imp-def,tied5> 2. INLINEASM <es:fldcw $0> 3. %FP0<def> = COPY %ST0 <rdar://problem/16952634> llvm-svn: 214580
2014-08-02 06:19:41 +08:00
%cond = icmp eq i32 %a1, 1
br i1 %cond, label %sw.bb4.i, label %_Z5tointRKe.exit
sw.bb4.i:
%1 = call x86_fp80 asm sideeffect "frndint", "={st},0,~{dirflag},~{fpsr},~{flags}"(x86_fp80 %0)
call void asm sideeffect "fldcw $0", "*m,~{dirflag},~{fpsr},~{flags}"(i32* undef)
br label %_Z5tointRKe.exit
_Z5tointRKe.exit:
%result.0.i = phi x86_fp80 [ %1, %sw.bb4.i ], [ %0, %entry ]
%conv.i1814 = fptosi x86_fp80 %result.0.i to i32
%conv626 = sitofp i32 %conv.i1814 to x86_fp80
[opaque pointer type] Add textual IR support for explicit type parameter to gep operator Similar to gep (r230786) and load (r230794) changes. Similar migration script can be used to update test cases, which successfully migrated all of LLVM and Polly, but about 4 test cases needed manually changes in Clang. (this script will read the contents of stdin and massage it into stdout - wrap it in the 'apply.sh' script shown in previous commits + xargs to apply it over a large set of test cases) import fileinput import sys import re rep = re.compile(r"(getelementptr(?:\s+inbounds)?\s*\()((<\d*\s+x\s+)?([^@]*?)(|\s*addrspace\(\d+\))\s*\*(?(3)>)\s*)(?=$|%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|zeroinitializer|<|\[\[[a-zA-Z]|\{\{)", re.MULTILINE | re.DOTALL) def conv(match): line = match.group(1) line += match.group(4) line += ", " line += match.group(2) return line line = sys.stdin.read() off = 0 for match in re.finditer(rep, line): sys.stdout.write(line[off:match.start()]) sys.stdout.write(conv(match)) off = match.end() sys.stdout.write(line[off:]) llvm-svn: 232184
2015-03-14 02:20:45 +08:00
store x86_fp80 %conv626, x86_fp80* getelementptr inbounds (%struct.fpu_t, %struct.fpu_t* @fpu, i32 0, i32 1)
[X86] Simplify X87 stackifier pass. Stop using ST registers for function returns and inline-asm instructions and use FP registers instead. This allows removing a large amount of code in the stackifier pass that was needed to track register liveness and handle copies between ST and FP registers and function calls returning floating point values. It also fixes a bug which manifests when an ST register defined by an inline-asm instruction was live across another inline-asm instruction, as shown in the following sequence of machine instructions: 1. INLINEASM <es:frndint> $0:[regdef], %ST0<imp-def,tied5> 2. INLINEASM <es:fldcw $0> 3. %FP0<def> = COPY %ST0 <rdar://problem/16952634> llvm-svn: 214580
2014-08-02 06:19:41 +08:00
br label %return
return:
ret void
}
; Check that x87 stackifier is correctly rewriting FP registers to ST registers.
define double @test_operand_rewrite() {
[X86][X87] Regenerate inline-asm tests llvm-svn: 310201
2017-08-06 20:17:10 +08:00
; CHECK-LABEL: test_operand_rewrite:
; CHECK: ## BB#0: ## %entry
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: foo %st(0), %st(1)
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: fsubp %st(1)
; CHECK-NEXT: retl
[X86] Simplify X87 stackifier pass. Stop using ST registers for function returns and inline-asm instructions and use FP registers instead. This allows removing a large amount of code in the stackifier pass that was needed to track register liveness and handle copies between ST and FP registers and function calls returning floating point values. It also fixes a bug which manifests when an ST register defined by an inline-asm instruction was live across another inline-asm instruction, as shown in the following sequence of machine instructions: 1. INLINEASM <es:frndint> $0:[regdef], %ST0<imp-def,tied5> 2. INLINEASM <es:fldcw $0> 3. %FP0<def> = COPY %ST0 <rdar://problem/16952634> llvm-svn: 214580
2014-08-02 06:19:41 +08:00
entry:
%0 = tail call { double, double } asm sideeffect "foo $0, $1", "={st},={st(1)},~{dirflag},~{fpsr},~{flags}"()
%asmresult = extractvalue { double, double } %0, 0
%asmresult1 = extractvalue { double, double } %0, 1
%sub = fsub double %asmresult, %asmresult1
ret double %sub
}