llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/select-imm.mir

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# RUN: llc -O0 -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
define void @imm_s32_gpr() { ret void }
define void @imm_s64_gpr() { ret void }
...
---
# Check that we select a 32-bit immediate into a MOVi32imm.
# CHECK-LABEL: name: imm_s32_gpr
name: imm_s32_gpr
legalized: true
regBankSelected: true
# CHECK: registers:
# CHECK-NEXT: - { id: 0, class: gpr32, preferred-register: '' }
registers:
- { id: 0, class: gpr }
# CHECK: body:
# CHECK: %0 = MOVi32imm -1234
body: |
bb.0:
liveins: %w0, %w1
%0(s32) = G_CONSTANT i32 -1234
%w0 = COPY %0(s32)
...
---
# Check that we select a 64-bit immediate into a MOVi64imm.
# CHECK-LABEL: name: imm_s64_gpr
name: imm_s64_gpr
legalized: true
regBankSelected: true
# CHECK: registers:
# CHECK-NEXT: - { id: 0, class: gpr64, preferred-register: '' }
registers:
- { id: 0, class: gpr }
# CHECK: body:
# CHECK: %0 = MOVi64imm 1234
body: |
bb.0:
liveins: %w0, %w1
%0(s64) = G_CONSTANT i64 1234
%w0 = COPY %0(s64)
...