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llvm-project/clang/test/Driver/hip-toolchain-no-rdc.hip

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[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// REQUIRES: clang-driver
// REQUIRES: x86-registered-target
// REQUIRES: amdgpu-registered-target
// RUN: %clang -### -target x86_64-linux-gnu -fno-gpu-rdc \
// RUN: -x hip --cuda-gpu-arch=gfx803 --cuda-gpu-arch=gfx900 \
// RUN: --hip-device-lib=lib1.bc --hip-device-lib=lib2.bc \
// RUN: --hip-device-lib-path=%S/Inputs/hip_multiple_inputs/lib1 \
// RUN: --hip-device-lib-path=%S/Inputs/hip_multiple_inputs/lib2 \
[HIP] Do not use llvm-link/opt/llc for -fgpu-rdc This patch is a follow up on https://reviews.llvm.org/D81627. In addition to default -fno-gpu-rdc case, this patches let HIP toolchain not use llvm-link/opt/llc to link device code for -fgpu-rdc case. Instead, uses standard lto. This will eliminate some redundant optimizations and speed up the compilation/linking. Differential Revision: https://reviews.llvm.org/D81861
2020-06-14 21:07:31 +08:00
// RUN: -fuse-ld=lld -nogpuinc \
// RUN: %S/Inputs/hip_multiple_inputs/a.cu \
// RUN: %S/Inputs/hip_multiple_inputs/b.hip \
// RUN: 2>&1 | FileCheck -check-prefixes=CHECK,LINK %s
// RUN: %clang -### -target x86_64-linux-gnu -fno-gpu-rdc \
// RUN: -x hip --cuda-gpu-arch=gfx803 --cuda-gpu-arch=gfx900 \
// RUN: --hip-device-lib=lib1.bc --hip-device-lib=lib2.bc \
// RUN: --hip-device-lib-path=%S/Inputs/hip_multiple_inputs/lib1 \
// RUN: --hip-device-lib-path=%S/Inputs/hip_multiple_inputs/lib2 \
// RUN: -fuse-ld=lld -nogpuinc -c \
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// RUN: %S/Inputs/hip_multiple_inputs/a.cu \
// RUN: %S/Inputs/hip_multiple_inputs/b.hip \
// RUN: 2>&1 | FileCheck -check-prefixes=CHECK %s
[HIP] Do not use llvm-link/opt/llc for -fgpu-rdc This patch is a follow up on https://reviews.llvm.org/D81627. In addition to default -fno-gpu-rdc case, this patches let HIP toolchain not use llvm-link/opt/llc to link device code for -fgpu-rdc case. Instead, uses standard lto. This will eliminate some redundant optimizations and speed up the compilation/linking. Differential Revision: https://reviews.llvm.org/D81861
2020-06-14 21:07:31 +08:00
// RUN: touch %T/a.o
// RUN: touch %T/b.o
// RUN: %clang -### -target x86_64-linux-gnu \
// RUN: --hip-link --cuda-gpu-arch=gfx803 --cuda-gpu-arch=gfx900 \
// RUN: -fuse-ld=lld -nogpuinc \
// RUN: %T/a.o %T/b.o \
// RUN: 2>&1 | FileCheck -check-prefixes=LKONLY %s
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
//
// Compile device code in a.cu to code object for gfx803.
//
[NFC] Use regex for code object version in hip tests [NFC] Use regex for code object version in hip tests Extracted from D93258. Makes tests robust to changes in default code object version. Reviewed By: t-tye Differential Revision: https://reviews.llvm.org/D93398
2020-12-17 01:00:18 +08:00
// CHECK: [[CLANG:".*clang.*"]] "-cc1" "-mllvm" "--amdhsa-code-object-version={{[0-9]+}}" "-triple" "amdgcn-amd-amdhsa"
Relax restriction in tests to where "-emit-llvm-bc" and "-emit-obj" must appear. The CHECK lines as structured were requiring them to appear only in a certain position while all that is really needed is to check that they are present. llvm-svn: 354001
2019-02-14 09:11:32 +08:00
// CHECK-SAME: "-aux-triple" "x86_64-unknown-linux-gnu"
[HIP] Do not call opt/llc for -fno-gpu-rdc Currently HIP toolchain calls clang to emit bitcode then calls opt/llc for device compilation for the default -fno-gpu-rdc case, which is unnecessary since clang is able to compile a single source file to ISA. This patch fixes the HIP action builder and toolchain so that the default -fno-gpu-rdc can be done like a canonical toolchain, i.e. one clang -cc1 invocation to compile source code to ISA. This can avoid unnecessary processes to speed up the compilation, and avoid redundant LLVM passes which are performed in clang -cc1 and opt. Differential Revision: https://reviews.llvm.org/D81627
2020-06-10 03:02:53 +08:00
// CHECK-SAME: "-emit-obj"
[HIP] Do not use llvm-link/opt/llc for -fgpu-rdc This patch is a follow up on https://reviews.llvm.org/D81627. In addition to default -fno-gpu-rdc case, this patches let HIP toolchain not use llvm-link/opt/llc to link device code for -fgpu-rdc case. Instead, uses standard lto. This will eliminate some redundant optimizations and speed up the compilation/linking. Differential Revision: https://reviews.llvm.org/D81861
2020-06-14 21:07:31 +08:00
// CHECK-SAME: {{.*}} "-main-file-name" "a.cu"
[HIP] Enable -amdgpu-internalize-symbols Enable -amdgpu-internalize-symbols to eliminate unused functions and global variables for whole program to speed up compilation and improve performance. For -fno-gpu-rdc, -amdgpu-internalize-symbols is passed to clang -cc1. For -fgpu-rdc, -amdgpu-internalize-symbols is passed to lld. Differential Revision: https://reviews.llvm.org/D81959
2020-06-17 02:52:03 +08:00
// CHECK-SAME: "-fcuda-is-device" "-mllvm" "-amdgpu-internalize-symbols"
// CHECK-SAME: "-fcuda-allow-variadic-functions" "-fvisibility" "hidden"
Add -fapply-global-visibility-to-externs for -cc1 Introduce an option to request global visibility settings be applied to declarations without a definition or an explicit visibility, rather than the existing behavior of giving these default visibility. When the visibility of all or most extern definitions are known this allows for the same optimisations -fvisibility permits without updating source code to annotate all declarations. Differential Revision: https://reviews.llvm.org/D56868 llvm-svn: 352391
2019-01-29 01:12:19 +08:00
// CHECK-SAME: "-fapply-global-visibility-to-externs"
[HIP] Use -mlink-builtin-bitcode to link device library Use -mlink-builtin-bitcode instead of llvm-link to link device library so that device library bitcode and user device code can be compiled in a consistent way. This is the same approach used by CUDA and OpenMP. Differential Revision: https://reviews.llvm.org/D60513 llvm-svn: 358290
2019-04-13 00:23:31 +08:00
// CHECK-SAME: "{{.*}}lib1.bc" "{{.*}}lib2.bc"
[HIP] Do not use llvm-link/opt/llc for -fgpu-rdc This patch is a follow up on https://reviews.llvm.org/D81627. In addition to default -fno-gpu-rdc case, this patches let HIP toolchain not use llvm-link/opt/llc to link device code for -fgpu-rdc case. Instead, uses standard lto. This will eliminate some redundant optimizations and speed up the compilation/linking. Differential Revision: https://reviews.llvm.org/D81861
2020-06-14 21:07:31 +08:00
// CHECK-SAME: "-target-cpu" "gfx803"
[HIP] Do not call opt/llc for -fno-gpu-rdc Currently HIP toolchain calls clang to emit bitcode then calls opt/llc for device compilation for the default -fno-gpu-rdc case, which is unnecessary since clang is able to compile a single source file to ISA. This patch fixes the HIP action builder and toolchain so that the default -fno-gpu-rdc can be done like a canonical toolchain, i.e. one clang -cc1 invocation to compile source code to ISA. This can avoid unnecessary processes to speed up the compilation, and avoid redundant LLVM passes which are performed in clang -cc1 and opt. Differential Revision: https://reviews.llvm.org/D81627
2020-06-10 03:02:53 +08:00
// CHECK-SAME: {{.*}} "-o" [[OBJ_DEV_A_803:".*o"]] "-x" "hip"
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// CHECK-SAME: {{.*}} [[A_SRC:".*a.cu"]]
[HIP] Do not call opt/llc for -fno-gpu-rdc Currently HIP toolchain calls clang to emit bitcode then calls opt/llc for device compilation for the default -fno-gpu-rdc case, which is unnecessary since clang is able to compile a single source file to ISA. This patch fixes the HIP action builder and toolchain so that the default -fno-gpu-rdc can be done like a canonical toolchain, i.e. one clang -cc1 invocation to compile source code to ISA. This can avoid unnecessary processes to speed up the compilation, and avoid redundant LLVM passes which are performed in clang -cc1 and opt. Differential Revision: https://reviews.llvm.org/D81627
2020-06-10 03:02:53 +08:00
// CHECK-NOT: {{".*llvm-link"}}
// CHECK-NOT: {{".*opt"}}
// CHECK-NOT: {{".*llc"}}
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
[hip] Remove `hip_pinned_shadow`. Summary: - Use `device_builtin_surface` and `device_builtin_texture` for surface/texture reference support. So far, both the host and device use the same reference type, which could be revised later when interface/implementation is stablized. Reviewers: yaxunl Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D77583
2020-03-26 23:21:45 +08:00
// CHECK: [[LLD: ".*lld.*"]] "-flavor" "gnu" "--no-undefined" "-shared"
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// CHECK-SAME: "-o" "[[IMG_DEV_A_803:.*out]]" [[OBJ_DEV_A_803]]
//
// Compile device code in a.cu to code object for gfx900.
//
[NFC] Use regex for code object version in hip tests [NFC] Use regex for code object version in hip tests Extracted from D93258. Makes tests robust to changes in default code object version. Reviewed By: t-tye Differential Revision: https://reviews.llvm.org/D93398
2020-12-17 01:00:18 +08:00
// CHECK: [[CLANG:".*clang.*"]] "-cc1" "-mllvm" "--amdhsa-code-object-version={{[0-9]+}}" "-triple" "amdgcn-amd-amdhsa"
Relax restriction in tests to where "-emit-llvm-bc" and "-emit-obj" must appear. The CHECK lines as structured were requiring them to appear only in a certain position while all that is really needed is to check that they are present. llvm-svn: 354001
2019-02-14 09:11:32 +08:00
// CHECK-SAME: "-aux-triple" "x86_64-unknown-linux-gnu"
[HIP] Do not call opt/llc for -fno-gpu-rdc Currently HIP toolchain calls clang to emit bitcode then calls opt/llc for device compilation for the default -fno-gpu-rdc case, which is unnecessary since clang is able to compile a single source file to ISA. This patch fixes the HIP action builder and toolchain so that the default -fno-gpu-rdc can be done like a canonical toolchain, i.e. one clang -cc1 invocation to compile source code to ISA. This can avoid unnecessary processes to speed up the compilation, and avoid redundant LLVM passes which are performed in clang -cc1 and opt. Differential Revision: https://reviews.llvm.org/D81627
2020-06-10 03:02:53 +08:00
// CHECK-SAME: "-emit-obj"
[HIP] Do not use llvm-link/opt/llc for -fgpu-rdc This patch is a follow up on https://reviews.llvm.org/D81627. In addition to default -fno-gpu-rdc case, this patches let HIP toolchain not use llvm-link/opt/llc to link device code for -fgpu-rdc case. Instead, uses standard lto. This will eliminate some redundant optimizations and speed up the compilation/linking. Differential Revision: https://reviews.llvm.org/D81861
2020-06-14 21:07:31 +08:00
// CHECK-SAME: {{.*}} "-main-file-name" "a.cu"
[HIP] Enable -amdgpu-internalize-symbols Enable -amdgpu-internalize-symbols to eliminate unused functions and global variables for whole program to speed up compilation and improve performance. For -fno-gpu-rdc, -amdgpu-internalize-symbols is passed to clang -cc1. For -fgpu-rdc, -amdgpu-internalize-symbols is passed to lld. Differential Revision: https://reviews.llvm.org/D81959
2020-06-17 02:52:03 +08:00
// CHECK-SAME: "-fcuda-is-device" "-mllvm" "-amdgpu-internalize-symbols"
// CHECK-SAME: "-fcuda-allow-variadic-functions" "-fvisibility" "hidden"
Add -fapply-global-visibility-to-externs for -cc1 Introduce an option to request global visibility settings be applied to declarations without a definition or an explicit visibility, rather than the existing behavior of giving these default visibility. When the visibility of all or most extern definitions are known this allows for the same optimisations -fvisibility permits without updating source code to annotate all declarations. Differential Revision: https://reviews.llvm.org/D56868 llvm-svn: 352391
2019-01-29 01:12:19 +08:00
// CHECK-SAME: "-fapply-global-visibility-to-externs"
[HIP] Use -mlink-builtin-bitcode to link device library Use -mlink-builtin-bitcode instead of llvm-link to link device library so that device library bitcode and user device code can be compiled in a consistent way. This is the same approach used by CUDA and OpenMP. Differential Revision: https://reviews.llvm.org/D60513 llvm-svn: 358290
2019-04-13 00:23:31 +08:00
// CHECK-SAME: "{{.*}}lib1.bc" "{{.*}}lib2.bc"
[HIP] Do not use llvm-link/opt/llc for -fgpu-rdc This patch is a follow up on https://reviews.llvm.org/D81627. In addition to default -fno-gpu-rdc case, this patches let HIP toolchain not use llvm-link/opt/llc to link device code for -fgpu-rdc case. Instead, uses standard lto. This will eliminate some redundant optimizations and speed up the compilation/linking. Differential Revision: https://reviews.llvm.org/D81861
2020-06-14 21:07:31 +08:00
// CHECK-SAME: "-target-cpu" "gfx900"
[HIP] Do not call opt/llc for -fno-gpu-rdc Currently HIP toolchain calls clang to emit bitcode then calls opt/llc for device compilation for the default -fno-gpu-rdc case, which is unnecessary since clang is able to compile a single source file to ISA. This patch fixes the HIP action builder and toolchain so that the default -fno-gpu-rdc can be done like a canonical toolchain, i.e. one clang -cc1 invocation to compile source code to ISA. This can avoid unnecessary processes to speed up the compilation, and avoid redundant LLVM passes which are performed in clang -cc1 and opt. Differential Revision: https://reviews.llvm.org/D81627
2020-06-10 03:02:53 +08:00
// CHECK-SAME: {{.*}} "-o" [[OBJ_DEV_A_900:".*o"]] "-x" "hip"
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// CHECK-SAME: {{.*}} [[A_SRC]]
[HIP] Do not call opt/llc for -fno-gpu-rdc Currently HIP toolchain calls clang to emit bitcode then calls opt/llc for device compilation for the default -fno-gpu-rdc case, which is unnecessary since clang is able to compile a single source file to ISA. This patch fixes the HIP action builder and toolchain so that the default -fno-gpu-rdc can be done like a canonical toolchain, i.e. one clang -cc1 invocation to compile source code to ISA. This can avoid unnecessary processes to speed up the compilation, and avoid redundant LLVM passes which are performed in clang -cc1 and opt. Differential Revision: https://reviews.llvm.org/D81627
2020-06-10 03:02:53 +08:00
// CHECK-NOT: {{".*llvm-link"}}
// CHECK-NOT: {{".*opt"}}
// CHECK-NOT: {{".*llc"}}
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
[hip] Remove `hip_pinned_shadow`. Summary: - Use `device_builtin_surface` and `device_builtin_texture` for surface/texture reference support. So far, both the host and device use the same reference type, which could be revised later when interface/implementation is stablized. Reviewers: yaxunl Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D77583
2020-03-26 23:21:45 +08:00
// CHECK: [[LLD]] "-flavor" "gnu" "--no-undefined" "-shared"
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// CHECK-SAME: "-o" "[[IMG_DEV_A_900:.*out]]" [[OBJ_DEV_A_900]]
//
// Bundle and embed device code in host object for a.cu.
//
// CHECK: [[BUNDLER:".*clang-offload-bundler"]] "-type=o"
[HIP] Align device binary To facilitate faster loading of device binaries and share them among processes, HIP runtime favors their alignment being 4096 bytes. HIP runtime can load unaligned device binaries, however, aligning them at 4096 bytes results in faster loading and less shared memory usage. This patch adds an option -bundle-align to clang-offload-bundler which allows bundles to be aligned at specified alignment. By default it is 1, which is NFC compared to existing format. This patch then aligns embedded fat binary and device binary inside fat binary at 4096 bytes. It has been verified this change does not cause significant overall file size increase for typical HIP applications (less than 1%). Differential Revision: https://reviews.llvm.org/D88734
2020-09-26 00:34:38 +08:00
// CHECK-SAME: "-bundle-align=4096"
[HIP] fix bundle entry ID for -- Canonicalize triple used in fat binary. Change from amdgcn-amd-amdhsa to amdgcn-amd-amdhsa-. This is part of https://reviews.llvm.org/D60620
2020-08-14 04:31:51 +08:00
// CHECK-SAME: "-targets={{.*}},hip-amdgcn-amd-amdhsa--gfx803,hip-amdgcn-amd-amdhsa--gfx900"
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// CHECK-SAME: "-inputs={{.*}},[[IMG_DEV_A_803]],[[IMG_DEV_A_900]]" "-outputs=[[BUNDLE_A:.*hipfb]]"
// CHECK: [[CLANG]] "-cc1" "-triple" "x86_64-unknown-linux-gnu"
Relax restriction in tests to where "-emit-llvm-bc" and "-emit-obj" must appear. The CHECK lines as structured were requiring them to appear only in a certain position while all that is really needed is to check that they are present. llvm-svn: 354001
2019-02-14 09:11:32 +08:00
// CHECK-SAME: "-aux-triple" "amdgcn-amd-amdhsa"
// CHECK-SAME: "-emit-obj"
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// CHECK-SAME: {{.*}} "-main-file-name" "a.cu"
[Driver] Move the "-o OUT -x TYPE SRC.c" flags to the end of -cc1 New -cc1 arguments, such as -faddrsig, have started appearing after the input name. I personally find it convenient for the input to be the last argument to the compile command line, since I often need to edit it when running crash reproduction scripts. Differential Revision: https://reviews.llvm.org/D62270 llvm-svn: 361530
2019-05-24 02:35:43 +08:00
// CHECK-SAME: {{.*}} "-fcuda-include-gpubinary" "[[BUNDLE_A]]"
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// CHECK-SAME: {{.*}} "-o" [[A_OBJ_HOST:".*o"]] "-x" "hip"
// CHECK-SAME: {{.*}} [[A_SRC]]
//
// Compile device code in b.hip to code object for gfx803.
//
[NFC] Use regex for code object version in hip tests [NFC] Use regex for code object version in hip tests Extracted from D93258. Makes tests robust to changes in default code object version. Reviewed By: t-tye Differential Revision: https://reviews.llvm.org/D93398
2020-12-17 01:00:18 +08:00
// CHECK: [[CLANG:".*clang.*"]] "-cc1" "-mllvm" "--amdhsa-code-object-version={{[0-9]+}}" "-triple" "amdgcn-amd-amdhsa"
Relax restriction in tests to where "-emit-llvm-bc" and "-emit-obj" must appear. The CHECK lines as structured were requiring them to appear only in a certain position while all that is really needed is to check that they are present. llvm-svn: 354001
2019-02-14 09:11:32 +08:00
// CHECK-SAME: "-aux-triple" "x86_64-unknown-linux-gnu"
[HIP] Do not call opt/llc for -fno-gpu-rdc Currently HIP toolchain calls clang to emit bitcode then calls opt/llc for device compilation for the default -fno-gpu-rdc case, which is unnecessary since clang is able to compile a single source file to ISA. This patch fixes the HIP action builder and toolchain so that the default -fno-gpu-rdc can be done like a canonical toolchain, i.e. one clang -cc1 invocation to compile source code to ISA. This can avoid unnecessary processes to speed up the compilation, and avoid redundant LLVM passes which are performed in clang -cc1 and opt. Differential Revision: https://reviews.llvm.org/D81627
2020-06-10 03:02:53 +08:00
// CHECK-SAME: "-emit-obj"
[HIP] Do not use llvm-link/opt/llc for -fgpu-rdc This patch is a follow up on https://reviews.llvm.org/D81627. In addition to default -fno-gpu-rdc case, this patches let HIP toolchain not use llvm-link/opt/llc to link device code for -fgpu-rdc case. Instead, uses standard lto. This will eliminate some redundant optimizations and speed up the compilation/linking. Differential Revision: https://reviews.llvm.org/D81861
2020-06-14 21:07:31 +08:00
// CHECK-SAME: {{.*}} "-main-file-name" "b.hip"
[HIP] Enable -amdgpu-internalize-symbols Enable -amdgpu-internalize-symbols to eliminate unused functions and global variables for whole program to speed up compilation and improve performance. For -fno-gpu-rdc, -amdgpu-internalize-symbols is passed to clang -cc1. For -fgpu-rdc, -amdgpu-internalize-symbols is passed to lld. Differential Revision: https://reviews.llvm.org/D81959
2020-06-17 02:52:03 +08:00
// CHECK-SAME: "-fcuda-is-device" "-mllvm" "-amdgpu-internalize-symbols"
// CHECK-SAME: "-fcuda-allow-variadic-functions" "-fvisibility" "hidden"
Add -fapply-global-visibility-to-externs for -cc1 Introduce an option to request global visibility settings be applied to declarations without a definition or an explicit visibility, rather than the existing behavior of giving these default visibility. When the visibility of all or most extern definitions are known this allows for the same optimisations -fvisibility permits without updating source code to annotate all declarations. Differential Revision: https://reviews.llvm.org/D56868 llvm-svn: 352391
2019-01-29 01:12:19 +08:00
// CHECK-SAME: "-fapply-global-visibility-to-externs"
[HIP] Use -mlink-builtin-bitcode to link device library Use -mlink-builtin-bitcode instead of llvm-link to link device library so that device library bitcode and user device code can be compiled in a consistent way. This is the same approach used by CUDA and OpenMP. Differential Revision: https://reviews.llvm.org/D60513 llvm-svn: 358290
2019-04-13 00:23:31 +08:00
// CHECK-SAME: "{{.*}}lib1.bc" "{{.*}}lib2.bc"
[HIP] Do not use llvm-link/opt/llc for -fgpu-rdc This patch is a follow up on https://reviews.llvm.org/D81627. In addition to default -fno-gpu-rdc case, this patches let HIP toolchain not use llvm-link/opt/llc to link device code for -fgpu-rdc case. Instead, uses standard lto. This will eliminate some redundant optimizations and speed up the compilation/linking. Differential Revision: https://reviews.llvm.org/D81861
2020-06-14 21:07:31 +08:00
// CHECK-SAME: "-target-cpu" "gfx803"
[HIP] Do not call opt/llc for -fno-gpu-rdc Currently HIP toolchain calls clang to emit bitcode then calls opt/llc for device compilation for the default -fno-gpu-rdc case, which is unnecessary since clang is able to compile a single source file to ISA. This patch fixes the HIP action builder and toolchain so that the default -fno-gpu-rdc can be done like a canonical toolchain, i.e. one clang -cc1 invocation to compile source code to ISA. This can avoid unnecessary processes to speed up the compilation, and avoid redundant LLVM passes which are performed in clang -cc1 and opt. Differential Revision: https://reviews.llvm.org/D81627
2020-06-10 03:02:53 +08:00
// CHECK-SAME: {{.*}} "-o" [[OBJ_DEV_B_803:".*o"]] "-x" "hip"
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// CHECK-SAME: {{.*}} [[B_SRC:".*b.hip"]]
[HIP] Do not call opt/llc for -fno-gpu-rdc Currently HIP toolchain calls clang to emit bitcode then calls opt/llc for device compilation for the default -fno-gpu-rdc case, which is unnecessary since clang is able to compile a single source file to ISA. This patch fixes the HIP action builder and toolchain so that the default -fno-gpu-rdc can be done like a canonical toolchain, i.e. one clang -cc1 invocation to compile source code to ISA. This can avoid unnecessary processes to speed up the compilation, and avoid redundant LLVM passes which are performed in clang -cc1 and opt. Differential Revision: https://reviews.llvm.org/D81627
2020-06-10 03:02:53 +08:00
// CHECK-NOT: {{".*llvm-link"}}
// CHECK-NOT: {{".*opt"}}
// CHECK-NOT: {{".*llc"}}
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
[hip] Remove `hip_pinned_shadow`. Summary: - Use `device_builtin_surface` and `device_builtin_texture` for surface/texture reference support. So far, both the host and device use the same reference type, which could be revised later when interface/implementation is stablized. Reviewers: yaxunl Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D77583
2020-03-26 23:21:45 +08:00
// CHECK: [[LLD]] "-flavor" "gnu" "--no-undefined" "-shared"
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// CHECK-SAME: "-o" "[[IMG_DEV_B_803:.*out]]" [[OBJ_DEV_B_803]]
//
// Compile device code in b.hip to code object for gfx900.
//
[NFC] Use regex for code object version in hip tests [NFC] Use regex for code object version in hip tests Extracted from D93258. Makes tests robust to changes in default code object version. Reviewed By: t-tye Differential Revision: https://reviews.llvm.org/D93398
2020-12-17 01:00:18 +08:00
// CHECK: [[CLANG:".*clang.*"]] "-cc1" "-mllvm" "--amdhsa-code-object-version={{[0-9]+}}" "-triple" "amdgcn-amd-amdhsa"
Relax restriction in tests to where "-emit-llvm-bc" and "-emit-obj" must appear. The CHECK lines as structured were requiring them to appear only in a certain position while all that is really needed is to check that they are present. llvm-svn: 354001
2019-02-14 09:11:32 +08:00
// CHECK-SAME: "-aux-triple" "x86_64-unknown-linux-gnu"
[HIP] Do not call opt/llc for -fno-gpu-rdc Currently HIP toolchain calls clang to emit bitcode then calls opt/llc for device compilation for the default -fno-gpu-rdc case, which is unnecessary since clang is able to compile a single source file to ISA. This patch fixes the HIP action builder and toolchain so that the default -fno-gpu-rdc can be done like a canonical toolchain, i.e. one clang -cc1 invocation to compile source code to ISA. This can avoid unnecessary processes to speed up the compilation, and avoid redundant LLVM passes which are performed in clang -cc1 and opt. Differential Revision: https://reviews.llvm.org/D81627
2020-06-10 03:02:53 +08:00
// CHECK-SAME: "-emit-obj"
[HIP] Do not use llvm-link/opt/llc for -fgpu-rdc This patch is a follow up on https://reviews.llvm.org/D81627. In addition to default -fno-gpu-rdc case, this patches let HIP toolchain not use llvm-link/opt/llc to link device code for -fgpu-rdc case. Instead, uses standard lto. This will eliminate some redundant optimizations and speed up the compilation/linking. Differential Revision: https://reviews.llvm.org/D81861
2020-06-14 21:07:31 +08:00
// CHECK-SAME: {{.*}} "-main-file-name" "b.hip"
[HIP] Enable -amdgpu-internalize-symbols Enable -amdgpu-internalize-symbols to eliminate unused functions and global variables for whole program to speed up compilation and improve performance. For -fno-gpu-rdc, -amdgpu-internalize-symbols is passed to clang -cc1. For -fgpu-rdc, -amdgpu-internalize-symbols is passed to lld. Differential Revision: https://reviews.llvm.org/D81959
2020-06-17 02:52:03 +08:00
// CHECK-SAME: "-fcuda-is-device" "-mllvm" "-amdgpu-internalize-symbols"
// CHECK-SAME: "-fcuda-allow-variadic-functions" "-fvisibility" "hidden"
Add -fapply-global-visibility-to-externs for -cc1 Introduce an option to request global visibility settings be applied to declarations without a definition or an explicit visibility, rather than the existing behavior of giving these default visibility. When the visibility of all or most extern definitions are known this allows for the same optimisations -fvisibility permits without updating source code to annotate all declarations. Differential Revision: https://reviews.llvm.org/D56868 llvm-svn: 352391
2019-01-29 01:12:19 +08:00
// CHECK-SAME: "-fapply-global-visibility-to-externs"
[HIP] Use -mlink-builtin-bitcode to link device library Use -mlink-builtin-bitcode instead of llvm-link to link device library so that device library bitcode and user device code can be compiled in a consistent way. This is the same approach used by CUDA and OpenMP. Differential Revision: https://reviews.llvm.org/D60513 llvm-svn: 358290
2019-04-13 00:23:31 +08:00
// CHECK-SAME: "{{.*}}lib1.bc" "{{.*}}lib2.bc"
[HIP] Do not use llvm-link/opt/llc for -fgpu-rdc This patch is a follow up on https://reviews.llvm.org/D81627. In addition to default -fno-gpu-rdc case, this patches let HIP toolchain not use llvm-link/opt/llc to link device code for -fgpu-rdc case. Instead, uses standard lto. This will eliminate some redundant optimizations and speed up the compilation/linking. Differential Revision: https://reviews.llvm.org/D81861
2020-06-14 21:07:31 +08:00
// CHECK-SAME: "-target-cpu" "gfx900"
[HIP] Do not call opt/llc for -fno-gpu-rdc Currently HIP toolchain calls clang to emit bitcode then calls opt/llc for device compilation for the default -fno-gpu-rdc case, which is unnecessary since clang is able to compile a single source file to ISA. This patch fixes the HIP action builder and toolchain so that the default -fno-gpu-rdc can be done like a canonical toolchain, i.e. one clang -cc1 invocation to compile source code to ISA. This can avoid unnecessary processes to speed up the compilation, and avoid redundant LLVM passes which are performed in clang -cc1 and opt. Differential Revision: https://reviews.llvm.org/D81627
2020-06-10 03:02:53 +08:00
// CHECK-SAME: {{.*}} "-o" [[OBJ_DEV_B_900:".*o"]] "-x" "hip"
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// CHECK-SAME: {{.*}} [[B_SRC]]
[HIP] Do not call opt/llc for -fno-gpu-rdc Currently HIP toolchain calls clang to emit bitcode then calls opt/llc for device compilation for the default -fno-gpu-rdc case, which is unnecessary since clang is able to compile a single source file to ISA. This patch fixes the HIP action builder and toolchain so that the default -fno-gpu-rdc can be done like a canonical toolchain, i.e. one clang -cc1 invocation to compile source code to ISA. This can avoid unnecessary processes to speed up the compilation, and avoid redundant LLVM passes which are performed in clang -cc1 and opt. Differential Revision: https://reviews.llvm.org/D81627
2020-06-10 03:02:53 +08:00
// CHECK-NOT: {{".*llvm-link"}}
// CHECK-NOT: {{".*opt"}}
// CHECK-NOT: {{".*llc"}}
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
[hip] Remove `hip_pinned_shadow`. Summary: - Use `device_builtin_surface` and `device_builtin_texture` for surface/texture reference support. So far, both the host and device use the same reference type, which could be revised later when interface/implementation is stablized. Reviewers: yaxunl Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D77583
2020-03-26 23:21:45 +08:00
// CHECK: [[LLD]] "-flavor" "gnu" "--no-undefined" "-shared"
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// CHECK-SAME: "-o" "[[IMG_DEV_B_900:.*out]]" [[OBJ_DEV_B_900]]
//
// Bundle and embed device code in host object for b.hip.
//
// CHECK: [[BUNDLER:".*clang-offload-bundler"]] "-type=o"
[HIP] Align device binary To facilitate faster loading of device binaries and share them among processes, HIP runtime favors their alignment being 4096 bytes. HIP runtime can load unaligned device binaries, however, aligning them at 4096 bytes results in faster loading and less shared memory usage. This patch adds an option -bundle-align to clang-offload-bundler which allows bundles to be aligned at specified alignment. By default it is 1, which is NFC compared to existing format. This patch then aligns embedded fat binary and device binary inside fat binary at 4096 bytes. It has been verified this change does not cause significant overall file size increase for typical HIP applications (less than 1%). Differential Revision: https://reviews.llvm.org/D88734
2020-09-26 00:34:38 +08:00
// CHECK-SAME: "-bundle-align=4096"
[HIP] fix bundle entry ID for -- Canonicalize triple used in fat binary. Change from amdgcn-amd-amdhsa to amdgcn-amd-amdhsa-. This is part of https://reviews.llvm.org/D60620
2020-08-14 04:31:51 +08:00
// CHECK-SAME: "-targets={{.*}},hip-amdgcn-amd-amdhsa--gfx803,hip-amdgcn-amd-amdhsa--gfx900"
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// CHECK-SAME: "-inputs={{.*}},[[IMG_DEV_B_803]],[[IMG_DEV_B_900]]" "-outputs=[[BUNDLE_A:.*hipfb]]"
// CHECK: [[CLANG]] "-cc1" "-triple" "x86_64-unknown-linux-gnu"
Relax restriction in tests to where "-emit-llvm-bc" and "-emit-obj" must appear. The CHECK lines as structured were requiring them to appear only in a certain position while all that is really needed is to check that they are present. llvm-svn: 354001
2019-02-14 09:11:32 +08:00
// CHECK-SAME: "-aux-triple" "amdgcn-amd-amdhsa"
// CHECK-SAME: "-emit-obj"
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// CHECK-SAME: {{.*}} "-main-file-name" "b.hip"
[Driver] Move the "-o OUT -x TYPE SRC.c" flags to the end of -cc1 New -cc1 arguments, such as -faddrsig, have started appearing after the input name. I personally find it convenient for the input to be the last argument to the compile command line, since I often need to edit it when running crash reproduction scripts. Differential Revision: https://reviews.llvm.org/D62270 llvm-svn: 361530
2019-05-24 02:35:43 +08:00
// CHECK-SAME: {{.*}} "-fcuda-include-gpubinary" "[[BUNDLE_A]]"
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// CHECK-SAME: {{.*}} "-o" [[B_OBJ_HOST:".*o"]] "-x" "hip"
// CHECK-SAME: {{.*}} [[B_SRC]]
//
// Link host objects.
//
[HIP] Improve check patterns to avoid test failures in case string "opt", etc. happens to be in the InstallDir path in the -### output. Differential Revision: https://reviews.llvm.org/D82046
2020-06-18 03:35:33 +08:00
// LINK-NOT: {{".*/llvm-link"}}
// LINK-NOT: {{".*/opt"}}
// LINK-NOT: {{".*/llc"}}
[HIP] Do not use llvm-link/opt/llc for -fgpu-rdc This patch is a follow up on https://reviews.llvm.org/D81627. In addition to default -fno-gpu-rdc case, this patches let HIP toolchain not use llvm-link/opt/llc to link device code for -fgpu-rdc case. Instead, uses standard lto. This will eliminate some redundant optimizations and speed up the compilation/linking. Differential Revision: https://reviews.llvm.org/D81861
2020-06-14 21:07:31 +08:00
// LINK: [[LD:".*ld.*"]] {{.*}} [[A_OBJ_HOST]] [[B_OBJ_HOST]]
// LINK-NOT: "-T" "{{.*}}.lk"
[HIP] Improve check patterns to avoid test failures in case string "opt", etc. happens to be in the InstallDir path in the -### output. Differential Revision: https://reviews.llvm.org/D82046
2020-06-18 03:35:33 +08:00
// LKONLY-NOT: {{".*/llvm-link"}}
// LKONLY-NOT: {{".*/opt"}}
// LKONLY-NOT: {{".*/llc"}}
[HIP] Do not use llvm-link/opt/llc for -fgpu-rdc This patch is a follow up on https://reviews.llvm.org/D81627. In addition to default -fno-gpu-rdc case, this patches let HIP toolchain not use llvm-link/opt/llc to link device code for -fgpu-rdc case. Instead, uses standard lto. This will eliminate some redundant optimizations and speed up the compilation/linking. Differential Revision: https://reviews.llvm.org/D81861
2020-06-14 21:07:31 +08:00
// LKONLY: [[LD:".*ld.*"]] {{.*}} "{{.*/a.o}}" "{{.*/b.o}}"
// LKONLY-NOT: "-T" "{{.*}}.lk"