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llvm-project/llvm/test/CodeGen/X86/stride-nine-with-base-reg.ll

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Teach LSR sink to sink the immediate portion of the common expression back into uses if they fit in address modes of all the uses. llvm-svn: 65215
2009-02-21 10:06:47 +08:00
; RUN: llvm-as < %s | llc -march=x86 -relocation-model=static | not grep lea
Don't mask the isel bug. llvm-svn: 47018
2008-02-13 03:11:29 +08:00
; RUN: llvm-as < %s | llc -march=x86-64 | not grep lea
Strength reduction improvements. - Avoid attempting stride-reuse in the case that there are users that aren't addresses. In that case, there will be places where the multiplications won't be folded away, so it's better to try to strength-reduce them. - Several SSE intrinsics have operands that strength-reduction can treat as addresses. The previous item makes this more visible, as any non-address use of an IV can inhibit stride-reuse. - Make ValidStride aware of whether there's likely to be a base register in the address computation. This prevents it from thinking that things like stride 9 are valid on x86 when the base register is already occupied. Also, XFAIL the 2007-08-10-LEA16Use32.ll test; the new logic to avoid stride-reuse elimintes the LEA in the loop, so the test is no longer testing what it was intended to test. llvm-svn: 43231
2007-10-23 04:40:42 +08:00
Expand GEPs in ScalarEvolution expressions. SCEV expressions can now have pointer types, though in contrast to C pointer types, SCEV addition is never implicitly scaled. This not only eliminates the need for special code like IndVars' EliminatePointerRecurrence and LSR's own GEP expansion code, it also does a better job because it lets the normal optimizations handle pointer expressions just like integer expressions. Also, since LLVM IR GEPs can't directly index into multi-dimensional VLAs, moving the GEP analysis out of client code and into the SCEV framework makes it easier for clients to handle multi-dimensional VLAs the same way as other arrays. Some existing regression tests show improved optimization. test/CodeGen/ARM/2007-03-13-InstrSched.ll in particular improved to the point where if-conversion started kicking in; I turned it off for this test to preserve the intent of the test. llvm-svn: 69258
2009-04-16 11:18:22 +08:00
; P should be sunk into the loop and folded into the address mode. There
Teach LSR sink to sink the immediate portion of the common expression back into uses if they fit in address modes of all the uses. llvm-svn: 65215
2009-02-21 10:06:47 +08:00
; shouldn't be any lea instructions inside the loop.
Strength reduction improvements. - Avoid attempting stride-reuse in the case that there are users that aren't addresses. In that case, there will be places where the multiplications won't be folded away, so it's better to try to strength-reduce them. - Several SSE intrinsics have operands that strength-reduction can treat as addresses. The previous item makes this more visible, as any non-address use of an IV can inhibit stride-reuse. - Make ValidStride aware of whether there's likely to be a base register in the address computation. This prevents it from thinking that things like stride 9 are valid on x86 when the base register is already occupied. Also, XFAIL the 2007-08-10-LEA16Use32.ll test; the new logic to avoid stride-reuse elimintes the LEA in the loop, so the test is no longer testing what it was intended to test. llvm-svn: 43231
2007-10-23 04:40:42 +08:00
@B = external global [1000 x i8], align 32
@A = external global [1000 x i8], align 32
@P = external global [1000 x i8], align 32
Teach LSR sink to sink the immediate portion of the common expression back into uses if they fit in address modes of all the uses. llvm-svn: 65215
2009-02-21 10:06:47 +08:00
define void @foo(i32 %m, i32 %p) nounwind {
Strength reduction improvements. - Avoid attempting stride-reuse in the case that there are users that aren't addresses. In that case, there will be places where the multiplications won't be folded away, so it's better to try to strength-reduce them. - Several SSE intrinsics have operands that strength-reduction can treat as addresses. The previous item makes this more visible, as any non-address use of an IV can inhibit stride-reuse. - Make ValidStride aware of whether there's likely to be a base register in the address computation. This prevents it from thinking that things like stride 9 are valid on x86 when the base register is already occupied. Also, XFAIL the 2007-08-10-LEA16Use32.ll test; the new logic to avoid stride-reuse elimintes the LEA in the loop, so the test is no longer testing what it was intended to test. llvm-svn: 43231
2007-10-23 04:40:42 +08:00
entry:
%tmp1 = icmp sgt i32 %m, 0
br i1 %tmp1, label %bb, label %return
bb:
%i.019.0 = phi i32 [ %indvar.next, %bb ], [ 0, %entry ]
%tmp2 = getelementptr [1000 x i8]* @B, i32 0, i32 %i.019.0
%tmp3 = load i8* %tmp2, align 4
%tmp4 = mul i8 %tmp3, 2
%tmp5 = getelementptr [1000 x i8]* @A, i32 0, i32 %i.019.0
store i8 %tmp4, i8* %tmp5, align 4
%tmp8 = mul i32 %i.019.0, 9
%tmp0 = add i32 %tmp8, %p
%tmp10 = getelementptr [1000 x i8]* @P, i32 0, i32 %tmp0
store i8 17, i8* %tmp10, align 4
%indvar.next = add i32 %i.019.0, 1
%exitcond = icmp eq i32 %indvar.next, %m
br i1 %exitcond, label %return, label %bb
return:
ret void
}