2005-07-02 06:44:09 +08:00
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//===-- X86IntelAsmPrinter.cpp - Convert X86 LLVM code to Intel assembly --===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a printer that converts from our internal representation
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// of machine-dependent LLVM code to Intel format assembly language.
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// This printer is the output mechanism used by `llc'.
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//
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//===----------------------------------------------------------------------===//
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#include "X86IntelAsmPrinter.h"
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#include "X86.h"
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2006-05-02 09:16:28 +08:00
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#include "llvm/Constants.h"
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2005-07-02 06:44:09 +08:00
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#include "llvm/Module.h"
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#include "llvm/Assembly/Writer.h"
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#include "llvm/Support/Mangler.h"
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2006-02-18 08:15:05 +08:00
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#include "llvm/Target/TargetOptions.h"
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2005-07-02 06:44:09 +08:00
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using namespace llvm;
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2006-05-02 09:16:28 +08:00
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X86IntelAsmPrinter::X86IntelAsmPrinter(std::ostream &O, X86TargetMachine &TM)
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: X86SharedAsmPrinter(O, TM) {
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CommentString = ";";
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GlobalPrefix = "_";
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PrivateGlobalPrefix = "$";
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AlignDirective = "\talign\t";
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2006-05-02 11:58:45 +08:00
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MLSections = true;
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2006-05-02 11:46:13 +08:00
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ZeroDirective = "\tdb\t";
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ZeroDirectiveSuffix = " dup(0)";
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2006-05-02 09:16:28 +08:00
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AsciiDirective = "\tdb\t";
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AscizDirective = 0;
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Data8bitsDirective = "\t.db\t";
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Data16bitsDirective = "\t.dw\t";
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Data32bitsDirective = "\t.dd\t";
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Data64bitsDirective = "\t.dq\t";
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HasDotTypeDotSizeDirective = false;
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}
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2005-07-02 06:44:09 +08:00
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/// runOnMachineFunction - This uses the printMachineInstruction()
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/// method to print assembly for each instruction.
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///
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bool X86IntelAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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2006-03-07 10:23:26 +08:00
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if (forDarwin) {
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// Let PassManager know we need debug information and relay
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// the MachineDebugInfo address on to DwarfWriter.
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DW.SetDebugInfo(&getAnalysis<MachineDebugInfo>());
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}
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2006-03-07 10:02:57 +08:00
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2005-11-21 15:51:23 +08:00
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SetupMachineFunction(MF);
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2005-07-02 06:44:09 +08:00
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O << "\n\n";
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// Print out constants referenced by the function
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2005-11-21 16:32:23 +08:00
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EmitConstantPool(MF.getConstantPool());
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2005-07-02 06:44:09 +08:00
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// Print out labels for the function.
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2006-05-02 11:11:50 +08:00
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SwitchSection(".code", MF.getFunction());
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2005-11-21 15:51:23 +08:00
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EmitAlignment(4);
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2006-05-02 09:16:28 +08:00
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if (MF.getFunction()->getLinkage() == GlobalValue::ExternalLinkage)
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O << "\tpublic " << CurrentFnName << "\n";
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O << CurrentFnName << "\tproc near\n";
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2006-04-08 04:44:42 +08:00
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if (forDarwin) {
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// Emit pre-function debug information.
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DW.BeginFunction(&MF);
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}
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2005-07-02 06:44:09 +08:00
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// Print out code for the function.
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for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
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I != E; ++I) {
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// Print a label for the basic block if there are any predecessors.
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2006-05-02 13:37:32 +08:00
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if (I->pred_begin() != I->pred_end()) {
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printBasicBlockLabel(I, true);
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O << '\n';
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}
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2005-07-02 06:44:09 +08:00
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for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
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II != E; ++II) {
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// Print the assembly for the instruction.
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O << "\t";
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printMachineInstruction(II);
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}
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}
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2006-03-07 10:23:26 +08:00
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if (forDarwin) {
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// Emit post-function debug information.
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2006-03-24 02:09:44 +08:00
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DW.EndFunction();
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2006-03-07 10:23:26 +08:00
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}
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2006-03-07 10:02:57 +08:00
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2006-05-02 09:16:28 +08:00
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O << CurrentFnName << "\tendp\n";
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2005-07-02 06:44:09 +08:00
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// We didn't modify anything.
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return false;
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}
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2005-12-01 02:54:35 +08:00
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void X86IntelAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op) {
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2005-07-15 06:52:25 +08:00
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unsigned char value = MI->getOperand(Op).getImmedValue();
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assert(value <= 7 && "Invalid ssecc argument!");
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switch (value) {
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case 0: O << "eq"; break;
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case 1: O << "lt"; break;
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case 2: O << "le"; break;
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case 3: O << "unord"; break;
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case 4: O << "neq"; break;
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case 5: O << "nlt"; break;
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case 6: O << "nle"; break;
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case 7: O << "ord"; break;
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}
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}
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2006-02-07 07:41:19 +08:00
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void X86IntelAsmPrinter::printOp(const MachineOperand &MO,
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const char *Modifier) {
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2005-07-02 06:44:09 +08:00
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const MRegisterInfo &RI = *TM.getRegisterInfo();
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switch (MO.getType()) {
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case MachineOperand::MO_VirtualRegister:
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if (MRegisterInfo::isPhysicalRegister(MO.getReg()))
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2006-05-01 13:53:50 +08:00
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O << RI.get(MO.getReg()).Name;
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2005-07-02 06:44:09 +08:00
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else
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2006-05-01 13:53:50 +08:00
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O << "reg" << MO.getReg();
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2005-07-02 06:44:09 +08:00
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return;
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case MachineOperand::MO_SignExtendedImmed:
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case MachineOperand::MO_UnextendedImmed:
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O << (int)MO.getImmedValue();
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return;
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2006-04-23 02:53:45 +08:00
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case MachineOperand::MO_MachineBasicBlock:
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printBasicBlockLabel(MO.getMachineBasicBlock());
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2005-07-02 06:44:09 +08:00
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return;
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2006-02-26 16:28:12 +08:00
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case MachineOperand::MO_ConstantPoolIndex: {
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bool isMemOp = Modifier && !strcmp(Modifier, "mem");
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if (!isMemOp) O << "OFFSET ";
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O << "[" << PrivateGlobalPrefix << "CPI" << getFunctionNumber() << "_"
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<< MO.getConstantPoolIndex();
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if (forDarwin && TM.getRelocationModel() == Reloc::PIC)
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O << "-\"L" << getFunctionNumber() << "$pb\"";
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int Offset = MO.getOffset();
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if (Offset > 0)
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O << " + " << Offset;
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else if (Offset < 0)
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O << Offset;
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O << "]";
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return;
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}
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2005-07-02 06:44:09 +08:00
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case MachineOperand::MO_GlobalAddress: {
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2006-02-18 08:15:05 +08:00
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bool isCallOp = Modifier && !strcmp(Modifier, "call");
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bool isMemOp = Modifier && !strcmp(Modifier, "mem");
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if (!isMemOp && !isCallOp) O << "OFFSET ";
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2006-02-23 04:19:42 +08:00
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if (forDarwin && TM.getRelocationModel() != Reloc::Static) {
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2006-02-18 08:15:05 +08:00
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GlobalValue *GV = MO.getGlobal();
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std::string Name = Mang->getValueName(GV);
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if (!isMemOp && !isCallOp) O << '$';
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// Link-once, External, or Weakly-linked global variables need
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// non-lazily-resolved stubs
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if (GV->isExternal() || GV->hasWeakLinkage() ||
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GV->hasLinkOnceLinkage()) {
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// Dynamically-resolved functions need a stub for the function.
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if (isCallOp && isa<Function>(GV) && cast<Function>(GV)->isExternal()) {
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FnStubs.insert(Name);
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O << "L" << Name << "$stub";
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} else {
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GVStubs.insert(Name);
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O << "L" << Name << "$non_lazy_ptr";
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}
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} else {
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O << Mang->getValueName(GV);
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}
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2006-02-23 10:43:52 +08:00
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if (!isCallOp && TM.getRelocationModel() == Reloc::PIC)
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O << "-\"L" << getFunctionNumber() << "$pb\"";
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2006-02-18 08:15:05 +08:00
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} else
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O << Mang->getValueName(MO.getGlobal());
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2005-07-02 06:44:09 +08:00
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int Offset = MO.getOffset();
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if (Offset > 0)
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O << " + " << Offset;
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else if (Offset < 0)
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2005-11-30 09:59:00 +08:00
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O << Offset;
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2005-07-02 06:44:09 +08:00
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return;
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}
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2006-02-18 08:15:05 +08:00
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case MachineOperand::MO_ExternalSymbol: {
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bool isCallOp = Modifier && !strcmp(Modifier, "call");
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2006-02-23 04:19:42 +08:00
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if (isCallOp && forDarwin && TM.getRelocationModel() != Reloc::Static) {
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std::string Name(GlobalPrefix);
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Name += MO.getSymbolName();
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2006-02-18 08:15:05 +08:00
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FnStubs.insert(Name);
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O << "L" << Name << "$stub";
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return;
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}
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2006-02-23 04:19:42 +08:00
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if (!isCallOp) O << "OFFSET ";
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2005-07-02 06:44:09 +08:00
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O << GlobalPrefix << MO.getSymbolName();
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return;
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2006-02-18 08:15:05 +08:00
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}
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2005-07-02 06:44:09 +08:00
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default:
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O << "<unknown operand type>"; return;
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}
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}
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void X86IntelAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op){
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assert(isMem(MI, Op) && "Invalid memory reference!");
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const MachineOperand &BaseReg = MI->getOperand(Op);
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int ScaleVal = MI->getOperand(Op+1).getImmedValue();
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const MachineOperand &IndexReg = MI->getOperand(Op+2);
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const MachineOperand &DispSpec = MI->getOperand(Op+3);
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if (BaseReg.isFrameIndex()) {
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O << "[frame slot #" << BaseReg.getFrameIndex();
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if (DispSpec.getImmedValue())
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O << " + " << DispSpec.getImmedValue();
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O << "]";
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return;
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}
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O << "[";
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bool NeedPlus = false;
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if (BaseReg.getReg()) {
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2006-02-07 16:38:37 +08:00
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printOp(BaseReg, "mem");
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2005-07-02 06:44:09 +08:00
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NeedPlus = true;
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}
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if (IndexReg.getReg()) {
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if (NeedPlus) O << " + ";
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if (ScaleVal != 1)
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O << ScaleVal << "*";
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printOp(IndexReg);
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NeedPlus = true;
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}
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2006-02-26 16:28:12 +08:00
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if (DispSpec.isGlobalAddress() || DispSpec.isConstantPoolIndex()) {
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2005-07-02 06:44:09 +08:00
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if (NeedPlus)
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O << " + ";
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2006-02-07 16:38:37 +08:00
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printOp(DispSpec, "mem");
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2005-07-02 06:44:09 +08:00
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} else {
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int DispVal = DispSpec.getImmedValue();
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if (DispVal || (!BaseReg.getReg() && !IndexReg.getReg())) {
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if (NeedPlus)
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if (DispVal > 0)
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O << " + ";
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else {
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O << " - ";
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DispVal = -DispVal;
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}
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O << DispVal;
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}
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}
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O << "]";
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}
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2006-02-18 08:15:05 +08:00
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void X86IntelAsmPrinter::printPICLabel(const MachineInstr *MI, unsigned Op) {
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O << "\"L" << getFunctionNumber() << "$pb\"\n";
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O << "\"L" << getFunctionNumber() << "$pb\":";
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}
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2005-07-02 06:44:09 +08:00
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2006-04-29 07:19:39 +08:00
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bool X86IntelAsmPrinter::printAsmMRegister(const MachineOperand &MO,
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2006-04-29 07:11:40 +08:00
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const char Mode) {
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const MRegisterInfo &RI = *TM.getRegisterInfo();
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unsigned Reg = MO.getReg();
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const char *Name = RI.get(Reg).Name;
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switch (Mode) {
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default: return true; // Unknown mode.
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case 'b': // Print QImode register
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switch (Reg) {
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default: return true;
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case X86::AH: case X86::AL: case X86::AX: case X86::EAX:
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Name = "AL";
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break;
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case X86::DH: case X86::DL: case X86::DX: case X86::EDX:
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Name = "DL";
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break;
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case X86::CH: case X86::CL: case X86::CX: case X86::ECX:
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Name = "CL";
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break;
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case X86::BH: case X86::BL: case X86::BX: case X86::EBX:
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Name = "BL";
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break;
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case X86::ESI:
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Name = "SIL";
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break;
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case X86::EDI:
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Name = "DIL";
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break;
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case X86::EBP:
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Name = "BPL";
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break;
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case X86::ESP:
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Name = "SPL";
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break;
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}
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break;
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case 'h': // Print QImode high register
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switch (Reg) {
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default: return true;
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case X86::AH: case X86::AL: case X86::AX: case X86::EAX:
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Name = "AL";
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break;
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case X86::DH: case X86::DL: case X86::DX: case X86::EDX:
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Name = "DL";
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break;
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case X86::CH: case X86::CL: case X86::CX: case X86::ECX:
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Name = "CL";
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break;
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case X86::BH: case X86::BL: case X86::BX: case X86::EBX:
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Name = "BL";
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break;
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}
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break;
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case 'w': // Print HImode register
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switch (Reg) {
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default: return true;
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case X86::AH: case X86::AL: case X86::AX: case X86::EAX:
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Name = "AX";
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break;
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case X86::DH: case X86::DL: case X86::DX: case X86::EDX:
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Name = "DX";
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break;
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case X86::CH: case X86::CL: case X86::CX: case X86::ECX:
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Name = "CX";
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break;
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case X86::BH: case X86::BL: case X86::BX: case X86::EBX:
|
|
|
|
Name = "BX";
|
|
|
|
break;
|
|
|
|
case X86::ESI:
|
|
|
|
Name = "SI";
|
|
|
|
break;
|
|
|
|
case X86::EDI:
|
|
|
|
Name = "DI";
|
|
|
|
break;
|
|
|
|
case X86::EBP:
|
|
|
|
Name = "BP";
|
|
|
|
break;
|
|
|
|
case X86::ESP:
|
|
|
|
Name = "SP";
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 'k': // Print SImode register
|
|
|
|
switch (Reg) {
|
|
|
|
default: return true;
|
|
|
|
case X86::AH: case X86::AL: case X86::AX: case X86::EAX:
|
|
|
|
Name = "EAX";
|
|
|
|
break;
|
|
|
|
case X86::DH: case X86::DL: case X86::DX: case X86::EDX:
|
|
|
|
Name = "EDX";
|
|
|
|
break;
|
|
|
|
case X86::CH: case X86::CL: case X86::CX: case X86::ECX:
|
|
|
|
Name = "ECX";
|
|
|
|
break;
|
|
|
|
case X86::BH: case X86::BL: case X86::BX: case X86::EBX:
|
|
|
|
Name = "EBX";
|
|
|
|
break;
|
|
|
|
case X86::ESI:
|
|
|
|
Name = "ESI";
|
|
|
|
break;
|
|
|
|
case X86::EDI:
|
|
|
|
Name = "EDI";
|
|
|
|
break;
|
|
|
|
case X86::EBP:
|
|
|
|
Name = "EBP";
|
|
|
|
break;
|
|
|
|
case X86::ESP:
|
|
|
|
Name = "ESP";
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2006-05-01 13:53:50 +08:00
|
|
|
O << Name;
|
2006-04-29 07:11:40 +08:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2006-04-29 05:19:05 +08:00
|
|
|
/// PrintAsmOperand - Print out an operand for an inline asm expression.
|
|
|
|
///
|
|
|
|
bool X86IntelAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
|
|
|
|
unsigned AsmVariant,
|
|
|
|
const char *ExtraCode) {
|
|
|
|
// Does this asm operand have a single letter operand modifier?
|
|
|
|
if (ExtraCode && ExtraCode[0]) {
|
|
|
|
if (ExtraCode[1] != 0) return true; // Unknown modifier.
|
|
|
|
|
|
|
|
switch (ExtraCode[0]) {
|
|
|
|
default: return true; // Unknown modifier.
|
2006-04-29 07:11:40 +08:00
|
|
|
case 'b': // Print QImode register
|
|
|
|
case 'h': // Print QImode high register
|
|
|
|
case 'w': // Print HImode register
|
|
|
|
case 'k': // Print SImode register
|
2006-04-29 07:19:39 +08:00
|
|
|
return printAsmMRegister(MI->getOperand(OpNo), ExtraCode[0]);
|
2006-04-29 05:19:05 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
printOperand(MI, OpNo);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool X86IntelAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
|
|
|
|
unsigned OpNo,
|
|
|
|
unsigned AsmVariant,
|
|
|
|
const char *ExtraCode) {
|
|
|
|
if (ExtraCode && ExtraCode[0])
|
|
|
|
return true; // Unknown modifier.
|
|
|
|
printMemReference(MI, OpNo);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2005-07-02 06:44:09 +08:00
|
|
|
/// printMachineInstruction -- Print out a single X86 LLVM instruction
|
|
|
|
/// MI in Intel syntax to the current output stream.
|
|
|
|
///
|
|
|
|
void X86IntelAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
|
|
|
|
++EmittedInsts;
|
|
|
|
|
|
|
|
// Call the autogenerated instruction printer routines.
|
|
|
|
printInstruction(MI);
|
|
|
|
}
|
|
|
|
|
|
|
|
bool X86IntelAsmPrinter::doInitialization(Module &M) {
|
2005-07-04 01:34:39 +08:00
|
|
|
X86SharedAsmPrinter::doInitialization(M);
|
2006-05-02 09:16:28 +08:00
|
|
|
Mang->markCharUnacceptable('.');
|
2006-05-02 11:11:50 +08:00
|
|
|
PrivateGlobalPrefix = "$"; // need this here too :(
|
|
|
|
O << "\t.686\n\t.model flat\n\n";
|
|
|
|
|
|
|
|
// Emit declarations for external functions.
|
|
|
|
for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I)
|
|
|
|
if (I->isExternal())
|
|
|
|
O << "\textern " << Mang->getValueName(I) << ":near\n";
|
|
|
|
|
|
|
|
// Emit declarations for external globals.
|
|
|
|
for (Module::const_global_iterator I = M.global_begin(), E = M.global_end();
|
|
|
|
I != E; ++I) {
|
|
|
|
if (I->isExternal())
|
|
|
|
O << "\textern " << Mang->getValueName(I) << ":byte\n";
|
|
|
|
}
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool X86IntelAsmPrinter::doFinalization(Module &M) {
|
|
|
|
X86SharedAsmPrinter::doFinalization(M);
|
2006-05-02 11:58:45 +08:00
|
|
|
SwitchSection("", 0);
|
2006-05-02 11:11:50 +08:00
|
|
|
O << "\tend\n";
|
2005-07-02 06:44:09 +08:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2006-05-02 09:16:28 +08:00
|
|
|
void X86IntelAsmPrinter::EmitString(const ConstantArray *CVA) const {
|
|
|
|
unsigned NumElts = CVA->getNumOperands();
|
|
|
|
if (NumElts) {
|
|
|
|
// ML does not have escape sequences except '' for '. It also has a maximum
|
|
|
|
// string length of 255.
|
|
|
|
unsigned len = 0;
|
|
|
|
bool inString = false;
|
|
|
|
for (unsigned i = 0; i < NumElts; i++) {
|
|
|
|
int n = cast<ConstantInt>(CVA->getOperand(i))->getRawValue() & 255;
|
|
|
|
if (len == 0)
|
|
|
|
O << "\tdb ";
|
|
|
|
|
|
|
|
if (n >= 32 && n <= 127) {
|
|
|
|
if (!inString) {
|
|
|
|
if (len > 0) {
|
|
|
|
O << ",'";
|
|
|
|
len += 2;
|
|
|
|
} else {
|
|
|
|
O << "'";
|
|
|
|
len++;
|
|
|
|
}
|
|
|
|
inString = true;
|
|
|
|
}
|
|
|
|
if (n == '\'') {
|
|
|
|
O << "'";
|
|
|
|
len++;
|
|
|
|
}
|
|
|
|
O << char(n);
|
|
|
|
} else {
|
|
|
|
if (inString) {
|
|
|
|
O << "'";
|
|
|
|
len++;
|
|
|
|
inString = false;
|
|
|
|
}
|
|
|
|
if (len > 0) {
|
|
|
|
O << ",";
|
|
|
|
len++;
|
|
|
|
}
|
|
|
|
O << n;
|
|
|
|
len += 1 + (n > 9) + (n > 99);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (len > 60) {
|
|
|
|
if (inString) {
|
|
|
|
O << "'";
|
|
|
|
inString = false;
|
|
|
|
}
|
|
|
|
O << "\n";
|
|
|
|
len = 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (len > 0) {
|
|
|
|
if (inString)
|
|
|
|
O << "'";
|
|
|
|
O << "\n";
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2005-07-02 06:44:09 +08:00
|
|
|
// Include the auto-generated portion of the assembly writer.
|
|
|
|
#include "X86GenAsmWriter1.inc"
|