forked from OSchip/llvm-project
33 lines
1002 B
LLVM
33 lines
1002 B
LLVM
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; RUN: llc -march=x86 -stop-after expand-isel-pseudos <%s 2>&1 | FileCheck %s
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target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
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target triple = "i386-unknown-linux-gnu"
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; This test checks to make sure the lshr in %then1 block gets expanded using
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; GR16_ABCD pattern rather than GR32_ABCD pattern. By using the 16-bit pattern
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; this doesn't make the register liveness information look like the whole
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; 32-bit register is a live value, and allows generally better live register
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; analysis.
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; CHECK-LABEL: bb.1.then1:
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; CHECK-NOT: IMPLICIT_DEF
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; CHECK-NOT: INSERT_SUBREG
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; CHECK: sub_8bit_hi
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; CHECK-LABEL: bb.2.endif1:
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define i16 @foo4(i32 %prec, i8 *%dst, i16 *%src) {
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entry:
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%cnd = icmp ne i32 %prec, 0
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%t0 = load i16, i16 *%src, align 2
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br i1 %cnd, label %then1, label %endif1
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then1:
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%shr = lshr i16 %t0, 8
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%conv = trunc i16 %shr to i8
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store i8 %conv, i8 *%dst, align 1
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br label %endif1
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endif1:
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%t2 = phi i16 [0, %then1], [%t0, %entry]
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ret i16 %t2
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}
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