2015-01-07 02:00:21 +08:00
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; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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2014-04-18 13:19:26 +08:00
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; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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2014-03-18 02:58:11 +08:00
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2014-03-28 01:23:24 +08:00
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declare i32 @llvm.AMDGPU.imax(i32, i32) nounwind readnone
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2014-11-15 02:18:16 +08:00
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declare i32 @llvm.r600.read.tidig.x() nounwind readnone
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2014-03-28 01:23:24 +08:00
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2014-10-02 01:15:17 +08:00
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; FUNC-LABEL: {{^}}sext_in_reg_i1_i32:
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2014-11-05 22:50:53 +08:00
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; SI: s_load_dword [[ARG:s[0-9]+]],
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; SI: s_bfe_i32 [[SEXTRACT:s[0-9]+]], [[ARG]], 0x10000
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; SI: v_mov_b32_e32 [[EXTRACT:v[0-9]+]], [[SEXTRACT]]
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; SI: buffer_store_dword [[EXTRACT]],
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2014-03-18 02:58:11 +08:00
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2014-04-16 09:41:34 +08:00
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; EG: MEM_{{.*}} STORE_{{.*}} [[RES:T[0-9]+\.[XYZW]]], [[ADDR:T[0-9]+.[XYZW]]]
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2015-12-04 09:51:19 +08:00
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; EG: LSHR * [[ADDR]]
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; EG: BFE_INT * [[RES]], {{.*}}, 0.0, 1
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2014-03-18 02:58:11 +08:00
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define void @sext_in_reg_i1_i32(i32 addrspace(1)* %out, i32 %in) {
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%shl = shl i32 %in, 31
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%sext = ashr i32 %shl, 31
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store i32 %sext, i32 addrspace(1)* %out
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ret void
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}
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2014-10-02 01:15:17 +08:00
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; FUNC-LABEL: {{^}}sext_in_reg_i8_to_i32:
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2014-11-05 22:50:53 +08:00
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; SI: s_add_i32 [[VAL:s[0-9]+]],
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; SI: s_sext_i32_i8 [[EXTRACT:s[0-9]+]], [[VAL]]
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; SI: v_mov_b32_e32 [[VEXTRACT:v[0-9]+]], [[EXTRACT]]
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; SI: buffer_store_dword [[VEXTRACT]],
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2014-03-18 02:58:11 +08:00
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2014-04-16 09:41:34 +08:00
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; EG: MEM_{{.*}} STORE_{{.*}} [[RES:T[0-9]+\.[XYZW]]], [[ADDR:T[0-9]+.[XYZW]]]
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; EG: ADD_INT
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; EG-NEXT: BFE_INT [[RES]], {{.*}}, 0.0, literal
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; EG-NEXT: LSHR * [[ADDR]]
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2014-03-18 02:58:11 +08:00
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define void @sext_in_reg_i8_to_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
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%c = add i32 %a, %b ; add to prevent folding into extload
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%shl = shl i32 %c, 24
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%ashr = ashr i32 %shl, 24
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store i32 %ashr, i32 addrspace(1)* %out, align 4
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|
ret void
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|
}
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|
2014-10-02 01:15:17 +08:00
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|
; FUNC-LABEL: {{^}}sext_in_reg_i16_to_i32:
|
2014-11-05 22:50:53 +08:00
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|
|
; SI: s_add_i32 [[VAL:s[0-9]+]],
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; SI: s_sext_i32_i16 [[EXTRACT:s[0-9]+]], [[VAL]]
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; SI: v_mov_b32_e32 [[VEXTRACT:v[0-9]+]], [[EXTRACT]]
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|
; SI: buffer_store_dword [[VEXTRACT]],
|
2014-03-18 02:58:11 +08:00
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|
2014-04-16 09:41:34 +08:00
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|
|
; EG: MEM_{{.*}} STORE_{{.*}} [[RES:T[0-9]+\.[XYZW]]], [[ADDR:T[0-9]+.[XYZW]]]
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|
; EG: ADD_INT
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|
; EG-NEXT: BFE_INT [[RES]], {{.*}}, 0.0, literal
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; EG-NEXT: LSHR * [[ADDR]]
|
2014-03-18 02:58:11 +08:00
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|
define void @sext_in_reg_i16_to_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
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%c = add i32 %a, %b ; add to prevent folding into extload
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|
%shl = shl i32 %c, 16
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%ashr = ashr i32 %shl, 16
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|
store i32 %ashr, i32 addrspace(1)* %out, align 4
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|
ret void
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|
}
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|
2014-10-02 01:15:17 +08:00
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|
|
; FUNC-LABEL: {{^}}sext_in_reg_i8_to_v1i32:
|
2014-11-05 22:50:53 +08:00
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|
|
; SI: s_add_i32 [[VAL:s[0-9]+]],
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; SI: s_sext_i32_i8 [[EXTRACT:s[0-9]+]], [[VAL]]
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; SI: v_mov_b32_e32 [[VEXTRACT:v[0-9]+]], [[EXTRACT]]
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|
; SI: buffer_store_dword [[VEXTRACT]],
|
2014-03-18 02:58:11 +08:00
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|
2014-04-16 09:41:34 +08:00
|
|
|
; EG: MEM_{{.*}} STORE_{{.*}} [[RES:T[0-9]+\.[XYZW]]], [[ADDR:T[0-9]+.[XYZW]]]
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|
; EG: ADD_INT
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|
; EG-NEXT: BFE_INT [[RES]], {{.*}}, 0.0, literal
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|
; EG-NEXT: LSHR * [[ADDR]]
|
2014-03-18 02:58:11 +08:00
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|
|
define void @sext_in_reg_i8_to_v1i32(<1 x i32> addrspace(1)* %out, <1 x i32> %a, <1 x i32> %b) nounwind {
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|
%c = add <1 x i32> %a, %b ; add to prevent folding into extload
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|
%shl = shl <1 x i32> %c, <i32 24>
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|
%ashr = ashr <1 x i32> %shl, <i32 24>
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|
store <1 x i32> %ashr, <1 x i32> addrspace(1)* %out, align 4
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|
|
|
ret void
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|
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|
|
}
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|
2014-10-02 01:15:17 +08:00
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|
|
; FUNC-LABEL: {{^}}sext_in_reg_i1_to_i64:
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2014-11-15 02:18:16 +08:00
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|
|
; SI: s_lshl_b64 [[VAL:s\[[0-9]+:[0-9]+\]]]
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|
; SI-DAG: s_bfe_i64 s{{\[}}[[SLO:[0-9]+]]:[[SHI:[0-9]+]]{{\]}}, [[VAL]], 0x10000
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|
; SI-DAG: v_mov_b32_e32 v[[VLO:[0-9]+]], s[[SLO]]
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|
; SI-DAG: v_mov_b32_e32 v[[VHI:[0-9]+]], s[[SHI]]
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|
|
; SI: buffer_store_dwordx2 v{{\[}}[[VLO]]:[[VHI]]{{\]}}
|
2014-04-22 11:49:30 +08:00
|
|
|
define void @sext_in_reg_i1_to_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
|
2014-11-15 02:18:16 +08:00
|
|
|
%c = shl i64 %a, %b
|
2014-04-22 11:49:30 +08:00
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|
|
%shl = shl i64 %c, 63
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|
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|
%ashr = ashr i64 %shl, 63
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|
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|
store i64 %ashr, i64 addrspace(1)* %out, align 8
|
|
|
|
|
ret void
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|
|
|
|
}
|
|
|
|
|
|
2014-10-02 01:15:17 +08:00
|
|
|
; FUNC-LABEL: {{^}}sext_in_reg_i8_to_i64:
|
2014-11-15 02:18:16 +08:00
|
|
|
; SI: s_lshl_b64 [[VAL:s\[[0-9]+:[0-9]+\]]]
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|
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|
|
; SI-DAG: s_bfe_i64 s{{\[}}[[SLO:[0-9]+]]:[[SHI:[0-9]+]]{{\]}}, [[VAL]], 0x80000
|
|
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|
|
; SI-DAG: v_mov_b32_e32 v[[VLO:[0-9]+]], s[[SLO]]
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|
|
|
|
; SI-DAG: v_mov_b32_e32 v[[VHI:[0-9]+]], s[[SHI]]
|
|
|
|
|
; SI: buffer_store_dwordx2 v{{\[}}[[VLO]]:[[VHI]]{{\]}}
|
2014-03-18 02:58:11 +08:00
|
|
|
|
2014-04-16 09:41:34 +08:00
|
|
|
; EG: MEM_{{.*}} STORE_{{.*}} [[RES_LO:T[0-9]+\.[XYZW]]], [[ADDR_LO:T[0-9]+.[XYZW]]]
|
|
|
|
|
; EG: MEM_{{.*}} STORE_{{.*}} [[RES_HI:T[0-9]+\.[XYZW]]], [[ADDR_HI:T[0-9]+.[XYZW]]]
|
2014-11-15 02:18:16 +08:00
|
|
|
; EG: LSHL
|
|
|
|
|
; EG: BFE_INT {{\*?}} [[RES_LO]], {{.*}}, 0.0, literal
|
2014-04-16 09:41:34 +08:00
|
|
|
; EG: ASHR [[RES_HI]]
|
|
|
|
|
; EG-NOT: BFE_INT
|
|
|
|
|
; EG: LSHR
|
|
|
|
|
; EG: LSHR
|
|
|
|
|
;; TODO Check address computation, using | with variables in {{}} does not work,
|
|
|
|
|
;; also the _LO/_HI order might be different
|
2014-03-18 02:58:11 +08:00
|
|
|
define void @sext_in_reg_i8_to_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
|
2014-11-15 02:18:16 +08:00
|
|
|
%c = shl i64 %a, %b
|
2014-03-18 02:58:11 +08:00
|
|
|
%shl = shl i64 %c, 56
|
|
|
|
|
%ashr = ashr i64 %shl, 56
|
|
|
|
|
store i64 %ashr, i64 addrspace(1)* %out, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
2014-10-02 01:15:17 +08:00
|
|
|
; FUNC-LABEL: {{^}}sext_in_reg_i16_to_i64:
|
2014-11-15 02:18:16 +08:00
|
|
|
; SI: s_lshl_b64 [[VAL:s\[[0-9]+:[0-9]+\]]]
|
|
|
|
|
; SI-DAG: s_bfe_i64 s{{\[}}[[SLO:[0-9]+]]:[[SHI:[0-9]+]]{{\]}}, [[VAL]], 0x100000
|
|
|
|
|
; SI-DAG: v_mov_b32_e32 v[[VLO:[0-9]+]], s[[SLO]]
|
|
|
|
|
; SI-DAG: v_mov_b32_e32 v[[VHI:[0-9]+]], s[[SHI]]
|
|
|
|
|
; SI: buffer_store_dwordx2 v{{\[}}[[VLO]]:[[VHI]]{{\]}}
|
2014-03-18 02:58:11 +08:00
|
|
|
|
2014-04-16 09:41:34 +08:00
|
|
|
; EG: MEM_{{.*}} STORE_{{.*}} [[RES_LO:T[0-9]+\.[XYZW]]], [[ADDR_LO:T[0-9]+.[XYZW]]]
|
|
|
|
|
; EG: MEM_{{.*}} STORE_{{.*}} [[RES_HI:T[0-9]+\.[XYZW]]], [[ADDR_HI:T[0-9]+.[XYZW]]]
|
2014-11-15 02:18:16 +08:00
|
|
|
; EG: LSHL
|
|
|
|
|
; EG: BFE_INT {{\*?}} [[RES_LO]], {{.*}}, 0.0, literal
|
2014-04-16 09:41:34 +08:00
|
|
|
; EG: ASHR [[RES_HI]]
|
|
|
|
|
; EG-NOT: BFE_INT
|
|
|
|
|
; EG: LSHR
|
|
|
|
|
; EG: LSHR
|
|
|
|
|
;; TODO Check address computation, using | with variables in {{}} does not work,
|
|
|
|
|
;; also the _LO/_HI order might be different
|
2014-03-18 02:58:11 +08:00
|
|
|
define void @sext_in_reg_i16_to_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
|
2014-11-15 02:18:16 +08:00
|
|
|
%c = shl i64 %a, %b
|
2014-03-18 02:58:11 +08:00
|
|
|
%shl = shl i64 %c, 48
|
|
|
|
|
%ashr = ashr i64 %shl, 48
|
|
|
|
|
store i64 %ashr, i64 addrspace(1)* %out, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
2014-10-02 01:15:17 +08:00
|
|
|
; FUNC-LABEL: {{^}}sext_in_reg_i32_to_i64:
|
2014-11-15 02:18:16 +08:00
|
|
|
; SI: s_lshl_b64 [[VAL:s\[[0-9]+:[0-9]+\]]]
|
|
|
|
|
; SI-DAG: s_bfe_i64 s{{\[}}[[SLO:[0-9]+]]:[[SHI:[0-9]+]]{{\]}}, [[VAL]], 0x200000
|
|
|
|
|
; SI-DAG: v_mov_b32_e32 v[[VLO:[0-9]+]], s[[SLO]]
|
|
|
|
|
; SI-DAG: v_mov_b32_e32 v[[VHI:[0-9]+]], s[[SHI]]
|
|
|
|
|
; SI: buffer_store_dwordx2 v{{\[}}[[VLO]]:[[VHI]]{{\]}}
|
2014-04-16 09:41:34 +08:00
|
|
|
|
|
|
|
|
; EG: MEM_{{.*}} STORE_{{.*}} [[RES_LO:T[0-9]+\.[XYZW]]], [[ADDR_LO:T[0-9]+.[XYZW]]]
|
|
|
|
|
; EG: MEM_{{.*}} STORE_{{.*}} [[RES_HI:T[0-9]+\.[XYZW]]], [[ADDR_HI:T[0-9]+.[XYZW]]]
|
|
|
|
|
; EG-NOT: BFE_INT
|
2014-11-15 02:18:16 +08:00
|
|
|
|
2014-04-16 09:41:34 +08:00
|
|
|
; EG: ASHR [[RES_HI]]
|
2014-11-15 02:18:16 +08:00
|
|
|
|
2014-04-16 09:41:34 +08:00
|
|
|
; EG: LSHR
|
|
|
|
|
; EG: LSHR
|
|
|
|
|
;; TODO Check address computation, using | with variables in {{}} does not work,
|
|
|
|
|
;; also the _LO/_HI order might be different
|
2014-03-27 02:31:06 +08:00
|
|
|
define void @sext_in_reg_i32_to_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
|
2014-11-15 02:18:16 +08:00
|
|
|
%c = shl i64 %a, %b
|
2014-03-27 02:31:06 +08:00
|
|
|
%shl = shl i64 %c, 32
|
|
|
|
|
%ashr = ashr i64 %shl, 32
|
|
|
|
|
store i64 %ashr, i64 addrspace(1)* %out, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
2014-03-18 02:58:11 +08:00
|
|
|
; This is broken on Evergreen for some reason related to the <1 x i64> kernel arguments.
|
2014-10-02 01:15:17 +08:00
|
|
|
; XFUNC-LABEL: {{^}}sext_in_reg_i8_to_v1i64:
|
2014-11-05 22:50:53 +08:00
|
|
|
; XSI: s_bfe_i32 [[EXTRACT:s[0-9]+]], {{s[0-9]+}}, 524288
|
|
|
|
|
; XSI: s_ashr_i32 {{v[0-9]+}}, [[EXTRACT]], 31
|
|
|
|
|
; XSI: buffer_store_dword
|
2014-03-18 02:58:11 +08:00
|
|
|
; XEG: BFE_INT
|
|
|
|
|
; XEG: ASHR
|
|
|
|
|
; define void @sext_in_reg_i8_to_v1i64(<1 x i64> addrspace(1)* %out, <1 x i64> %a, <1 x i64> %b) nounwind {
|
|
|
|
|
; %c = add <1 x i64> %a, %b
|
|
|
|
|
; %shl = shl <1 x i64> %c, <i64 56>
|
|
|
|
|
; %ashr = ashr <1 x i64> %shl, <i64 56>
|
|
|
|
|
; store <1 x i64> %ashr, <1 x i64> addrspace(1)* %out, align 8
|
|
|
|
|
; ret void
|
|
|
|
|
; }
|
|
|
|
|
|
2014-11-15 02:18:16 +08:00
|
|
|
; FUNC-LABEL: {{^}}v_sext_in_reg_i1_to_i64:
|
|
|
|
|
; SI: buffer_load_dwordx2
|
|
|
|
|
; SI: v_lshl_b64 v{{\[}}[[VAL_LO:[0-9]+]]:[[VAL_HI:[0-9]+]]{{\]}}
|
|
|
|
|
; SI: v_bfe_i32 v[[LO:[0-9]+]], v[[VAL_LO]], 0, 1
|
|
|
|
|
; SI: v_ashrrev_i32_e32 v[[HI:[0-9]+]], 31, v[[LO]]
|
|
|
|
|
; SI: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}}
|
|
|
|
|
define void @v_sext_in_reg_i1_to_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 addrspace(1)* %bptr) nounwind {
|
|
|
|
|
%tid = call i32 @llvm.r600.read.tidig.x()
|
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
One of several parallel first steps to remove the target type of pointers,
replacing them with a single opaque pointer type.
This adds an explicit type parameter to the gep instruction so that when the
first parameter becomes an opaque pointer type, the type to gep through is
still available to the instructions.
* This doesn't modify gep operators, only instructions (operators will be
handled separately)
* Textual IR changes only. Bitcode (including upgrade) and changing the
in-memory representation will be in separate changes.
* geps of vectors are transformed as:
getelementptr <4 x float*> %x, ...
->getelementptr float, <4 x float*> %x, ...
Then, once the opaque pointer type is introduced, this will ultimately look
like:
getelementptr float, <4 x ptr> %x
with the unambiguous interpretation that it is a vector of pointers to float.
* address spaces remain on the pointer, not the type:
getelementptr float addrspace(1)* %x
->getelementptr float, float addrspace(1)* %x
Then, eventually:
getelementptr float, ptr addrspace(1) %x
Importantly, the massive amount of test case churn has been automated by
same crappy python code. I had to manually update a few test cases that
wouldn't fit the script's model (r228970,r229196,r229197,r229198). The
python script just massages stdin and writes the result to stdout, I
then wrapped that in a shell script to handle replacing files, then
using the usual find+xargs to migrate all the files.
update.py:
import fileinput
import sys
import re
ibrep = re.compile(r"(^.*?[^%\w]getelementptr inbounds )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))")
normrep = re.compile( r"(^.*?[^%\w]getelementptr )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))")
def conv(match, line):
if not match:
return line
line = match.groups()[0]
if len(match.groups()[5]) == 0:
line += match.groups()[2]
line += match.groups()[3]
line += ", "
line += match.groups()[1]
line += "\n"
return line
for line in sys.stdin:
if line.find("getelementptr ") == line.find("getelementptr inbounds"):
if line.find("getelementptr inbounds") != line.find("getelementptr inbounds ("):
line = conv(re.match(ibrep, line), line)
elif line.find("getelementptr ") != line.find("getelementptr ("):
line = conv(re.match(normrep, line), line)
sys.stdout.write(line)
apply.sh:
for name in "$@"
do
python3 `dirname "$0"`/update.py < "$name" > "$name.tmp" && mv "$name.tmp" "$name"
rm -f "$name.tmp"
done
The actual commands:
From llvm/src:
find test/ -name *.ll | xargs ./apply.sh
From llvm/src/tools/clang:
find test/ -name *.mm -o -name *.m -o -name *.cpp -o -name *.c | xargs -I '{}' ../../apply.sh "{}"
From llvm/src/tools/polly:
find test/ -name *.ll | xargs ./apply.sh
After that, check-all (with llvm, clang, clang-tools-extra, lld,
compiler-rt, and polly all checked out).
The extra 'rm' in the apply.sh script is due to a few files in clang's test
suite using interesting unicode stuff that my python script was throwing
exceptions on. None of those files needed to be migrated, so it seemed
sufficient to ignore those cases.
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7636
llvm-svn: 230786
2015-02-28 03:29:02 +08:00
|
|
|
%a.gep = getelementptr i64, i64 addrspace(1)* %aptr, i32 %tid
|
|
|
|
|
%b.gep = getelementptr i64, i64 addrspace(1)* %aptr, i32 %tid
|
|
|
|
|
%out.gep = getelementptr i64, i64 addrspace(1)* %out, i32 %tid
|
2015-02-28 05:17:42 +08:00
|
|
|
%a = load i64, i64 addrspace(1)* %a.gep, align 8
|
|
|
|
|
%b = load i64, i64 addrspace(1)* %b.gep, align 8
|
2014-11-15 02:18:16 +08:00
|
|
|
|
|
|
|
|
%c = shl i64 %a, %b
|
|
|
|
|
%shl = shl i64 %c, 63
|
|
|
|
|
%ashr = ashr i64 %shl, 63
|
|
|
|
|
store i64 %ashr, i64 addrspace(1)* %out.gep, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; FUNC-LABEL: {{^}}v_sext_in_reg_i8_to_i64:
|
|
|
|
|
; SI: buffer_load_dwordx2
|
|
|
|
|
; SI: v_lshl_b64 v{{\[}}[[VAL_LO:[0-9]+]]:[[VAL_HI:[0-9]+]]{{\]}}
|
|
|
|
|
; SI: v_bfe_i32 v[[LO:[0-9]+]], v[[VAL_LO]], 0, 8
|
|
|
|
|
; SI: v_ashrrev_i32_e32 v[[HI:[0-9]+]], 31, v[[LO]]
|
|
|
|
|
; SI: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}}
|
|
|
|
|
define void @v_sext_in_reg_i8_to_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 addrspace(1)* %bptr) nounwind {
|
|
|
|
|
%tid = call i32 @llvm.r600.read.tidig.x()
|
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
One of several parallel first steps to remove the target type of pointers,
replacing them with a single opaque pointer type.
This adds an explicit type parameter to the gep instruction so that when the
first parameter becomes an opaque pointer type, the type to gep through is
still available to the instructions.
* This doesn't modify gep operators, only instructions (operators will be
handled separately)
* Textual IR changes only. Bitcode (including upgrade) and changing the
in-memory representation will be in separate changes.
* geps of vectors are transformed as:
getelementptr <4 x float*> %x, ...
->getelementptr float, <4 x float*> %x, ...
Then, once the opaque pointer type is introduced, this will ultimately look
like:
getelementptr float, <4 x ptr> %x
with the unambiguous interpretation that it is a vector of pointers to float.
* address spaces remain on the pointer, not the type:
getelementptr float addrspace(1)* %x
->getelementptr float, float addrspace(1)* %x
Then, eventually:
getelementptr float, ptr addrspace(1) %x
Importantly, the massive amount of test case churn has been automated by
same crappy python code. I had to manually update a few test cases that
wouldn't fit the script's model (r228970,r229196,r229197,r229198). The
python script just massages stdin and writes the result to stdout, I
then wrapped that in a shell script to handle replacing files, then
using the usual find+xargs to migrate all the files.
update.py:
import fileinput
import sys
import re
ibrep = re.compile(r"(^.*?[^%\w]getelementptr inbounds )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))")
normrep = re.compile( r"(^.*?[^%\w]getelementptr )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))")
def conv(match, line):
if not match:
return line
line = match.groups()[0]
if len(match.groups()[5]) == 0:
line += match.groups()[2]
line += match.groups()[3]
line += ", "
line += match.groups()[1]
line += "\n"
return line
for line in sys.stdin:
if line.find("getelementptr ") == line.find("getelementptr inbounds"):
if line.find("getelementptr inbounds") != line.find("getelementptr inbounds ("):
line = conv(re.match(ibrep, line), line)
elif line.find("getelementptr ") != line.find("getelementptr ("):
line = conv(re.match(normrep, line), line)
sys.stdout.write(line)
apply.sh:
for name in "$@"
do
python3 `dirname "$0"`/update.py < "$name" > "$name.tmp" && mv "$name.tmp" "$name"
rm -f "$name.tmp"
done
The actual commands:
From llvm/src:
find test/ -name *.ll | xargs ./apply.sh
From llvm/src/tools/clang:
find test/ -name *.mm -o -name *.m -o -name *.cpp -o -name *.c | xargs -I '{}' ../../apply.sh "{}"
From llvm/src/tools/polly:
find test/ -name *.ll | xargs ./apply.sh
After that, check-all (with llvm, clang, clang-tools-extra, lld,
compiler-rt, and polly all checked out).
The extra 'rm' in the apply.sh script is due to a few files in clang's test
suite using interesting unicode stuff that my python script was throwing
exceptions on. None of those files needed to be migrated, so it seemed
sufficient to ignore those cases.
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7636
llvm-svn: 230786
2015-02-28 03:29:02 +08:00
|
|
|
%a.gep = getelementptr i64, i64 addrspace(1)* %aptr, i32 %tid
|
|
|
|
|
%b.gep = getelementptr i64, i64 addrspace(1)* %aptr, i32 %tid
|
|
|
|
|
%out.gep = getelementptr i64, i64 addrspace(1)* %out, i32 %tid
|
2015-02-28 05:17:42 +08:00
|
|
|
%a = load i64, i64 addrspace(1)* %a.gep, align 8
|
|
|
|
|
%b = load i64, i64 addrspace(1)* %b.gep, align 8
|
2014-11-15 02:18:16 +08:00
|
|
|
|
|
|
|
|
%c = shl i64 %a, %b
|
|
|
|
|
%shl = shl i64 %c, 56
|
|
|
|
|
%ashr = ashr i64 %shl, 56
|
|
|
|
|
store i64 %ashr, i64 addrspace(1)* %out.gep, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; FUNC-LABEL: {{^}}v_sext_in_reg_i16_to_i64:
|
|
|
|
|
; SI: buffer_load_dwordx2
|
|
|
|
|
; SI: v_lshl_b64 v{{\[}}[[VAL_LO:[0-9]+]]:[[VAL_HI:[0-9]+]]{{\]}}
|
|
|
|
|
; SI: v_bfe_i32 v[[LO:[0-9]+]], v[[VAL_LO]], 0, 16
|
|
|
|
|
; SI: v_ashrrev_i32_e32 v[[HI:[0-9]+]], 31, v[[LO]]
|
|
|
|
|
; SI: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}}
|
|
|
|
|
define void @v_sext_in_reg_i16_to_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 addrspace(1)* %bptr) nounwind {
|
|
|
|
|
%tid = call i32 @llvm.r600.read.tidig.x()
|
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
One of several parallel first steps to remove the target type of pointers,
replacing them with a single opaque pointer type.
This adds an explicit type parameter to the gep instruction so that when the
first parameter becomes an opaque pointer type, the type to gep through is
still available to the instructions.
* This doesn't modify gep operators, only instructions (operators will be
handled separately)
* Textual IR changes only. Bitcode (including upgrade) and changing the
in-memory representation will be in separate changes.
* geps of vectors are transformed as:
getelementptr <4 x float*> %x, ...
->getelementptr float, <4 x float*> %x, ...
Then, once the opaque pointer type is introduced, this will ultimately look
like:
getelementptr float, <4 x ptr> %x
with the unambiguous interpretation that it is a vector of pointers to float.
* address spaces remain on the pointer, not the type:
getelementptr float addrspace(1)* %x
->getelementptr float, float addrspace(1)* %x
Then, eventually:
getelementptr float, ptr addrspace(1) %x
Importantly, the massive amount of test case churn has been automated by
same crappy python code. I had to manually update a few test cases that
wouldn't fit the script's model (r228970,r229196,r229197,r229198). The
python script just massages stdin and writes the result to stdout, I
then wrapped that in a shell script to handle replacing files, then
using the usual find+xargs to migrate all the files.
update.py:
import fileinput
import sys
import re
ibrep = re.compile(r"(^.*?[^%\w]getelementptr inbounds )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))")
normrep = re.compile( r"(^.*?[^%\w]getelementptr )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))")
def conv(match, line):
if not match:
return line
line = match.groups()[0]
if len(match.groups()[5]) == 0:
line += match.groups()[2]
line += match.groups()[3]
line += ", "
line += match.groups()[1]
line += "\n"
return line
for line in sys.stdin:
if line.find("getelementptr ") == line.find("getelementptr inbounds"):
if line.find("getelementptr inbounds") != line.find("getelementptr inbounds ("):
line = conv(re.match(ibrep, line), line)
elif line.find("getelementptr ") != line.find("getelementptr ("):
line = conv(re.match(normrep, line), line)
sys.stdout.write(line)
apply.sh:
for name in "$@"
do
python3 `dirname "$0"`/update.py < "$name" > "$name.tmp" && mv "$name.tmp" "$name"
rm -f "$name.tmp"
done
The actual commands:
From llvm/src:
find test/ -name *.ll | xargs ./apply.sh
From llvm/src/tools/clang:
find test/ -name *.mm -o -name *.m -o -name *.cpp -o -name *.c | xargs -I '{}' ../../apply.sh "{}"
From llvm/src/tools/polly:
find test/ -name *.ll | xargs ./apply.sh
After that, check-all (with llvm, clang, clang-tools-extra, lld,
compiler-rt, and polly all checked out).
The extra 'rm' in the apply.sh script is due to a few files in clang's test
suite using interesting unicode stuff that my python script was throwing
exceptions on. None of those files needed to be migrated, so it seemed
sufficient to ignore those cases.
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7636
llvm-svn: 230786
2015-02-28 03:29:02 +08:00
|
|
|
%a.gep = getelementptr i64, i64 addrspace(1)* %aptr, i32 %tid
|
|
|
|
|
%b.gep = getelementptr i64, i64 addrspace(1)* %aptr, i32 %tid
|
|
|
|
|
%out.gep = getelementptr i64, i64 addrspace(1)* %out, i32 %tid
|
2015-02-28 05:17:42 +08:00
|
|
|
%a = load i64, i64 addrspace(1)* %a.gep, align 8
|
|
|
|
|
%b = load i64, i64 addrspace(1)* %b.gep, align 8
|
2014-11-15 02:18:16 +08:00
|
|
|
|
|
|
|
|
%c = shl i64 %a, %b
|
|
|
|
|
%shl = shl i64 %c, 48
|
|
|
|
|
%ashr = ashr i64 %shl, 48
|
|
|
|
|
store i64 %ashr, i64 addrspace(1)* %out.gep, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; FUNC-LABEL: {{^}}v_sext_in_reg_i32_to_i64:
|
|
|
|
|
; SI: buffer_load_dwordx2
|
|
|
|
|
; SI: v_lshl_b64 v{{\[}}[[LO:[0-9]+]]:[[HI:[0-9]+]]{{\]}},
|
|
|
|
|
; SI: v_ashrrev_i32_e32 v[[SHR:[0-9]+]], 31, v[[LO]]
|
|
|
|
|
; SI: buffer_store_dwordx2 v{{\[}}[[LO]]:[[SHR]]{{\]}}
|
|
|
|
|
define void @v_sext_in_reg_i32_to_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 addrspace(1)* %bptr) nounwind {
|
|
|
|
|
%tid = call i32 @llvm.r600.read.tidig.x()
|
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
One of several parallel first steps to remove the target type of pointers,
replacing them with a single opaque pointer type.
This adds an explicit type parameter to the gep instruction so that when the
first parameter becomes an opaque pointer type, the type to gep through is
still available to the instructions.
* This doesn't modify gep operators, only instructions (operators will be
handled separately)
* Textual IR changes only. Bitcode (including upgrade) and changing the
in-memory representation will be in separate changes.
* geps of vectors are transformed as:
getelementptr <4 x float*> %x, ...
->getelementptr float, <4 x float*> %x, ...
Then, once the opaque pointer type is introduced, this will ultimately look
like:
getelementptr float, <4 x ptr> %x
with the unambiguous interpretation that it is a vector of pointers to float.
* address spaces remain on the pointer, not the type:
getelementptr float addrspace(1)* %x
->getelementptr float, float addrspace(1)* %x
Then, eventually:
getelementptr float, ptr addrspace(1) %x
Importantly, the massive amount of test case churn has been automated by
same crappy python code. I had to manually update a few test cases that
wouldn't fit the script's model (r228970,r229196,r229197,r229198). The
python script just massages stdin and writes the result to stdout, I
then wrapped that in a shell script to handle replacing files, then
using the usual find+xargs to migrate all the files.
update.py:
import fileinput
import sys
import re
ibrep = re.compile(r"(^.*?[^%\w]getelementptr inbounds )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))")
normrep = re.compile( r"(^.*?[^%\w]getelementptr )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))")
def conv(match, line):
if not match:
return line
line = match.groups()[0]
if len(match.groups()[5]) == 0:
line += match.groups()[2]
line += match.groups()[3]
line += ", "
line += match.groups()[1]
line += "\n"
return line
for line in sys.stdin:
if line.find("getelementptr ") == line.find("getelementptr inbounds"):
if line.find("getelementptr inbounds") != line.find("getelementptr inbounds ("):
line = conv(re.match(ibrep, line), line)
elif line.find("getelementptr ") != line.find("getelementptr ("):
line = conv(re.match(normrep, line), line)
sys.stdout.write(line)
apply.sh:
for name in "$@"
do
python3 `dirname "$0"`/update.py < "$name" > "$name.tmp" && mv "$name.tmp" "$name"
rm -f "$name.tmp"
done
The actual commands:
From llvm/src:
find test/ -name *.ll | xargs ./apply.sh
From llvm/src/tools/clang:
find test/ -name *.mm -o -name *.m -o -name *.cpp -o -name *.c | xargs -I '{}' ../../apply.sh "{}"
From llvm/src/tools/polly:
find test/ -name *.ll | xargs ./apply.sh
After that, check-all (with llvm, clang, clang-tools-extra, lld,
compiler-rt, and polly all checked out).
The extra 'rm' in the apply.sh script is due to a few files in clang's test
suite using interesting unicode stuff that my python script was throwing
exceptions on. None of those files needed to be migrated, so it seemed
sufficient to ignore those cases.
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7636
llvm-svn: 230786
2015-02-28 03:29:02 +08:00
|
|
|
%a.gep = getelementptr i64, i64 addrspace(1)* %aptr, i32 %tid
|
|
|
|
|
%b.gep = getelementptr i64, i64 addrspace(1)* %aptr, i32 %tid
|
|
|
|
|
%out.gep = getelementptr i64, i64 addrspace(1)* %out, i32 %tid
|
2015-02-28 05:17:42 +08:00
|
|
|
%a = load i64, i64 addrspace(1)* %a.gep, align 8
|
|
|
|
|
%b = load i64, i64 addrspace(1)* %b.gep, align 8
|
2014-11-15 02:18:16 +08:00
|
|
|
|
|
|
|
|
%c = shl i64 %a, %b
|
|
|
|
|
%shl = shl i64 %c, 32
|
|
|
|
|
%ashr = ashr i64 %shl, 32
|
|
|
|
|
store i64 %ashr, i64 addrspace(1)* %out.gep, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
2014-10-02 01:15:17 +08:00
|
|
|
; FUNC-LABEL: {{^}}sext_in_reg_i1_in_i32_other_amount:
|
2015-03-24 21:40:27 +08:00
|
|
|
; SI-NOT: s_lshl
|
|
|
|
|
; SI-NOT: s_ashr
|
|
|
|
|
; SI: s_bfe_i32 {{s[0-9]+}}, {{s[0-9]+}}, 0x190001
|
2014-04-16 09:41:34 +08:00
|
|
|
|
|
|
|
|
; EG: MEM_{{.*}} STORE_{{.*}} [[RES:T[0-9]+\.[XYZW]]], [[ADDR:T[0-9]+.[XYZW]]]
|
2014-03-18 02:58:11 +08:00
|
|
|
; EG-NOT: BFE
|
2014-04-16 09:41:34 +08:00
|
|
|
; EG: ADD_INT
|
|
|
|
|
; EG: LSHL
|
|
|
|
|
; EG: ASHR [[RES]]
|
|
|
|
|
; EG: LSHR {{\*?}} [[ADDR]]
|
2014-03-18 02:58:11 +08:00
|
|
|
define void @sext_in_reg_i1_in_i32_other_amount(i32 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
|
|
|
|
|
%c = add i32 %a, %b
|
|
|
|
|
%x = shl i32 %c, 6
|
|
|
|
|
%y = ashr i32 %x, 7
|
|
|
|
|
store i32 %y, i32 addrspace(1)* %out
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
2014-10-02 01:15:17 +08:00
|
|
|
; FUNC-LABEL: {{^}}sext_in_reg_v2i1_in_v2i32_other_amount:
|
2015-03-24 21:40:27 +08:00
|
|
|
; SI-NOT: s_lshl
|
|
|
|
|
; SI-NOT: s_ashr
|
|
|
|
|
; SI-DAG: s_bfe_i32 {{s[0-9]+}}, {{s[0-9]+}}, 0x190001
|
|
|
|
|
; SI-DAG: s_bfe_i32 {{s[0-9]+}}, {{s[0-9]+}}, 0x190001
|
2014-11-05 22:50:53 +08:00
|
|
|
; SI: s_endpgm
|
2014-04-16 09:41:34 +08:00
|
|
|
|
|
|
|
|
; EG: MEM_{{.*}} STORE_{{.*}} [[RES:T[0-9]+]]{{\.[XYZW][XYZW]}}, [[ADDR:T[0-9]+.[XYZW]]]
|
2014-03-18 02:58:11 +08:00
|
|
|
; EG-NOT: BFE
|
2014-04-16 09:41:34 +08:00
|
|
|
; EG: ADD_INT
|
|
|
|
|
; EG: LSHL
|
|
|
|
|
; EG: ASHR [[RES]]
|
|
|
|
|
; EG: LSHL
|
|
|
|
|
; EG: ASHR [[RES]]
|
|
|
|
|
; EG: LSHR {{\*?}} [[ADDR]]
|
2014-03-18 02:58:11 +08:00
|
|
|
define void @sext_in_reg_v2i1_in_v2i32_other_amount(<2 x i32> addrspace(1)* %out, <2 x i32> %a, <2 x i32> %b) nounwind {
|
|
|
|
|
%c = add <2 x i32> %a, %b
|
|
|
|
|
%x = shl <2 x i32> %c, <i32 6, i32 6>
|
|
|
|
|
%y = ashr <2 x i32> %x, <i32 7, i32 7>
|
|
|
|
|
store <2 x i32> %y, <2 x i32> addrspace(1)* %out, align 2
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
2014-10-02 01:15:17 +08:00
|
|
|
; FUNC-LABEL: {{^}}sext_in_reg_v2i1_to_v2i32:
|
2014-11-05 22:50:53 +08:00
|
|
|
; SI: s_bfe_i32 {{s[0-9]+}}, {{s[0-9]+}}, 0x10000
|
|
|
|
|
; SI: s_bfe_i32 {{s[0-9]+}}, {{s[0-9]+}}, 0x10000
|
|
|
|
|
; SI: buffer_store_dwordx2
|
2014-04-16 09:41:34 +08:00
|
|
|
|
|
|
|
|
; EG: MEM_{{.*}} STORE_{{.*}} [[RES:T[0-9]+]]{{\.[XYZW][XYZW]}}, [[ADDR:T[0-9]+.[XYZW]]]
|
|
|
|
|
; EG: BFE_INT [[RES]]
|
|
|
|
|
; EG: BFE_INT [[RES]]
|
|
|
|
|
; EG: LSHR {{\*?}} [[ADDR]]
|
2014-03-18 02:58:11 +08:00
|
|
|
define void @sext_in_reg_v2i1_to_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> %a, <2 x i32> %b) nounwind {
|
|
|
|
|
%c = add <2 x i32> %a, %b ; add to prevent folding into extload
|
|
|
|
|
%shl = shl <2 x i32> %c, <i32 31, i32 31>
|
|
|
|
|
%ashr = ashr <2 x i32> %shl, <i32 31, i32 31>
|
|
|
|
|
store <2 x i32> %ashr, <2 x i32> addrspace(1)* %out, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
2014-10-02 01:15:17 +08:00
|
|
|
; FUNC-LABEL: {{^}}sext_in_reg_v4i1_to_v4i32:
|
2014-11-05 22:50:53 +08:00
|
|
|
; SI: s_bfe_i32 {{s[0-9]+}}, {{s[0-9]+}}, 0x10000
|
|
|
|
|
; SI: s_bfe_i32 {{s[0-9]+}}, {{s[0-9]+}}, 0x10000
|
|
|
|
|
; SI: s_bfe_i32 {{s[0-9]+}}, {{s[0-9]+}}, 0x10000
|
|
|
|
|
; SI: s_bfe_i32 {{s[0-9]+}}, {{s[0-9]+}}, 0x10000
|
|
|
|
|
; SI: buffer_store_dwordx4
|
2014-03-18 02:58:11 +08:00
|
|
|
|
2014-04-16 09:41:34 +08:00
|
|
|
; EG: MEM_{{.*}} STORE_{{.*}} [[RES:T[0-9]+]]{{\.[XYZW][XYZW][XYZW][XYZW]}}, [[ADDR:T[0-9]+.[XYZW]]]
|
|
|
|
|
; EG: BFE_INT [[RES]]
|
|
|
|
|
; EG: BFE_INT [[RES]]
|
|
|
|
|
; EG: BFE_INT [[RES]]
|
|
|
|
|
; EG: BFE_INT [[RES]]
|
|
|
|
|
; EG: LSHR {{\*?}} [[ADDR]]
|
2014-03-18 02:58:11 +08:00
|
|
|
define void @sext_in_reg_v4i1_to_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> %a, <4 x i32> %b) nounwind {
|
|
|
|
|
%c = add <4 x i32> %a, %b ; add to prevent folding into extload
|
|
|
|
|
%shl = shl <4 x i32> %c, <i32 31, i32 31, i32 31, i32 31>
|
|
|
|
|
%ashr = ashr <4 x i32> %shl, <i32 31, i32 31, i32 31, i32 31>
|
|
|
|
|
store <4 x i32> %ashr, <4 x i32> addrspace(1)* %out, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
2014-10-02 01:15:17 +08:00
|
|
|
; FUNC-LABEL: {{^}}sext_in_reg_v2i8_to_v2i32:
|
2014-11-05 22:50:53 +08:00
|
|
|
; SI: s_sext_i32_i8 {{s[0-9]+}}, {{s[0-9]+}}
|
|
|
|
|
; SI: s_sext_i32_i8 {{s[0-9]+}}, {{s[0-9]+}}
|
|
|
|
|
; SI: buffer_store_dwordx2
|
2014-03-18 02:58:11 +08:00
|
|
|
|
2014-04-16 09:41:34 +08:00
|
|
|
; EG: MEM_{{.*}} STORE_{{.*}} [[RES:T[0-9]+]]{{\.[XYZW][XYZW]}}, [[ADDR:T[0-9]+.[XYZW]]]
|
|
|
|
|
; EG: BFE_INT [[RES]]
|
|
|
|
|
; EG: BFE_INT [[RES]]
|
|
|
|
|
; EG: LSHR {{\*?}} [[ADDR]]
|
2014-03-18 02:58:11 +08:00
|
|
|
define void @sext_in_reg_v2i8_to_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> %a, <2 x i32> %b) nounwind {
|
|
|
|
|
%c = add <2 x i32> %a, %b ; add to prevent folding into extload
|
|
|
|
|
%shl = shl <2 x i32> %c, <i32 24, i32 24>
|
|
|
|
|
%ashr = ashr <2 x i32> %shl, <i32 24, i32 24>
|
|
|
|
|
store <2 x i32> %ashr, <2 x i32> addrspace(1)* %out, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
2014-10-02 01:15:17 +08:00
|
|
|
; FUNC-LABEL: {{^}}sext_in_reg_v4i8_to_v4i32:
|
2014-11-05 22:50:53 +08:00
|
|
|
; SI: s_sext_i32_i8 {{s[0-9]+}}, {{s[0-9]+}}
|
|
|
|
|
; SI: s_sext_i32_i8 {{s[0-9]+}}, {{s[0-9]+}}
|
|
|
|
|
; SI: s_sext_i32_i8 {{s[0-9]+}}, {{s[0-9]+}}
|
|
|
|
|
; SI: s_sext_i32_i8 {{s[0-9]+}}, {{s[0-9]+}}
|
|
|
|
|
; SI: buffer_store_dwordx4
|
2014-03-18 02:58:11 +08:00
|
|
|
|
2014-04-16 09:41:34 +08:00
|
|
|
; EG: MEM_{{.*}} STORE_{{.*}} [[RES:T[0-9]+]]{{\.[XYZW][XYZW][XYZW][XYZW]}}, [[ADDR:T[0-9]+.[XYZW]]]
|
|
|
|
|
; EG: BFE_INT [[RES]]
|
|
|
|
|
; EG: BFE_INT [[RES]]
|
|
|
|
|
; EG: BFE_INT [[RES]]
|
|
|
|
|
; EG: BFE_INT [[RES]]
|
|
|
|
|
; EG: LSHR {{\*?}} [[ADDR]]
|
2014-03-18 02:58:11 +08:00
|
|
|
define void @sext_in_reg_v4i8_to_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> %a, <4 x i32> %b) nounwind {
|
|
|
|
|
%c = add <4 x i32> %a, %b ; add to prevent folding into extload
|
|
|
|
|
%shl = shl <4 x i32> %c, <i32 24, i32 24, i32 24, i32 24>
|
|
|
|
|
%ashr = ashr <4 x i32> %shl, <i32 24, i32 24, i32 24, i32 24>
|
|
|
|
|
store <4 x i32> %ashr, <4 x i32> addrspace(1)* %out, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
2014-10-02 01:15:17 +08:00
|
|
|
; FUNC-LABEL: {{^}}sext_in_reg_v2i16_to_v2i32:
|
2014-11-05 22:50:53 +08:00
|
|
|
; SI: s_sext_i32_i16 {{s[0-9]+}}, {{s[0-9]+}}
|
|
|
|
|
; SI: s_sext_i32_i16 {{s[0-9]+}}, {{s[0-9]+}}
|
|
|
|
|
; SI: buffer_store_dwordx2
|
2014-03-18 02:58:11 +08:00
|
|
|
|
2014-04-16 09:41:34 +08:00
|
|
|
; EG: MEM_{{.*}} STORE_{{.*}} [[RES:T[0-9]+]]{{\.[XYZW][XYZW]}}, [[ADDR:T[0-9]+.[XYZW]]]
|
|
|
|
|
; EG: BFE_INT [[RES]]
|
|
|
|
|
; EG: BFE_INT [[RES]]
|
|
|
|
|
; EG: LSHR {{\*?}} [[ADDR]]
|
2014-03-18 02:58:11 +08:00
|
|
|
define void @sext_in_reg_v2i16_to_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> %a, <2 x i32> %b) nounwind {
|
|
|
|
|
%c = add <2 x i32> %a, %b ; add to prevent folding into extload
|
2014-04-18 09:53:18 +08:00
|
|
|
%shl = shl <2 x i32> %c, <i32 16, i32 16>
|
|
|
|
|
%ashr = ashr <2 x i32> %shl, <i32 16, i32 16>
|
2014-03-18 02:58:11 +08:00
|
|
|
store <2 x i32> %ashr, <2 x i32> addrspace(1)* %out, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
2014-10-02 01:15:17 +08:00
|
|
|
; FUNC-LABEL: {{^}}testcase:
|
2014-03-18 02:58:11 +08:00
|
|
|
define void @testcase(i8 addrspace(1)* %out, i8 %a) nounwind {
|
|
|
|
|
%and_a_1 = and i8 %a, 1
|
|
|
|
|
%cmp_eq = icmp eq i8 %and_a_1, 0
|
|
|
|
|
%cmp_slt = icmp slt i8 %a, 0
|
|
|
|
|
%sel0 = select i1 %cmp_slt, i8 0, i8 %a
|
|
|
|
|
%sel1 = select i1 %cmp_eq, i8 0, i8 %a
|
|
|
|
|
%xor = xor i8 %sel0, %sel1
|
|
|
|
|
store i8 %xor, i8 addrspace(1)* %out
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
2014-10-02 01:15:17 +08:00
|
|
|
; FUNC-LABEL: {{^}}testcase_3:
|
2014-03-18 02:58:11 +08:00
|
|
|
define void @testcase_3(i8 addrspace(1)* %out, i8 %a) nounwind {
|
|
|
|
|
%and_a_1 = and i8 %a, 1
|
|
|
|
|
%cmp_eq = icmp eq i8 %and_a_1, 0
|
|
|
|
|
%cmp_slt = icmp slt i8 %a, 0
|
|
|
|
|
%sel0 = select i1 %cmp_slt, i8 0, i8 %a
|
|
|
|
|
%sel1 = select i1 %cmp_eq, i8 0, i8 %a
|
|
|
|
|
%xor = xor i8 %sel0, %sel1
|
|
|
|
|
store i8 %xor, i8 addrspace(1)* %out
|
|
|
|
|
ret void
|
|
|
|
|
}
|
2014-03-28 01:23:24 +08:00
|
|
|
|
2014-10-02 01:15:17 +08:00
|
|
|
; FUNC-LABEL: {{^}}vgpr_sext_in_reg_v4i8_to_v4i32:
|
2014-11-05 22:50:53 +08:00
|
|
|
; SI: v_bfe_i32 [[EXTRACT:v[0-9]+]], {{v[0-9]+}}, 0, 8
|
|
|
|
|
; SI: v_bfe_i32 [[EXTRACT:v[0-9]+]], {{v[0-9]+}}, 0, 8
|
|
|
|
|
; SI: v_bfe_i32 [[EXTRACT:v[0-9]+]], {{v[0-9]+}}, 0, 8
|
|
|
|
|
; SI: v_bfe_i32 [[EXTRACT:v[0-9]+]], {{v[0-9]+}}, 0, 8
|
2014-04-18 13:19:26 +08:00
|
|
|
define void @vgpr_sext_in_reg_v4i8_to_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %a, <4 x i32> addrspace(1)* %b) nounwind {
|
2015-02-28 05:17:42 +08:00
|
|
|
%loada = load <4 x i32>, <4 x i32> addrspace(1)* %a, align 16
|
|
|
|
|
%loadb = load <4 x i32>, <4 x i32> addrspace(1)* %b, align 16
|
2014-04-18 13:19:26 +08:00
|
|
|
%c = add <4 x i32> %loada, %loadb ; add to prevent folding into extload
|
|
|
|
|
%shl = shl <4 x i32> %c, <i32 24, i32 24, i32 24, i32 24>
|
|
|
|
|
%ashr = ashr <4 x i32> %shl, <i32 24, i32 24, i32 24, i32 24>
|
|
|
|
|
store <4 x i32> %ashr, <4 x i32> addrspace(1)* %out, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
2014-10-02 01:15:17 +08:00
|
|
|
; FUNC-LABEL: {{^}}vgpr_sext_in_reg_v4i16_to_v4i32:
|
2014-11-05 22:50:53 +08:00
|
|
|
; SI: v_bfe_i32 [[EXTRACT:v[0-9]+]], {{v[0-9]+}}, 0, 16
|
|
|
|
|
; SI: v_bfe_i32 [[EXTRACT:v[0-9]+]], {{v[0-9]+}}, 0, 16
|
2014-04-18 13:19:26 +08:00
|
|
|
define void @vgpr_sext_in_reg_v4i16_to_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %a, <4 x i32> addrspace(1)* %b) nounwind {
|
2015-02-28 05:17:42 +08:00
|
|
|
%loada = load <4 x i32>, <4 x i32> addrspace(1)* %a, align 16
|
|
|
|
|
%loadb = load <4 x i32>, <4 x i32> addrspace(1)* %b, align 16
|
2014-04-18 13:19:26 +08:00
|
|
|
%c = add <4 x i32> %loada, %loadb ; add to prevent folding into extload
|
|
|
|
|
%shl = shl <4 x i32> %c, <i32 16, i32 16, i32 16, i32 16>
|
|
|
|
|
%ashr = ashr <4 x i32> %shl, <i32 16, i32 16, i32 16, i32 16>
|
|
|
|
|
store <4 x i32> %ashr, <4 x i32> addrspace(1)* %out, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
2014-10-02 01:15:17 +08:00
|
|
|
; FUNC-LABEL: {{^}}sext_in_reg_to_illegal_type:
|
2014-11-05 22:50:53 +08:00
|
|
|
; SI: buffer_load_sbyte
|
|
|
|
|
; SI: v_max_i32
|
2015-06-09 08:52:41 +08:00
|
|
|
; SI-NOT: bfe
|
2014-11-05 22:50:53 +08:00
|
|
|
; SI: buffer_store_short
|
2014-03-28 01:23:24 +08:00
|
|
|
define void @sext_in_reg_to_illegal_type(i16 addrspace(1)* nocapture %out, i8 addrspace(1)* nocapture %src) nounwind {
|
2015-02-28 05:17:42 +08:00
|
|
|
%tmp5 = load i8, i8 addrspace(1)* %src, align 1
|
2014-03-28 01:23:24 +08:00
|
|
|
%tmp2 = sext i8 %tmp5 to i32
|
2016-01-21 04:50:19 +08:00
|
|
|
%tmp2.5 = icmp sgt i32 %tmp2, 0
|
|
|
|
|
%tmp3 = select i1 %tmp2.5, i32 %tmp2, i32 0
|
2014-03-28 01:23:24 +08:00
|
|
|
%tmp4 = trunc i32 %tmp3 to i8
|
|
|
|
|
%tmp6 = sext i8 %tmp4 to i16
|
|
|
|
|
store i16 %tmp6, i16 addrspace(1)* %out, align 2
|
|
|
|
|
ret void
|
|
|
|
|
}
|
2014-05-23 02:09:03 +08:00
|
|
|
|
|
|
|
|
declare i32 @llvm.AMDGPU.bfe.i32(i32, i32, i32) nounwind readnone
|
|
|
|
|
|
2014-10-02 01:15:17 +08:00
|
|
|
; FUNC-LABEL: {{^}}bfe_0_width:
|
2014-11-05 22:50:53 +08:00
|
|
|
; SI-NOT: {{[^@]}}bfe
|
|
|
|
|
; SI: s_endpgm
|
2014-05-23 02:09:07 +08:00
|
|
|
define void @bfe_0_width(i32 addrspace(1)* %out, i32 addrspace(1)* %ptr) nounwind {
|
2015-02-28 05:17:42 +08:00
|
|
|
%load = load i32, i32 addrspace(1)* %ptr, align 4
|
2014-05-23 02:09:07 +08:00
|
|
|
%bfe = call i32 @llvm.AMDGPU.bfe.i32(i32 %load, i32 8, i32 0) nounwind readnone
|
|
|
|
|
store i32 %bfe, i32 addrspace(1)* %out, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
2014-10-02 01:15:17 +08:00
|
|
|
; FUNC-LABEL: {{^}}bfe_8_bfe_8:
|
2014-11-05 22:50:53 +08:00
|
|
|
; SI: v_bfe_i32
|
|
|
|
|
; SI-NOT: {{[^@]}}bfe
|
|
|
|
|
; SI: s_endpgm
|
2014-05-23 02:09:07 +08:00
|
|
|
define void @bfe_8_bfe_8(i32 addrspace(1)* %out, i32 addrspace(1)* %ptr) nounwind {
|
2015-02-28 05:17:42 +08:00
|
|
|
%load = load i32, i32 addrspace(1)* %ptr, align 4
|
2014-05-23 02:09:07 +08:00
|
|
|
%bfe0 = call i32 @llvm.AMDGPU.bfe.i32(i32 %load, i32 0, i32 8) nounwind readnone
|
|
|
|
|
%bfe1 = call i32 @llvm.AMDGPU.bfe.i32(i32 %bfe0, i32 0, i32 8) nounwind readnone
|
|
|
|
|
store i32 %bfe1, i32 addrspace(1)* %out, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
2014-10-02 01:15:17 +08:00
|
|
|
; FUNC-LABEL: {{^}}bfe_8_bfe_16:
|
2014-11-05 22:50:53 +08:00
|
|
|
; SI: v_bfe_i32 v{{[0-9]+}}, v{{[0-9]+}}, 0, 8
|
|
|
|
|
; SI: s_endpgm
|
2014-05-23 02:09:07 +08:00
|
|
|
define void @bfe_8_bfe_16(i32 addrspace(1)* %out, i32 addrspace(1)* %ptr) nounwind {
|
2015-02-28 05:17:42 +08:00
|
|
|
%load = load i32, i32 addrspace(1)* %ptr, align 4
|
2014-05-23 02:09:07 +08:00
|
|
|
%bfe0 = call i32 @llvm.AMDGPU.bfe.i32(i32 %load, i32 0, i32 8) nounwind readnone
|
|
|
|
|
%bfe1 = call i32 @llvm.AMDGPU.bfe.i32(i32 %bfe0, i32 0, i32 16) nounwind readnone
|
|
|
|
|
store i32 %bfe1, i32 addrspace(1)* %out, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; This really should be folded into 1
|
2014-10-02 01:15:17 +08:00
|
|
|
; FUNC-LABEL: {{^}}bfe_16_bfe_8:
|
2014-11-05 22:50:53 +08:00
|
|
|
; SI: v_bfe_i32 v{{[0-9]+}}, v{{[0-9]+}}, 0, 8
|
|
|
|
|
; SI-NOT: {{[^@]}}bfe
|
|
|
|
|
; SI: s_endpgm
|
2014-05-23 02:09:07 +08:00
|
|
|
define void @bfe_16_bfe_8(i32 addrspace(1)* %out, i32 addrspace(1)* %ptr) nounwind {
|
2015-02-28 05:17:42 +08:00
|
|
|
%load = load i32, i32 addrspace(1)* %ptr, align 4
|
2014-05-23 02:09:07 +08:00
|
|
|
%bfe0 = call i32 @llvm.AMDGPU.bfe.i32(i32 %load, i32 0, i32 16) nounwind readnone
|
|
|
|
|
%bfe1 = call i32 @llvm.AMDGPU.bfe.i32(i32 %bfe0, i32 0, i32 8) nounwind readnone
|
|
|
|
|
store i32 %bfe1, i32 addrspace(1)* %out, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
2014-05-23 02:09:03 +08:00
|
|
|
; Make sure there isn't a redundant BFE
|
2014-10-02 01:15:17 +08:00
|
|
|
; FUNC-LABEL: {{^}}sext_in_reg_i8_to_i32_bfe:
|
2014-11-05 22:50:53 +08:00
|
|
|
; SI: s_sext_i32_i8 s{{[0-9]+}}, s{{[0-9]+}}
|
|
|
|
|
; SI-NOT: {{[^@]}}bfe
|
|
|
|
|
; SI: s_endpgm
|
2014-05-23 02:09:03 +08:00
|
|
|
define void @sext_in_reg_i8_to_i32_bfe(i32 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
|
|
|
|
|
%c = add i32 %a, %b ; add to prevent folding into extload
|
|
|
|
|
%bfe = call i32 @llvm.AMDGPU.bfe.i32(i32 %c, i32 0, i32 8) nounwind readnone
|
|
|
|
|
%shl = shl i32 %bfe, 24
|
|
|
|
|
%ashr = ashr i32 %shl, 24
|
|
|
|
|
store i32 %ashr, i32 addrspace(1)* %out, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
2014-05-23 02:09:07 +08:00
|
|
|
|
2014-10-02 01:15:17 +08:00
|
|
|
; FUNC-LABEL: {{^}}sext_in_reg_i8_to_i32_bfe_wrong:
|
2014-05-23 02:09:07 +08:00
|
|
|
define void @sext_in_reg_i8_to_i32_bfe_wrong(i32 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
|
|
|
|
|
%c = add i32 %a, %b ; add to prevent folding into extload
|
|
|
|
|
%bfe = call i32 @llvm.AMDGPU.bfe.i32(i32 %c, i32 8, i32 0) nounwind readnone
|
|
|
|
|
%shl = shl i32 %bfe, 24
|
|
|
|
|
%ashr = ashr i32 %shl, 24
|
|
|
|
|
store i32 %ashr, i32 addrspace(1)* %out, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
2014-10-02 01:15:17 +08:00
|
|
|
; FUNC-LABEL: {{^}}sextload_i8_to_i32_bfe:
|
2014-11-05 22:50:53 +08:00
|
|
|
; SI: buffer_load_sbyte
|
|
|
|
|
; SI-NOT: {{[^@]}}bfe
|
|
|
|
|
; SI: s_endpgm
|
2014-05-23 02:09:07 +08:00
|
|
|
define void @sextload_i8_to_i32_bfe(i32 addrspace(1)* %out, i8 addrspace(1)* %ptr) nounwind {
|
2015-02-28 05:17:42 +08:00
|
|
|
%load = load i8, i8 addrspace(1)* %ptr, align 1
|
2014-05-23 02:09:07 +08:00
|
|
|
%sext = sext i8 %load to i32
|
|
|
|
|
%bfe = call i32 @llvm.AMDGPU.bfe.i32(i32 %sext, i32 0, i32 8) nounwind readnone
|
|
|
|
|
%shl = shl i32 %bfe, 24
|
|
|
|
|
%ashr = ashr i32 %shl, 24
|
|
|
|
|
store i32 %ashr, i32 addrspace(1)* %out, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
2014-11-05 22:50:34 +08:00
|
|
|
; SI: .text
|
2015-03-17 22:34:42 +08:00
|
|
|
; FUNC-LABEL: {{^}}sextload_i8_to_i32_bfe_0:{{.*$}}
|
2014-11-05 22:50:53 +08:00
|
|
|
; SI-NOT: {{[^@]}}bfe
|
|
|
|
|
; SI: s_endpgm
|
2014-05-23 02:09:07 +08:00
|
|
|
define void @sextload_i8_to_i32_bfe_0(i32 addrspace(1)* %out, i8 addrspace(1)* %ptr) nounwind {
|
2015-02-28 05:17:42 +08:00
|
|
|
%load = load i8, i8 addrspace(1)* %ptr, align 1
|
2014-05-23 02:09:07 +08:00
|
|
|
%sext = sext i8 %load to i32
|
|
|
|
|
%bfe = call i32 @llvm.AMDGPU.bfe.i32(i32 %sext, i32 8, i32 0) nounwind readnone
|
|
|
|
|
%shl = shl i32 %bfe, 24
|
|
|
|
|
%ashr = ashr i32 %shl, 24
|
|
|
|
|
store i32 %ashr, i32 addrspace(1)* %out, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
2014-05-23 02:09:12 +08:00
|
|
|
|
2014-10-02 01:15:17 +08:00
|
|
|
; FUNC-LABEL: {{^}}sext_in_reg_i1_bfe_offset_0:
|
2014-11-05 22:50:53 +08:00
|
|
|
; SI-NOT: shr
|
|
|
|
|
; SI-NOT: shl
|
|
|
|
|
; SI: v_bfe_i32 v{{[0-9]+}}, v{{[0-9]+}}, 0, 1
|
|
|
|
|
; SI: s_endpgm
|
2014-05-23 02:09:12 +08:00
|
|
|
define void @sext_in_reg_i1_bfe_offset_0(i32 addrspace(1)* %out, i32 addrspace(1)* %in) nounwind {
|
2015-02-28 05:17:42 +08:00
|
|
|
%x = load i32, i32 addrspace(1)* %in, align 4
|
2014-05-23 02:09:12 +08:00
|
|
|
%shl = shl i32 %x, 31
|
|
|
|
|
%shr = ashr i32 %shl, 31
|
|
|
|
|
%bfe = call i32 @llvm.AMDGPU.bfe.i32(i32 %shr, i32 0, i32 1)
|
|
|
|
|
store i32 %bfe, i32 addrspace(1)* %out, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
2014-10-02 01:15:17 +08:00
|
|
|
; FUNC-LABEL: {{^}}sext_in_reg_i1_bfe_offset_1:
|
2014-11-05 22:50:53 +08:00
|
|
|
; SI: buffer_load_dword
|
|
|
|
|
; SI-NOT: shl
|
|
|
|
|
; SI-NOT: shr
|
|
|
|
|
; SI: v_bfe_i32 v{{[0-9]+}}, v{{[0-9]+}}, 1, 1
|
|
|
|
|
; SI: s_endpgm
|
2014-05-23 02:09:12 +08:00
|
|
|
define void @sext_in_reg_i1_bfe_offset_1(i32 addrspace(1)* %out, i32 addrspace(1)* %in) nounwind {
|
2015-02-28 05:17:42 +08:00
|
|
|
%x = load i32, i32 addrspace(1)* %in, align 4
|
2014-05-23 02:09:12 +08:00
|
|
|
%shl = shl i32 %x, 30
|
|
|
|
|
%shr = ashr i32 %shl, 30
|
|
|
|
|
%bfe = call i32 @llvm.AMDGPU.bfe.i32(i32 %shr, i32 1, i32 1)
|
|
|
|
|
store i32 %bfe, i32 addrspace(1)* %out, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
2014-10-02 01:15:17 +08:00
|
|
|
; FUNC-LABEL: {{^}}sext_in_reg_i2_bfe_offset_1:
|
2014-11-05 22:50:53 +08:00
|
|
|
; SI: buffer_load_dword
|
2015-03-24 21:40:27 +08:00
|
|
|
; SI-NOT: v_lshl
|
|
|
|
|
; SI-NOT: v_ashr
|
|
|
|
|
; SI: v_bfe_i32 v{{[0-9]+}}, v{{[0-9]+}}, 0, 2
|
2014-11-05 22:50:53 +08:00
|
|
|
; SI: v_bfe_i32 v{{[0-9]+}}, v{{[0-9]+}}, 1, 2
|
|
|
|
|
; SI: s_endpgm
|
2014-05-23 02:09:12 +08:00
|
|
|
define void @sext_in_reg_i2_bfe_offset_1(i32 addrspace(1)* %out, i32 addrspace(1)* %in) nounwind {
|
2015-02-28 05:17:42 +08:00
|
|
|
%x = load i32, i32 addrspace(1)* %in, align 4
|
2014-05-23 02:09:12 +08:00
|
|
|
%shl = shl i32 %x, 30
|
|
|
|
|
%shr = ashr i32 %shl, 30
|
|
|
|
|
%bfe = call i32 @llvm.AMDGPU.bfe.i32(i32 %shr, i32 1, i32 2)
|
|
|
|
|
store i32 %bfe, i32 addrspace(1)* %out, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
2015-08-27 04:47:58 +08:00
|
|
|
|
|
|
|
|
; Make sure we propagate the VALUness to users of a moved scalar BFE.
|
|
|
|
|
|
|
|
|
|
; FUNC-LABEL: {{^}}v_sext_in_reg_i1_to_i64_move_use:
|
|
|
|
|
; SI: buffer_load_dwordx2
|
|
|
|
|
; SI: v_lshl_b64 v{{\[}}[[VAL_LO:[0-9]+]]:[[VAL_HI:[0-9]+]]{{\]}}
|
|
|
|
|
; SI-DAG: v_bfe_i32 v[[LO:[0-9]+]], v[[VAL_LO]], 0, 1
|
|
|
|
|
; SI-DAG: v_ashrrev_i32_e32 v[[HI:[0-9]+]], 31, v[[LO]]
|
|
|
|
|
; SI-DAG: v_and_b32_e32 v[[RESULT_LO:[0-9]+]], s{{[0-9]+}}, v[[LO]]
|
|
|
|
|
; SI-DAG: v_and_b32_e32 v[[RESULT_HI:[0-9]+]], s{{[0-9]+}}, v[[HI]]
|
|
|
|
|
; SI: buffer_store_dwordx2 v{{\[}}[[RESULT_LO]]:[[RESULT_HI]]{{\]}}
|
|
|
|
|
define void @v_sext_in_reg_i1_to_i64_move_use(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 addrspace(1)* %bptr, i64 %s.val) nounwind {
|
|
|
|
|
%tid = call i32 @llvm.r600.read.tidig.x()
|
|
|
|
|
%a.gep = getelementptr i64, i64 addrspace(1)* %aptr, i32 %tid
|
|
|
|
|
%b.gep = getelementptr i64, i64 addrspace(1)* %aptr, i32 %tid
|
|
|
|
|
%out.gep = getelementptr i64, i64 addrspace(1)* %out, i32 %tid
|
|
|
|
|
%a = load i64, i64 addrspace(1)* %a.gep, align 8
|
|
|
|
|
%b = load i64, i64 addrspace(1)* %b.gep, align 8
|
|
|
|
|
|
|
|
|
|
%c = shl i64 %a, %b
|
|
|
|
|
%shl = shl i64 %c, 63
|
|
|
|
|
%ashr = ashr i64 %shl, 63
|
|
|
|
|
|
|
|
|
|
%and = and i64 %ashr, %s.val
|
|
|
|
|
store i64 %and, i64 addrspace(1)* %out.gep, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; FUNC-LABEL: {{^}}v_sext_in_reg_i32_to_i64_move_use:
|
|
|
|
|
; SI: buffer_load_dwordx2
|
|
|
|
|
; SI: v_lshl_b64 v{{\[}}[[LO:[0-9]+]]:[[HI:[0-9]+]]{{\]}},
|
|
|
|
|
; SI-DAG: v_ashrrev_i32_e32 v[[SHR:[0-9]+]], 31, v[[LO]]
|
|
|
|
|
; SI-DAG: v_and_b32_e32 v[[RESULT_LO:[0-9]+]], s{{[0-9]+}}, v[[LO]]
|
|
|
|
|
; SI-DAG: v_and_b32_e32 v[[RESULT_HI:[0-9]+]], s{{[0-9]+}}, v[[SHR]]
|
|
|
|
|
; SI: buffer_store_dwordx2 v{{\[}}[[RESULT_LO]]:[[RESULT_HI]]{{\]}}
|
|
|
|
|
define void @v_sext_in_reg_i32_to_i64_move_use(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 addrspace(1)* %bptr, i64 %s.val) nounwind {
|
|
|
|
|
%tid = call i32 @llvm.r600.read.tidig.x()
|
|
|
|
|
%a.gep = getelementptr i64, i64 addrspace(1)* %aptr, i32 %tid
|
|
|
|
|
%b.gep = getelementptr i64, i64 addrspace(1)* %aptr, i32 %tid
|
|
|
|
|
%out.gep = getelementptr i64, i64 addrspace(1)* %out, i32 %tid
|
|
|
|
|
%a = load i64, i64 addrspace(1)* %a.gep, align 8
|
|
|
|
|
%b = load i64, i64 addrspace(1)* %b.gep, align 8
|
|
|
|
|
|
|
|
|
|
%c = shl i64 %a, %b
|
|
|
|
|
%shl = shl i64 %c, 32
|
|
|
|
|
%ashr = ashr i64 %shl, 32
|
|
|
|
|
%and = and i64 %ashr, %s.val
|
|
|
|
|
store i64 %and, i64 addrspace(1)* %out.gep, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|