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llvm-project/llvm/test/CodeGen/X86/inline-asm-2addr.ll

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Specify triple so 'make check' passes on darwin x86-64 The check lines were added with: http://reviews.llvm.org/rL256458 http://reviews.llvm.org/rL256460 but on a darwin target, the output looks like: ## InlineAsm Start rorq %rdi ## InlineAsm End ## InlineAsm Start rorq %rsi ## InlineAsm End leaq (%rsi,%rdi), %rax retq llvm-svn: 256507
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
Model inline asm constraint which ties an input to an output register as machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies. llvm-svn: 67512
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define i64 @t(i64 %a, i64 %b) nounwind ssp {
entry:
Try to passify buildbot llvm-svn: 256458
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; CHECK-LABEL: t:
Model inline asm constraint which ties an input to an output register as machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies. llvm-svn: 67512
2009-03-23 16:01:15 +08:00
%asmtmp = tail call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i64 %a) nounwind ; <i64> [#uses=1]
Try to passify buildbot llvm-svn: 256458
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; CHECK: #APP
; CHECK-NEXT: rorq %[[REG1:.*]]
; CHECK-NEXT: #NO_APP
Model inline asm constraint which ties an input to an output register as machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies. llvm-svn: 67512
2009-03-23 16:01:15 +08:00
%asmtmp1 = tail call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i64 %b) nounwind ; <i64> [#uses=1]
Try to passify buildbot llvm-svn: 256458
2015-12-27 14:18:48 +08:00
; CHECK-NEXT: #APP
; CHECK-NEXT: rorq %[[REG2:.*]]
; CHECK-NEXT: #NO_APP
Model inline asm constraint which ties an input to an output register as machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies. llvm-svn: 67512
2009-03-23 16:01:15 +08:00
%0 = add i64 %asmtmp1, %asmtmp ; <i64> [#uses=1]
Try to passify buildbot llvm-svn: 256458
2015-12-27 14:18:48 +08:00
; CHECK-NEXT: leaq (%[[REG2]],%[[REG1]]), %rax
Model inline asm constraint which ties an input to an output register as machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies. llvm-svn: 67512
2009-03-23 16:01:15 +08:00
ret i64 %0
Make the test properly constrained llvm-svn: 256460
2015-12-27 14:26:41 +08:00
; CHECK: retq
Model inline asm constraint which ties an input to an output register as machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies. llvm-svn: 67512
2009-03-23 16:01:15 +08:00
}