forked from OSchip/llvm-project
29 lines
1.1 KiB
LLVM
29 lines
1.1 KiB
LLVM
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; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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declare i32 @llvm.AMDGPU.flbit.i32(i32) nounwind readnone
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; FUNC-LABEL: {{^}}s_flbit:
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; SI: s_load_dword [[VAL:s[0-9]+]],
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; SI: s_flbit_i32 [[SRESULT:s[0-9]+]], [[VAL]]
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; SI: v_mov_b32_e32 [[VRESULT:v[0-9]+]], [[SRESULT]]
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; SI: buffer_store_dword [[VRESULT]],
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; SI: s_endpgm
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define void @s_flbit(i32 addrspace(1)* noalias %out, i32 %val) nounwind {
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%r = call i32 @llvm.AMDGPU.flbit.i32(i32 %val) nounwind readnone
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store i32 %r, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}v_flbit:
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; SI: buffer_load_dword [[VAL:v[0-9]+]],
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; SI: v_ffbh_i32_e32 [[RESULT:v[0-9]+]], [[VAL]]
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; SI: buffer_store_dword [[RESULT]],
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; SI: s_endpgm
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define void @v_flbit(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %valptr) nounwind {
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%val = load i32, i32 addrspace(1)* %valptr, align 4
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%r = call i32 @llvm.AMDGPU.flbit.i32(i32 %val) nounwind readnone
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store i32 %r, i32 addrspace(1)* %out, align 4
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ret void
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}
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