forked from OSchip/llvm-project
30 lines
1.2 KiB
ReStructuredText
30 lines
1.2 KiB
ReStructuredText
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**************************************************
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* *
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* Automatically generated file, do not edit! *
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* *
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**************************************************
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.. _amdgpu_synid_gfx1013_vaddr_49d53a:
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vaddr
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=====
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Image address which includes from one to four dimensional coordinates and other data used to locate a position in the image.
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This operand may be specified using either :ref:`standard VGPR syntax<amdgpu_synid_v>` or special :ref:`NSA VGPR syntax<amdgpu_synid_nsa>`.
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*Size:* 8-12 dwords. Actual size depends on :ref:`a16<amdgpu_synid_a16>`.
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* If specified using :ref:`NSA VGPR syntax<amdgpu_synid_nsa>`, the size is 8-12 dwords.
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* If specified using :ref:`standard VGPR syntax<amdgpu_synid_v>`, the size is 8 dwords. Opcodes which require more than 8 dwords for address size must specify 16 dwords due to a limited range of supported register sequences.
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Examples:
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.. parsed-literal::
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image_bvh_intersect_ray v[4:7], v[9:24], s[4:7]
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image_bvh_intersect_ray v[39:42], [v5, v4, v2, v1, v7, v3, v0, v6], s[12:15] a16
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*Operands:* :ref:`v<amdgpu_synid_v>`
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