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llvm-project/llvm/test/MC/ARM/arm_fixups.s

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ARM assembly parsing for MOV (immediate). Add range checking for the immediate operand and handle the "mov" mnemonic choosing between encodings based on the value of the immediate. Add tests for fixups, encoding choice and values, and diagnostic for out of range values. llvm-svn: 135500
2011-07-20 03:13:28 +08:00
@ RUN: llvm-mc -triple armv7-unknown-unknown %s --show-encoding > %t
@ RUN: FileCheck < %t %s
Add ARM big endian Target (armeb, thumbeb) Reviewed at http://llvm-reviews.chandlerc.com/D3095 llvm-svn: 205007
2014-03-28 22:35:30 +08:00
@ RUN: llvm-mc -triple armebv7-unknown-unknown %s --show-encoding > %t
@ RUN: FileCheck --check-prefix=CHECK-BE < %t %s
MC/ARM: Fix-up fixup offset for fixup_arm_branch target specific fixup. llvm-svn: 121772
2010-12-15 01:37:16 +08:00
ARM assembly parsing for MOV (immediate). Add range checking for the immediate operand and handle the "mov" mnemonic choosing between encodings based on the value of the immediate. Add tests for fixups, encoding choice and values, and diagnostic for out of range values. llvm-svn: 135500
2011-07-20 03:13:28 +08:00
bl _printf
@ CHECK: bl _printf @ encoding: [A,A,A,0xeb]
Ensure conditional BL instructions for ARM are given the fixup fixup_arm_condbranch. Patch by Tim Northover! llvm-svn: 153737
2012-03-30 17:15:32 +08:00
@ CHECK: @ fixup A - offset: 0, value: _printf, kind: fixup_arm_uncondbl
Add ARM big endian Target (armeb, thumbeb) Reviewed at http://llvm-reviews.chandlerc.com/D3095 llvm-svn: 205007
2014-03-28 22:35:30 +08:00
@ CHECK-BE: bl _printf @ encoding: [0xeb,A,A,A]
@ CHECK-BE: @ fixup A - offset: 0, value: _printf, kind: fixup_arm_uncondbl
Whitespace. llvm-svn: 135499
2011-07-20 03:02:39 +08:00
ARM assembly parsing for MOV (immediate). Add range checking for the immediate operand and handle the "mov" mnemonic choosing between encodings based on the value of the immediate. Add tests for fixups, encoding choice and values, and diagnostic for out of range values. llvm-svn: 135500
2011-07-20 03:13:28 +08:00
mov r9, :lower16:(_foo)
movw r9, :lower16:(_foo)
movt r9, :upper16:(_foo)
@ CHECK: movw r9, :lower16:_foo @ encoding: [A,0x90'A',0b0000AAAA,0xe3]
@ CHECK: @ fixup A - offset: 0, value: _foo, kind: fixup_arm_movw_lo16
Add ARM big endian Target (armeb, thumbeb) Reviewed at http://llvm-reviews.chandlerc.com/D3095 llvm-svn: 205007
2014-03-28 22:35:30 +08:00
@ CHECK-BE: movw r9, :lower16:_foo @ encoding: [0xe3,0b0000AAAA,0x90'A',A]
@ CHECK-BE: @ fixup A - offset: 0, value: _foo, kind: fixup_arm_movw_lo16
ARM assembly parsing for MOV (immediate). Add range checking for the immediate operand and handle the "mov" mnemonic choosing between encodings based on the value of the immediate. Add tests for fixups, encoding choice and values, and diagnostic for out of range values. llvm-svn: 135500
2011-07-20 03:13:28 +08:00
@ CHECK: movw r9, :lower16:_foo @ encoding: [A,0x90'A',0b0000AAAA,0xe3]
@ CHECK: @ fixup A - offset: 0, value: _foo, kind: fixup_arm_movw_lo16
Add ARM big endian Target (armeb, thumbeb) Reviewed at http://llvm-reviews.chandlerc.com/D3095 llvm-svn: 205007
2014-03-28 22:35:30 +08:00
@ CHECK-BE: movw r9, :lower16:_foo @ encoding: [0xe3,0b0000AAAA,0x90'A',A]
@ CHECK-BE: @ fixup A - offset: 0, value: _foo, kind: fixup_arm_movw_lo16
ARM assembly parsing for MOV (immediate). Add range checking for the immediate operand and handle the "mov" mnemonic choosing between encodings based on the value of the immediate. Add tests for fixups, encoding choice and values, and diagnostic for out of range values. llvm-svn: 135500
2011-07-20 03:13:28 +08:00
@ CHECK: movt r9, :upper16:_foo @ encoding: [A,0x90'A',0b0100AAAA,0xe3]
@ CHECK: @ fixup A - offset: 0, value: _foo, kind: fixup_arm_movt_hi16
Add ARM big endian Target (armeb, thumbeb) Reviewed at http://llvm-reviews.chandlerc.com/D3095 llvm-svn: 205007
2014-03-28 22:35:30 +08:00
@ CHECK-BE: movt r9, :upper16:_foo @ encoding: [0xe3,0b0100AAAA,0x90'A',A]
@ CHECK-BE: @ fixup A - offset: 0, value: _foo, kind: fixup_arm_movt_hi16
ARM: allow vanilla expressions for movw/movt. Expressions for movw/movt don't always have an :upper16: or :lower16: on them and that's ok. When they don't, it's just a plain [0-65536] immediate result, effectively the same as a :lower16: variant kind. rdar://10550147 llvm-svn: 155941
2012-05-02 04:43:21 +08:00
Change the ARM assembler to require a :lower16: or :upper16 on non-constant expressions for mov instructions instead of silently truncating by default. For the ARM assembler, we want to avoid misleadingly allowing something like "mov r0, <symbol>" especially when we turn it into a movw and the expression <symbol> does not have a :lower16: or :upper16" as part of the expression. We don't want the behavior of silently truncating, which can be unexpected and lead to bugs that are difficult to find since this is an easy mistake to make. This does change the previous behavior of llvm but actually matches an older gnu assembler that would not allow this but print less useful errors of like “invalid constant (0x927c0) after fixup” and “unsupported relocation on symbol foo”. The error for llvm is "immediate expression for mov requires :lower16: or :upper16" with correct location information on the operand as shown in the added test cases. rdar://12342160 llvm-svn: 206669
2014-04-19 07:06:39 +08:00
mov r2, :lower16:fred
ARM: allow vanilla expressions for movw/movt. Expressions for movw/movt don't always have an :upper16: or :lower16: on them and that's ok. When they don't, it's just a plain [0-65536] immediate result, effectively the same as a :lower16: variant kind. rdar://10550147 llvm-svn: 155941
2012-05-02 04:43:21 +08:00
Change the ARM assembler to require a :lower16: or :upper16 on non-constant expressions for mov instructions instead of silently truncating by default. For the ARM assembler, we want to avoid misleadingly allowing something like "mov r0, <symbol>" especially when we turn it into a movw and the expression <symbol> does not have a :lower16: or :upper16" as part of the expression. We don't want the behavior of silently truncating, which can be unexpected and lead to bugs that are difficult to find since this is an easy mistake to make. This does change the previous behavior of llvm but actually matches an older gnu assembler that would not allow this but print less useful errors of like “invalid constant (0x927c0) after fixup” and “unsupported relocation on symbol foo”. The error for llvm is "immediate expression for mov requires :lower16: or :upper16" with correct location information on the operand as shown in the added test cases. rdar://12342160 llvm-svn: 206669
2014-04-19 07:06:39 +08:00
@ CHECK: movw r2, :lower16:fred @ encoding: [A,0x20'A',0b0000AAAA,0xe3]
ARM: allow vanilla expressions for movw/movt. Expressions for movw/movt don't always have an :upper16: or :lower16: on them and that's ok. When they don't, it's just a plain [0-65536] immediate result, effectively the same as a :lower16: variant kind. rdar://10550147 llvm-svn: 155941
2012-05-02 04:43:21 +08:00
@ CHECK: @ fixup A - offset: 0, value: fred, kind: fixup_arm_movw_lo16
Change the ARM assembler to require a :lower16: or :upper16 on non-constant expressions for mov instructions instead of silently truncating by default. For the ARM assembler, we want to avoid misleadingly allowing something like "mov r0, <symbol>" especially when we turn it into a movw and the expression <symbol> does not have a :lower16: or :upper16" as part of the expression. We don't want the behavior of silently truncating, which can be unexpected and lead to bugs that are difficult to find since this is an easy mistake to make. This does change the previous behavior of llvm but actually matches an older gnu assembler that would not allow this but print less useful errors of like “invalid constant (0x927c0) after fixup” and “unsupported relocation on symbol foo”. The error for llvm is "immediate expression for mov requires :lower16: or :upper16" with correct location information on the operand as shown in the added test cases. rdar://12342160 llvm-svn: 206669
2014-04-19 07:06:39 +08:00
@ CHECK-BE: movw r2, :lower16:fred @ encoding: [0xe3,0b0000AAAA,0x20'A',A]
Add ARM big endian Target (armeb, thumbeb) Reviewed at http://llvm-reviews.chandlerc.com/D3095 llvm-svn: 205007
2014-03-28 22:35:30 +08:00
@ CHECK-BE: @ fixup A - offset: 0, value: fred, kind: fixup_arm_movw_lo16
Fix for pr24346: arm asm label calculation error in sub Some ARM instructions encode 32-bit immediates as a 8-bit integer (0-255) and a 4-bit rotation (0-30, even) in its least significant 12 bits. The original fixup, FK_Data_4, patches the instruction by the value bit-to-bit, regardless of the encoding. For example, assuming the label L1 and L2 are 0x0 and 0x104 respectively, the following instruction: add r0, r0, #(L2 - L1) ; expects 0x104, i.e., 260 would be assembled to the following, which adds 1 to r0, instead of 260: e2800104 add r0, r0, #4, 2 ; equivalently 1 The new fixup kind fixup_arm_mod_imm takes care of the encoding: e2800f41 add r0, r0, #260 Patch by Ting-Yuan Huang! llvm-svn: 265122
2016-04-01 17:40:47 +08:00
add r0, r0, #(L1 - L2)
@ CHECK: add r0, r0, #L1-L2 @ encoding: [A,0b0000AAAA,0x80,0xe2]
@ CHECK: @ fixup A - offset: 0, value: L1-L2, kind: fixup_arm_mod_imm
@ CHECK-BE: add r0, r0, #L1-L2 @ encoding: [0xe2,0x80,0b0000AAAA,A]
@ CHECK-BE: @ fixup A - offset: 0, value: L1-L2, kind: fixup_arm_mod_imm