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llvm-project/polly/test/ScopInfo/non_affine_region_1.ll

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tests: Drop -polly-detect-unprofitable and -polly-no-early-exit These flags are now always passed to all tests and need to be disabled if not needed. Disabling these flags, rather than passing them to almost all tests, significantly simplfies our RUN: lines. llvm-svn: 249422
2015-10-06 23:36:44 +08:00
; RUN: opt %loadPolly -polly-allow-nonaffine -polly-scops -analyze < %s | FileCheck %s
Do not model scalar accesses in non-affine subregions If a scalar was defined and used only in a non-affine subregion we do not need to model the accesses. However, if the scalar was defined inside the region and escapes the region we have to model the access. The same is true if the scalar was defined outside and used inside the region. llvm-svn: 230960
2015-03-02 22:06:01 +08:00
;
; Verify only the incoming scalar x is modeled as a read in the non-affine
; region.
;
; void f(int *A, int b) {
; int x;
; for (int i = 0; i < 1024; i++) {
; if (b > i)
; x = 0;
; else if (b < 2 * i)
; x = 3;
; else
; x = b;
;
; if (A[x])
; A[x] = 0;
; }
; }
;
Prepare unit tests for update to ISL 0.16 ISL 0.16 will change how sets are printed which breaks 117 unit tests that text-compare printed sets. This patch re-formats most of these unit tests using a script and small manual editing on top of that. When actually updating ISL, most work is done by just re-running the script to adapt to the changed output. Some tests that compare IR and tests with single CHECK-lines that can be easily updated manually are not included here. The re-format script will also be committed afterwards. The per-test formatter invocation command lines options will not be added in the near future because it is ad hoc and would overwrite the manual edits. Ideally it also shouldn't be required anymore because ISL's set printing has become more stable in 0.16. Differential Revision: http://reviews.llvm.org/D16095 llvm-svn: 257851
2016-01-15 08:48:42 +08:00
; TODO: We build a complicated representation of Stmt_bb10__TO__bb18's domain that will also complicate the schedule.
; Once the domain is simple this test should fail and this TODO can be removed.
; CHECK: Statements {
; CHECK-NEXT: Stmt_bb3
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [b] -> { Stmt_bb3[i0] : i0 <= 1023 and i0 >= 0 and i0 <= -1 + b };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [b] -> { Stmt_bb3[i0] -> [i0, 2] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [b] -> { Stmt_bb3[i0] -> MemRef_x_1__phi[] };
; CHECK-NEXT: Stmt_bb7
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [b] -> { Stmt_bb7[i0] : i0 >= b and 2i0 >= 1 + b and i0 <= 1023 and i0 >= 0 };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [b] -> { Stmt_bb7[i0] -> [i0, 1] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [b] -> { Stmt_bb7[i0] -> MemRef_x_1__phi[] };
; CHECK-NEXT: Stmt_bb8
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [b] -> { Stmt_bb8[0] : b = 0 };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [b] -> { Stmt_bb8[i0] -> [0, 0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [b] -> { Stmt_bb8[i0] -> MemRef_b[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [b] -> { Stmt_bb8[i0] -> MemRef_x_1__phi[] };
; CHECK-NEXT: Stmt_bb10__TO__bb18
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [b] -> { Stmt_bb10__TO__bb18[i0] : (i0 <= 1023 and i0 >= 0 and i0 <= -1 + b) or (i0 >= b and 2i0 >= 1 + b and i0 <= 1023 and i0 >= 0); Stmt_bb10__TO__bb18[0] : b = 0 };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [b] -> { Stmt_bb10__TO__bb18[i0] -> [i0, 3] : i0 <= -1 + b or (i0 >= b and 2i0 >= 1 + b); Stmt_bb10__TO__bb18[0] -> [0, 3] : b = 0 };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [b] -> { Stmt_bb10__TO__bb18[i0] -> MemRef_x_1__phi[] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [b] -> { Stmt_bb10__TO__bb18[i0] -> MemRef_A[o0] : o0 >= -2147483648 and o0 <= 2147483645 };
; CHECK-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [b] -> { Stmt_bb10__TO__bb18[i0] -> MemRef_A[o0] : o0 >= -2147483648 and o0 <= 2147483645 };
; CHECK-NEXT: }
Do not model scalar accesses in non-affine subregions If a scalar was defined and used only in a non-affine subregion we do not need to model the accesses. However, if the scalar was defined inside the region and escapes the region we have to model the access. The same is true if the scalar was defined outside and used inside the region. llvm-svn: 230960
2015-03-02 22:06:01 +08:00
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
define void @f(i32* %A, i32 %b) {
bb:
br label %bb1
bb1: ; preds = %bb19, %bb
%i.0 = phi i32 [ 0, %bb ], [ %tmp20, %bb19 ]
%exitcond = icmp ne i32 %i.0, 1024
br i1 %exitcond, label %bb2, label %bb21
bb2: ; preds = %bb1
%tmp = icmp slt i32 %i.0, %b
br i1 %tmp, label %bb3, label %bb4
bb3: ; preds = %bb2
br label %bb10
bb4: ; preds = %bb2
%tmp5 = mul nsw i32 %i.0, 2
%tmp6 = icmp sgt i32 %tmp5, %b
br i1 %tmp6, label %bb7, label %bb8
bb7: ; preds = %bb4
br label %bb10
bb8: ; preds = %bb4
br label %bb10
bb10: ; preds = %bb9, %bb3
%x.1 = phi i32 [ 0, %bb3 ], [ 3, %bb7 ], [ %b, %bb8 ]
%tmp11 = sext i32 %x.1 to i64
%tmp12 = getelementptr inbounds i32, i32* %A, i64 %tmp11
%tmp13 = load i32, i32* %tmp12, align 4
%tmp14 = icmp eq i32 %tmp13, 0
br i1 %tmp14, label %bb18, label %bb15
bb15: ; preds = %bb10
%tmp16 = sext i32 %x.1 to i64
%tmp17 = getelementptr inbounds i32, i32* %A, i64 %tmp16
store i32 0, i32* %tmp17, align 4
br label %bb18
bb18: ; preds = %bb10, %bb15
br label %bb19
bb19: ; preds = %bb18
%tmp20 = add nuw nsw i32 %i.0, 1
br label %bb1
bb21: ; preds = %bb1
ret void
}