2012-12-12 05:25:42 +08:00
|
|
|
;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
|
|
|
|
|
2013-06-06 04:27:35 +08:00
|
|
|
;CHECK: MUL NON-IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
|
2012-12-12 05:25:42 +08:00
|
|
|
|
2013-11-12 06:10:24 +08:00
|
|
|
define void @test(<4 x float> inreg %reg0) #0 {
|
|
|
|
%r0 = extractelement <4 x float> %reg0, i32 0
|
|
|
|
%r1 = extractelement <4 x float> %reg0, i32 1
|
2012-12-12 05:25:42 +08:00
|
|
|
%r2 = call float @llvm.AMDGPU.mul( float %r0, float %r1)
|
2013-11-12 06:10:24 +08:00
|
|
|
%vec = insertelement <4 x float> undef, float %r2, i32 0
|
|
|
|
call void @llvm.R600.store.swizzle(<4 x float> %vec, i32 0, i32 0)
|
2012-12-12 05:25:42 +08:00
|
|
|
ret void
|
|
|
|
}
|
|
|
|
|
|
|
|
declare float @llvm.AMDGPU.mul(float ,float ) readnone
|
2013-11-12 06:10:24 +08:00
|
|
|
declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
|
|
|
|
|
|
|
|
attributes #0 = { "ShaderType"="0" }
|