2016-07-27 00:45:50 +08:00
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; RUN: llc -march=amdgcn -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=NOXNACK -check-prefix=CI -check-prefix=GCN %s
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; RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefix=NOXNACK -check-prefix=VI -check-prefix=GCN %s
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; RUN: llc -march=amdgcn -mcpu=carrizo -mattr=+xnack -verify-machineinstrs < %s | FileCheck -check-prefix=XNACK -check-prefix=VI -check-prefix=GCN %s
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; RUN: llc -march=amdgcn -mtriple=amdgcn--amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=NOXNACK -check-prefix=HSA-NOXNACK -check-prefix=HSA -check-prefix=GCN %s
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; RUN: llc -march=amdgcn -mtriple=amdgcn--amdhsa -mcpu=carrizo -mattr=-xnack -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=NOXNACK -check-prefix=HSA-NOXNACK -check-prefix=HSA -check-prefix=GCN %s
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; RUN: llc -march=amdgcn -mtriple=amdgcn--amdhsa -mcpu=carrizo -mattr=+xnack -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=XNACK -check-prefix=HSA-XNACK -check-prefix=HSA -check-prefix=GCN %s
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2015-12-18 01:05:09 +08:00
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; GCN-LABEL: {{^}}no_vcc_no_flat:
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2016-07-27 00:45:50 +08:00
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; HSA-NOXNACK: is_xnack_enabled = 0
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; HSA-XNACK: is_xnack_enabled = 1
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; NOXNACK: ; NumSgprs: 8
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2016-01-05 07:35:53 +08:00
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; XNACK: ; NumSgprs: 12
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2015-12-18 01:05:09 +08:00
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define void @no_vcc_no_flat() {
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entry:
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call void asm sideeffect "", "~{SGPR7}"()
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ret void
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}
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; GCN-LABEL: {{^}}vcc_no_flat:
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2016-07-27 00:45:50 +08:00
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; HSA-NOXNACK: is_xnack_enabled = 0
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; HSA-XNACK: is_xnack_enabled = 1
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; NOXNACK: ; NumSgprs: 10
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2016-01-05 07:35:53 +08:00
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; XNACK: ; NumSgprs: 12
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2015-12-18 01:05:09 +08:00
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define void @vcc_no_flat() {
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entry:
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call void asm sideeffect "", "~{SGPR7},~{VCC}"()
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ret void
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}
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; GCN-LABEL: {{^}}no_vcc_flat:
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2016-07-27 00:45:50 +08:00
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; HSA-NOXNACK: is_xnack_enabled = 0
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; HSA-XNACK: is_xnack_enabled = 1
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2015-12-18 01:05:09 +08:00
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; CI: ; NumSgprs: 12
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AMDGPU/SI: xnack_mask is always reserved on VI
Summary:
Somehow, I first interpreted the docs as saying space for xnack_mask is only
reserved when XNACK is enabled via SH_MEM_CONFIG. I felt uneasy about this and
went back to actually test what is happening, and it turns out that xnack_mask
is always reserved at least on Tonga and Carrizo, in the sense that flat_scr
is always fixed below the SGPRs that are used to implement xnack_mask, whether
or not they are actually used.
I confirmed this by writing a shader using inline assembly to tease out the
aliasing between flat_scratch and regular SGPRs. For example, on Tonga, where
we fix the number of SGPRs to 80, s[74:75] aliases flat_scratch (so
xnack_mask is s[76:77] and vcc is s[78:79]).
This patch changes both the calculation of the total number of SGPRs and the
various register reservations to account for this.
It ought to be possible to use the gap left by xnack_mask when the feature
isn't used, but this patch doesn't try to do that. (Note that the same applies
to vcc.)
Note that previously, even before my earlier change in r256794, the SGPRs that
alias to xnack_mask could end up being used as well when flat_scr was unused
and the total number of SGPRs happened to fall on the right alignment
(e.g. highest regular SGPR being used s29 and VCC used would lead to number
of SGPRs being 32, where s28 and s29 alias with xnack_mask). So if there
were some conflict due to such aliasing, we should have noticed that already.
Reviewers: arsenm, tstellarAMD
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D15898
llvm-svn: 257073
2016-01-08 01:10:20 +08:00
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; VI: ; NumSgprs: 14
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2015-12-18 01:05:09 +08:00
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define void @no_vcc_flat() {
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entry:
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call void asm sideeffect "", "~{SGPR7},~{FLAT_SCR}"()
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ret void
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}
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; GCN-LABEL: {{^}}vcc_flat:
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2016-07-27 00:45:50 +08:00
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; HSA-NOXNACK: is_xnack_enabled = 0
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; HSA-XNACK: is_xnack_enabled = 1
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2015-12-18 01:05:09 +08:00
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; CI: ; NumSgprs: 12
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AMDGPU/SI: xnack_mask is always reserved on VI
Summary:
Somehow, I first interpreted the docs as saying space for xnack_mask is only
reserved when XNACK is enabled via SH_MEM_CONFIG. I felt uneasy about this and
went back to actually test what is happening, and it turns out that xnack_mask
is always reserved at least on Tonga and Carrizo, in the sense that flat_scr
is always fixed below the SGPRs that are used to implement xnack_mask, whether
or not they are actually used.
I confirmed this by writing a shader using inline assembly to tease out the
aliasing between flat_scratch and regular SGPRs. For example, on Tonga, where
we fix the number of SGPRs to 80, s[74:75] aliases flat_scratch (so
xnack_mask is s[76:77] and vcc is s[78:79]).
This patch changes both the calculation of the total number of SGPRs and the
various register reservations to account for this.
It ought to be possible to use the gap left by xnack_mask when the feature
isn't used, but this patch doesn't try to do that. (Note that the same applies
to vcc.)
Note that previously, even before my earlier change in r256794, the SGPRs that
alias to xnack_mask could end up being used as well when flat_scr was unused
and the total number of SGPRs happened to fall on the right alignment
(e.g. highest regular SGPR being used s29 and VCC used would lead to number
of SGPRs being 32, where s28 and s29 alias with xnack_mask). So if there
were some conflict due to such aliasing, we should have noticed that already.
Reviewers: arsenm, tstellarAMD
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D15898
llvm-svn: 257073
2016-01-08 01:10:20 +08:00
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; VI: ; NumSgprs: 14
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2015-12-18 01:05:09 +08:00
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define void @vcc_flat() {
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entry:
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call void asm sideeffect "", "~{SGPR7},~{VCC},~{FLAT_SCR}"()
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ret void
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}
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