forked from OSchip/llvm-project
45 lines
1.1 KiB
LLVM
45 lines
1.1 KiB
LLVM
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; RUN: llc -march=hexagon < %s | FileCheck %s
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; Generate reg = cmp.
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@g0 = common global i8 0, align 1
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@g1 = common global i32 0, align 4
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@g2 = common global i8 0, align 1
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@g3 = global i8 65, align 1
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; CHECK-LABEL: f0:
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; CHECK: r{{[0-9]+}} = cmp.eq(r{{[0-9]+}},#65)
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define i32 @f0() #0 {
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b0:
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%v0 = load i8, i8* @g0, align 1, !tbaa !0
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%v1 = icmp eq i8 %v0, 65
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%v2 = zext i1 %v1 to i32
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%v3 = load i32, i32* @g1, align 4, !tbaa !3
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%v4 = or i32 %v2, %v3
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store i32 %v4, i32* @g1, align 4, !tbaa !3
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store i8 66, i8* @g2, align 1, !tbaa !0
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ret i32 undef
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}
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; CHECK-LABEL: f1:
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; CHECK: r{{[0-9]+}} = cmp.eq(r{{[0-9]+}},r{{[0-9]+}})
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define i32 @f1() #0 {
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b0:
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%v0 = load i8, i8* @g0, align 1, !tbaa !0
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%v1 = load i8, i8* @g3, align 1, !tbaa !0
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%v2 = icmp eq i8 %v0, %v1
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%v3 = zext i1 %v2 to i32
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%v4 = load i32, i32* @g1, align 4, !tbaa !3
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%v5 = or i32 %v3, %v4
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store i32 %v5, i32* @g1, align 4, !tbaa !3
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store i8 66, i8* @g2, align 1, !tbaa !0
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ret i32 undef
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}
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attributes #0 = { nounwind }
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!0 = !{!1, !1, i64 0}
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!1 = !{!"omnipotent char", !2}
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!2 = !{!"Simple C/C++ TBAA"}
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!3 = !{!4, !4, i64 0}
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!4 = !{!"int", !1}
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