forked from OSchip/llvm-project
48 lines
1.5 KiB
LLVM
48 lines
1.5 KiB
LLVM
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; RUN: llc -march=hexagon -O2 < %s
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; REQUIRES: asserts
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; Test that the dead and kill flags are not added incorrectly during the
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; Hexagon Expand Condsets pass. The pass shouldn't add a kill flag to a use that
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; is tied to a definition, and the pass shouldn't remove the dead flag for a
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; definition that is really dead. The removal of the dead flag causes an assert
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; in the Machine Scheduler when querying live interval information.
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define void @f0() #0 {
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b0:
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br label %b1
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b1: ; preds = %b3, %b0
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%v0 = load i16, i16* undef, align 4
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%v1 = sext i16 %v0 to i32
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%v2 = and i32 %v1, 7
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%v3 = sub nsw i32 8, %v2
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%v4 = sub nsw i32 8, 0
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br label %b2
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b2: ; preds = %b2, %b1
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%v5 = phi i8* [ undef, %b1 ], [ %v16, %b2 ]
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%v6 = phi i32 [ 4, %b1 ], [ %v17, %b2 ]
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%v7 = load i8, i8* undef, align 1
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%v8 = zext i8 %v7 to i32
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%v9 = mul nuw nsw i32 %v8, %v3
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%v10 = add nuw nsw i32 0, %v9
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%v11 = mul nuw nsw i32 %v10, %v4
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%v12 = add nuw nsw i32 0, %v11
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%v13 = lshr i32 %v12, 6
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%v14 = trunc i32 %v13 to i8
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store i8 %v14, i8* %v5, align 1
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%v15 = getelementptr inbounds i8, i8* %v5, i32 1
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%v16 = select i1 undef, i8* undef, i8* %v15
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%v17 = add nsw i32 %v6, -1
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%v18 = icmp eq i32 %v17, 0
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br i1 %v18, label %b3, label %b2
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b3: ; preds = %b2
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br i1 undef, label %b1, label %b4
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b4: ; preds = %b3
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ret void
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}
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attributes #0 = { nounwind "target-cpu"="hexagonv65" }
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