llvm-project/llvm/test/CodeGen/ARM/t2-imm.ll

; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s

define i32 @f6(i32 %a) {
; CHECK:f6
; CHECK: movw r0, #1123
; CHECK: movt r0, #1000
    %tmp = add i32 0, 65537123
    ret i32 %tmp
}
Enabling thumb2 mode used to force support for armv6t2. Replace this with a temporary assertion and adjust the various test cases. llvm-svn: 197224 2013-12-13 19:16:00 +08:00			`; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 \| FileCheck %s`
Use movt/movw pair to materialize 32 bit constants on ARMv6T2+. This should be better than single load from constpool. llvm-svn: 82948 2009-09-28 07:52:58 +08:00
			`define i32 @f6(i32 %a) {`
			`; CHECK:f6`
Fix borken test llvm-svn: 112555 2010-08-31 07:41:49 +08:00			`; CHECK: movw r0, #1123`
			`; CHECK: movt r0, #1000`
Use movt/movw pair to materialize 32 bit constants on ARMv6T2+. This should be better than single load from constpool. llvm-svn: 82948 2009-09-28 07:52:58 +08:00			`%tmp = add i32 0, 65537123`
			`ret i32 %tmp`
			`}`