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llvm-project/llvm/test/MC/ARM/invalid-special-reg.s

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[ARM] Fix parsing of special register masks This parsing code was incorrectly checking for invalid characters, so an invalid instruction like: msr spsr_w, r0 would be emitted as: msr spsr_cxsf, r0 Differential revision: https://reviews.llvm.org/D30462 llvm-svn: 296607
2017-03-01 18:51:04 +08:00
@ RUN: not llvm-mc -triple armv7a--none-eabi < %s |& FileCheck %s
@ RUN: not llvm-mc -triple thumbv7a--none-eabi < %s |& FileCheck %s
msr apsr_c, r0
@ CHECK: invalid operand for instruction
msr cpsr_w
@ CHECK: invalid operand for instruction
msr cpsr_cc
@ CHECK: invalid operand for instruction
msr xpsr_c
@ CHECK: invalid operand for instruction