forked from OSchip/llvm-project
63 lines
1.7 KiB
LLVM
63 lines
1.7 KiB
LLVM
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; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=CHECK
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; RUN: llc < %s -mtriple=x86_64-linux -sink-insts-to-avoid-spills | FileCheck %s -check-prefix=SINK
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; Ensure that we sink copy-like instructions into loops to avoid register
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; spills.
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; CHECK: Spill
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; SINK-NOT: Spill
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%struct.A = type { i32, i32, i32, i32, i32, i32 }
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define void @_Z1fPhP1A(i8* nocapture readonly %input, %struct.A* %a) {
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%1 = getelementptr inbounds %struct.A, %struct.A* %a, i64 0, i32 0
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%2 = getelementptr inbounds %struct.A, %struct.A* %a, i64 0, i32 1
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%3 = getelementptr inbounds %struct.A, %struct.A* %a, i64 0, i32 2
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%4 = getelementptr inbounds %struct.A, %struct.A* %a, i64 0, i32 3
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%5 = getelementptr inbounds %struct.A, %struct.A* %a, i64 0, i32 4
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%6 = getelementptr inbounds %struct.A, %struct.A* %a, i64 0, i32 5
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br label %.backedge
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.backedge:
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%.0 = phi i8* [ %input, %0 ], [ %7, %.backedge.backedge ]
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%7 = getelementptr inbounds i8, i8* %.0, i64 1
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%8 = load i8, i8* %7, align 1
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switch i8 %8, label %.backedge.backedge [
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i8 0, label %9
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i8 10, label %10
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i8 20, label %11
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i8 30, label %12
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i8 40, label %13
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i8 50, label %14
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]
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; <label>:9
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tail call void @_Z6assignPj(i32* %1)
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br label %.backedge.backedge
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; <label>:10
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tail call void @_Z6assignPj(i32* %2)
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br label %.backedge.backedge
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.backedge.backedge:
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br label %.backedge
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; <label>:11
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tail call void @_Z6assignPj(i32* %3)
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br label %.backedge.backedge
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; <label>:12
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tail call void @_Z6assignPj(i32* %4)
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br label %.backedge.backedge
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; <label>:13
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tail call void @_Z6assignPj(i32* %5)
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br label %.backedge.backedge
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; <label>:14
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tail call void @_Z6assignPj(i32* %6)
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br label %.backedge.backedge
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}
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declare void @_Z6assignPj(i32*)
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