2018-06-12 09:47:02 +08:00
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// REQUIRES: ppc
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// RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t.o
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// RUN: ld.lld -shared %t.o -o %t.so
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2018-09-27 03:48:07 +08:00
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// RUN: llvm-readelf -r %t.o | FileCheck --check-prefix=InputRelocs %s
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// RUN: llvm-readelf -r %t.so | FileCheck --check-prefix=OutputRelocs %s
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2019-04-23 19:47:28 +08:00
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// RUN: llvm-readelf -x .got %t.so | FileCheck --check-prefix=HEX-LE %s
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// RUN: llvm-objdump -d --no-show-raw-insn %t.so | FileCheck --check-prefix=Dis %s
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2018-06-12 09:47:02 +08:00
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// RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t.o
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// RUN: ld.lld -shared %t.o -o %t.so
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2018-09-27 03:48:07 +08:00
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// RUN: llvm-readelf -r %t.o | FileCheck --check-prefix=InputRelocs %s
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// RUN: llvm-readelf -r %t.so | FileCheck --check-prefix=OutputRelocs %s
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2019-04-23 19:47:28 +08:00
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// RUN: llvm-readelf -x .got %t.so | FileCheck --check-prefix=HEX-BE %s
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// RUN: llvm-objdump -d --no-show-raw-insn %t.so | FileCheck --check-prefix=Dis %s
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2018-06-12 09:47:02 +08:00
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.text
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.abiversion 2
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.globl test
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.p2align 4
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.type test,@function
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test:
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.Lfunc_gep0:
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addis 2, 12, .TOC.-.Lfunc_gep0@ha
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addi 2, 2, .TOC.-.Lfunc_gep0@l
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.Lfunc_lep0:
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.localentry test, .Lfunc_lep0-.Lfunc_gep0
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mflr 0
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std 0, 16(1)
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stdu 1, -32(1)
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addis 3, 2, i@got@tlsld@ha
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addi 3, 3, i@got@tlsld@l
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bl __tls_get_addr(i@tlsld)
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nop
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addi 4, 3, i@dtprel
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lwa 4, i@dtprel(3)
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ld 0, 16(1)
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mtlr 0
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blr
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.globl test_64
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.p2align 4
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.type test_64,@function
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.globl test_adjusted
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.p2align 4
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.type test_adjusted,@function
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test_adjusted:
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.Lfunc_gep1:
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addis 2, 12, .TOC.-.Lfunc_gep1@ha
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addi 2, 2, .TOC.-.Lfunc_gep1@l
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.Lfunc_lep1:
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.localentry test_adjusted, .Lfunc_lep1-.Lfunc_gep1
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mflr 0
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std 0, 16(1)
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stdu 1, -32(1)
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addis 3, 2, k@got@tlsld@ha
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addi 3, 3, k@got@tlsld@l
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bl __tls_get_addr(k@tlsld)
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nop
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lis 4, k@dtprel@highesta
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ori 4, 4, k@dtprel@highera
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lis 5, k@dtprel@ha
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addi 5, 5, k@dtprel@l
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sldi 4, 4, 32
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or 4, 4, 5
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add 3, 3, 4
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addi 1, 1, 32
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ld 0, 16(1)
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mtlr 0
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blr
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.globl test_not_adjusted
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.p2align 4
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.type test_not_adjusted,@function
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test_not_adjusted:
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.Lfunc_gep2:
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addis 2, 12, .TOC.-.Lfunc_gep2@ha
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addi 2, 2, .TOC.-.Lfunc_gep2@l
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.Lfunc_lep2:
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.localentry test_not_adjusted, .Lfunc_lep2-.Lfunc_gep2
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mflr 0
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std 0, 16(1)
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stdu 1, -32(1)
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addis 3, 2, i@got@tlsld@ha
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addi 3, 3, i@got@tlsld@l
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bl __tls_get_addr(k@tlsld)
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nop
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lis 4, k@dtprel@highest
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ori 4, 4, k@dtprel@higher
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sldi 4, 4, 32
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oris 4, 4, k@dtprel@h
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ori 4, 4, k@dtprel@l
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add 3, 3, 4
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addi 1, 1, 32
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ld 0, 16(1)
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mtlr 0
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blr
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2018-06-13 04:26:49 +08:00
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.section .debug_addr,"",@progbits
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.quad i@dtprel+32768
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2018-06-12 09:47:02 +08:00
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.type i,@object
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.section .tdata,"awT",@progbits
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.space 1024
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.p2align 2
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i:
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.long 55
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.size i, 4
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.space 1024 * 1024 * 4
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.type k,@object
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.p2align 2
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k:
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.long 128
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.size k,4
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// Verify the input has all the remaining DTPREL based relocations we want to
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// test.
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// InputRelocs: Relocation section '.rela.text'
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// InputRelocs: R_PPC64_DTPREL16 {{[0-9a-f]+}} i + 0
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// InputRelocs: R_PPC64_DTPREL16_DS {{[0-9a-f]+}} i + 0
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// InputRelocs: R_PPC64_DTPREL16_HIGHESTA {{[0-9a-f]+}} k + 0
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// InputRelocs: R_PPC64_DTPREL16_HIGHERA {{[0-9a-f]+}} k + 0
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// InputRelocs: R_PPC64_DTPREL16_HA {{[0-9a-f]+}} k + 0
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// InputRelocs: R_PPC64_DTPREL16_LO {{[0-9a-f]+}} k + 0
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// InputRelocs: R_PPC64_DTPREL16_HIGHEST {{[0-9a-f]+}} k + 0
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// InputRelocs: R_PPC64_DTPREL16_HIGHER {{[0-9a-f]+}} k + 0
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// InputRelocs: R_PPC64_DTPREL16_HI {{[0-9a-f]+}} k + 0
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// InputRelocs: R_PPC64_DTPREL16_LO {{[0-9a-f]+}} k + 0
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2018-06-13 04:26:49 +08:00
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// InputRelocs: Relocation section '.rela.debug_addr'
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// InputRelocs: R_PPC64_DTPREL64 {{[0-9a-f]+}} i + 8000
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2018-06-12 09:47:02 +08:00
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// Expect a single dynamic relocation in the '.rela.dyn section for the module id.
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// OutputRelocs: Relocation section '.rela.dyn' at offset 0x{{[0-9a-f]+}} contains 1 entries:
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// OutputRelocs-NEXT: Offset Info Type Symbol's Value Symbol's Name + Addend
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// OutputRelocs-NEXT: R_PPC64_DTPMOD64
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[ELF][PPC] Allow PT_LOAD to have overlapping p_offset ranges
This change affects the non-linker script case (precisely, when the
`SECTIONS` command is not used). It deletes 3 alignments at PT_LOAD
boundaries for the default case: the size of a powerpc64 binary can be
decreased by at most 192kb. The technique can be ported to other
targets.
Let me demonstrate the idea with a maxPageSize=65536 example:
When assigning the address to the first output section of a new PT_LOAD,
if the end p_vaddr of the previous PT_LOAD is 0x10020, we advance to
the next multiple of maxPageSize: 0x20000. The new PT_LOAD will thus
have p_vaddr=0x20000. Because p_offset and p_vaddr are congruent modulo
maxPageSize, p_offset will be 0x20000, leaving a p_offset gap [0x10020,
0x20000) in the output.
Alternatively, if we advance to 0x20020, the new PT_LOAD will have
p_vaddr=0x20020. We can pick either 0x10020 or 0x20020 for p_offset!
Obviously 0x10020 is the choice because it leaves no gap. At runtime,
p_vaddr will be rounded down by pagesize (65536 if
pagesize=maxPageSize). This PT_LOAD will load additional initial
contents from p_offset ranges [0x10000,0x10020), which will also be
loaded by the previous PT_LOAD. This is fine if -z noseparate-code is in
effect or if we are not transiting between executable and non-executable
segments.
ld.bfd -z noseparate-code leverages this technique to keep output small.
This patch implements the technique in lld, which is mostly effective on
targets with large defaultMaxPageSize (AArch64/MIPS/PPC: 65536). The 3
removed alignments can save almost 3*65536 bytes.
Two places that rely on p_vaddr%pagesize = 0 have to be updated.
1) We used to round p_memsz(PT_GNU_RELRO) up to commonPageSize (defaults
to 4096 on all targets). Now p_vaddr%commonPageSize may be non-zero.
The updated formula takes account of that factor.
2) Our TP offsets formulae are only correct if p_vaddr%p_align = 0.
Fix them. See the updated comments in InputSection.cpp for details.
On targets that we enable the technique (only PPC64 now),
we can potentially make `p_vaddr(PT_TLS)%p_align(PT_TLS) != 0`
if `sh_addralign(.tdata) < sh_addralign(.tbss)`
This exposes many problems in ld.so implementations, especially the
offsets of dynamic TLS blocks. Known issues:
FreeBSD 13.0-CURRENT rtld-elf (i386/amd64/powerpc/arm64)
glibc (HEAD) i386 and x86_64 https://sourceware.org/bugzilla/show_bug.cgi?id=24606
musl<=1.1.22 on TLS Variant I architectures (aarch64/powerpc64/...)
So, force p_vaddr%p_align = 0 by rounding dot up to p_align(PT_TLS).
The technique will be enabled (with updated tests) for other targets in
subsequent patches.
Reviewed By: ruiu
Differential Revision: https://reviews.llvm.org/D64906
llvm-svn: 369343
2019-08-20 16:34:25 +08:00
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// The got entry for i is at .got+8*1 = 0x4209e0
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2019-04-23 19:47:28 +08:00
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// i@dtprel = 1024 - 0x8000 = -31744 = 0xffffffffffff8400
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// HEX-LE: section '.got':
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2020-08-17 21:38:05 +08:00
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// HEX-LE-NEXT: 4209d0 d0894200 00000000 00000000 00000000
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// HEX-LE-NEXT: 4209e0 00000000 00000000
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2019-04-23 19:47:28 +08:00
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// HEX-BE: section '.got':
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2020-08-17 21:38:05 +08:00
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// HEX-BE-NEXT: 4209d0 00000000 004289d0 00000000 00000000
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// HEX-BE-NEXT: 4209e0 00000000 00000000
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2019-04-23 19:47:28 +08:00
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2020-03-06 06:18:38 +08:00
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// Dis: <test>:
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2019-04-23 19:47:28 +08:00
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// Dis: addi 4, 3, -31744
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// Dis-NEXT: lwa 4, -31744(3)
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2018-06-12 09:47:02 +08:00
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// #k@dtprel(1024 + 4 + 1024 * 1024 * 4) = 0x400404
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// #highesta(k@dtprel) --> ((0x400404 - 0x8000 + 0x8000) >> 48) & 0xffff = 0
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// #highera(k@dtprel) --> ((0x400404 - 0x8000 + 0x8000) >> 32) & 0xffff = 0
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// #ha(k@dtprel) --> ((0x400404 - 0x8000 + 0x8000) >> 16) & 0xffff = 64
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// #lo(k@dtprel) --> ((0x400404 - 0x8000) & 0xffff = -31740
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2020-03-06 06:18:38 +08:00
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// Dis: <test_adjusted>:
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2018-06-12 09:47:02 +08:00
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// Dis: lis 4, 0
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// Dis: ori 4, 4, 0
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// Dis: lis 5, 64
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// Dis: addi 5, 5, -31740
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// #highest(k@dtprel) --> ((0x400404 - 0x8000) >> 48) & 0xffff = 0
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// #higher(k@dtprel) --> ((0x400404 - 0x8000) >> 32) & 0xffff = 0
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// #hi(k@dtprel) --> ((0x400404 - 0x8000) >> 16) & 0xffff = 63
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// #lo(k@dtprel) --> ((0x400404 - 0x8000) & 0xffff = 33796
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2020-03-06 06:18:38 +08:00
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// Dis: <test_not_adjusted>:
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2018-06-12 09:47:02 +08:00
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// Dis: lis 4, 0
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// Dis: ori 4, 4, 0
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// Dis: oris 4, 4, 63
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// Dis: ori 4, 4, 33796
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2018-06-27 21:55:41 +08:00
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