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llvm-project/llvm/test/CodeGen/X86/tbm-intrinsics-x86_64.ll

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[X86][TBM] Regenerate bextri intrinsics tests. NFCI. llvm-svn: 310788
2017-08-13 19:56:15 +08:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
[X86][TBM] Branch off i32 intrinsics and test on 32/64 bits Part of ongoing work to ensure we test all intrinsic style tests on 32 and 64 bit targets where possible. llvm-svn: 333839
2018-06-03 21:38:52 +08:00
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+tbm | FileCheck %s
[X86][TBM] Add tests showing failure to fold RFLAGS result into TBM instructions. And fails to select TBM instructions at all. llvm-svn: 310790
2017-08-13 20:16:00 +08:00
Adding intrinsics to the llvm backend for TBM instruction set. Phabricator code review is located here: http://llvm-reviews.chandlerc.com/D1750 llvm-svn: 191539
2013-09-28 02:38:42 +08:00
define i64 @test_x86_tbm_bextri_u64(i64 %a) nounwind readnone {
[X86][TBM] Regenerate bextri intrinsics tests. NFCI. llvm-svn: 310788
2017-08-13 19:56:15 +08:00
; CHECK-LABEL: test_x86_tbm_bextri_u64:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-05 01:18:51 +08:00
; CHECK: # %bb.0: # %entry
[X86][TBM] Use realistic BEXTR control bits Avoid constant values that are guaranteed to give zero Found while investigating BEXTR optimizations for PR34042. llvm-svn: 333849
2018-06-04 02:15:06 +08:00
; CHECK-NEXT: bextrq $3841, %rdi, %rax # imm = 0xF01
[X86][TBM] Regenerate bextri intrinsics tests. NFCI. llvm-svn: 310788
2017-08-13 19:56:15 +08:00
; CHECK-NEXT: retq
Adding intrinsics to the llvm backend for TBM instruction set. Phabricator code review is located here: http://llvm-reviews.chandlerc.com/D1750 llvm-svn: 191539
2013-09-28 02:38:42 +08:00
entry:
[X86][TBM] Use realistic BEXTR control bits Avoid constant values that are guaranteed to give zero Found while investigating BEXTR optimizations for PR34042. llvm-svn: 333849
2018-06-04 02:15:06 +08:00
%0 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %a, i64 3841)
Adding intrinsics to the llvm backend for TBM instruction set. Phabricator code review is located here: http://llvm-reviews.chandlerc.com/D1750 llvm-svn: 191539
2013-09-28 02:38:42 +08:00
ret i64 %0
}
Add patterns for selecting TBM instructions from logical operations. Patch from Yunzhong Gao. llvm-svn: 191871
2013-10-03 12:16:45 +08:00
declare i64 @llvm.x86.tbm.bextri.u64(i64, i64) nounwind readnone
Adding intrinsics to the llvm backend for TBM instruction set. Phabricator code review is located here: http://llvm-reviews.chandlerc.com/D1750 llvm-svn: 191539
2013-09-28 02:38:42 +08:00
define i64 @test_x86_tbm_bextri_u64_m(i64* nocapture %a) nounwind readonly {
[X86][TBM] Regenerate bextri intrinsics tests. NFCI. llvm-svn: 310788
2017-08-13 19:56:15 +08:00
; CHECK-LABEL: test_x86_tbm_bextri_u64_m:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-05 01:18:51 +08:00
; CHECK: # %bb.0: # %entry
[X86][TBM] Use realistic BEXTR control bits Avoid constant values that are guaranteed to give zero Found while investigating BEXTR optimizations for PR34042. llvm-svn: 333849
2018-06-04 02:15:06 +08:00
; CHECK-NEXT: bextrq $3841, (%rdi), %rax # imm = 0xF01
[X86][TBM] Regenerate bextri intrinsics tests. NFCI. llvm-svn: 310788
2017-08-13 19:56:15 +08:00
; CHECK-NEXT: retq
Adding intrinsics to the llvm backend for TBM instruction set. Phabricator code review is located here: http://llvm-reviews.chandlerc.com/D1750 llvm-svn: 191539
2013-09-28 02:38:42 +08:00
entry:
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%tmp1 = load i64, i64* %a, align 8
[X86][TBM] Use realistic BEXTR control bits Avoid constant values that are guaranteed to give zero Found while investigating BEXTR optimizations for PR34042. llvm-svn: 333849
2018-06-04 02:15:06 +08:00
%0 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %tmp1, i64 3841)
Adding intrinsics to the llvm backend for TBM instruction set. Phabricator code review is located here: http://llvm-reviews.chandlerc.com/D1750 llvm-svn: 191539
2013-09-28 02:38:42 +08:00
ret i64 %0
}
[X86][TBM] Add tests showing failure to fold RFLAGS result into TBM instructions. And fails to select TBM instructions at all. llvm-svn: 310790
2017-08-13 20:16:00 +08:00
[X86][BMI][TBM] Only demand bottom 16-bits of the BEXTR control op (PR34042) Only the bottom 16-bits of BEXTR's control op are required (0:8 INDEX, 15:8 LENGTH). Differential Revision: https://reviews.llvm.org/D47690 llvm-svn: 334083
2018-06-06 18:52:10 +08:00
define i64 @test_x86_tbm_bextri_u64_bigint(i64 %a) nounwind readnone {
; CHECK-LABEL: test_x86_tbm_bextri_u64_bigint:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: bextrq $65535, %rdi, %rax # imm = 0xFFFF
; CHECK-NEXT: retq
entry:
%0 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %a, i64 549755813887)
ret i64 %0
}
[X86][TBM] Add tests showing failure to fold RFLAGS result into TBM instructions. And fails to select TBM instructions at all. llvm-svn: 310790
2017-08-13 20:16:00 +08:00
define i64 @test_x86_tbm_bextri_u64_z(i64 %a, i64 %b) nounwind readnone {
; CHECK-LABEL: test_x86_tbm_bextri_u64_z:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-05 01:18:51 +08:00
; CHECK: # %bb.0: # %entry
[X86][TBM] Use realistic BEXTR control bits Avoid constant values that are guaranteed to give zero Found while investigating BEXTR optimizations for PR34042. llvm-svn: 333849
2018-06-04 02:15:06 +08:00
; CHECK-NEXT: bextrq $3841, %rdi, %rax # imm = 0xF01
[X86][TBM] Add tests showing failure to fold RFLAGS result into TBM instructions. And fails to select TBM instructions at all. llvm-svn: 310790
2017-08-13 20:16:00 +08:00
; CHECK-NEXT: cmoveq %rsi, %rax
; CHECK-NEXT: retq
entry:
[X86][TBM] Use realistic BEXTR control bits Avoid constant values that are guaranteed to give zero Found while investigating BEXTR optimizations for PR34042. llvm-svn: 333849
2018-06-04 02:15:06 +08:00
%0 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %a, i64 3841)
[X86][TBM] Add tests showing failure to fold RFLAGS result into TBM instructions. And fails to select TBM instructions at all. llvm-svn: 310790
2017-08-13 20:16:00 +08:00
%1 = icmp eq i64 %0, 0
%2 = select i1 %1, i64 %b, i64 %0
ret i64 %2
}