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llvm-project/llvm/test/CodeGen/X86/rdtsc.ll

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[X86] Regenerate RDTSC codegen tests llvm-svn: 320042
2017-12-07 21:50:29 +08:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown-unknown -mcpu=generic | FileCheck %s --check-prefix=X86
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=generic | FileCheck %s --check-prefix=X64
[X86] Add support for Read Time Stamp Counter x86 builtin intrinsics. This patch: - Adds two new X86 builtin intrinsics ('int_x86_rdtsc' and 'int_x86_rdtscp') as GCCBuiltin intrinsics; - Teaches the backend how to lower the two new builtins; - Introduces a common function to lower READCYCLECOUNTER dag nodes and the two new rdtsc/rdtscp intrinsics; - Improves (and extends) the existing x86 test 'rdtsc.ll'; now test 'rdtsc.ll' correctly verifies that both READCYCLECOUNTER and the two new intrinsics work fine for both 64bit and 32bit Subtargets. llvm-svn: 207127
2014-04-25 01:18:27 +08:00
; Verify that we correctly lower ISD::READCYCLECOUNTER.
define i64 @test_builtin_readcyclecounter() {
[X86] Regenerate RDTSC codegen tests llvm-svn: 320042
2017-12-07 21:50:29 +08:00
; X86-LABEL: test_builtin_readcyclecounter:
; X86: # %bb.0:
; X86-NEXT: rdtsc
; X86-NEXT: retl
;
; X64-LABEL: test_builtin_readcyclecounter:
; X64: # %bb.0:
; X64-NEXT: rdtsc
; X64-NEXT: shlq $32, %rdx
; X64-NEXT: orq %rdx, %rax
; X64-NEXT: retq
[X86] Add support for Read Time Stamp Counter x86 builtin intrinsics. This patch: - Adds two new X86 builtin intrinsics ('int_x86_rdtsc' and 'int_x86_rdtscp') as GCCBuiltin intrinsics; - Teaches the backend how to lower the two new builtins; - Introduces a common function to lower READCYCLECOUNTER dag nodes and the two new rdtsc/rdtscp intrinsics; - Improves (and extends) the existing x86 test 'rdtsc.ll'; now test 'rdtsc.ll' correctly verifies that both READCYCLECOUNTER and the two new intrinsics work fine for both 64bit and 32bit Subtargets. llvm-svn: 207127
2014-04-25 01:18:27 +08:00
%1 = tail call i64 @llvm.readcyclecounter()
ret i64 %1
}
; Verify that we correctly lower the Read Cycle Counter GCC x86 builtins
; (i.e. RDTSC and RDTSCP).
check that rdtsc is generated from readcyclecounter llvm-svn: 24431
2005-11-21 05:41:59 +08:00
[X86] Add support for Read Time Stamp Counter x86 builtin intrinsics. This patch: - Adds two new X86 builtin intrinsics ('int_x86_rdtsc' and 'int_x86_rdtscp') as GCCBuiltin intrinsics; - Teaches the backend how to lower the two new builtins; - Introduces a common function to lower READCYCLECOUNTER dag nodes and the two new rdtsc/rdtscp intrinsics; - Improves (and extends) the existing x86 test 'rdtsc.ll'; now test 'rdtsc.ll' correctly verifies that both READCYCLECOUNTER and the two new intrinsics work fine for both 64bit and 32bit Subtargets. llvm-svn: 207127
2014-04-25 01:18:27 +08:00
define i64 @test_builtin_rdtsc() {
[X86] Regenerate RDTSC codegen tests llvm-svn: 320042
2017-12-07 21:50:29 +08:00
; X86-LABEL: test_builtin_rdtsc:
; X86: # %bb.0:
; X86-NEXT: rdtsc
; X86-NEXT: retl
;
; X64-LABEL: test_builtin_rdtsc:
; X64: # %bb.0:
; X64-NEXT: rdtsc
; X64-NEXT: shlq $32, %rdx
; X64-NEXT: orq %rdx, %rax
; X64-NEXT: retq
[X86] Add support for Read Time Stamp Counter x86 builtin intrinsics. This patch: - Adds two new X86 builtin intrinsics ('int_x86_rdtsc' and 'int_x86_rdtscp') as GCCBuiltin intrinsics; - Teaches the backend how to lower the two new builtins; - Introduces a common function to lower READCYCLECOUNTER dag nodes and the two new rdtsc/rdtscp intrinsics; - Improves (and extends) the existing x86 test 'rdtsc.ll'; now test 'rdtsc.ll' correctly verifies that both READCYCLECOUNTER and the two new intrinsics work fine for both 64bit and 32bit Subtargets. llvm-svn: 207127
2014-04-25 01:18:27 +08:00
%1 = tail call i64 @llvm.x86.rdtsc()
ret i64 %1
check that rdtsc is generated from readcyclecounter llvm-svn: 24431
2005-11-21 05:41:59 +08:00
}
[X86] Add support for Read Time Stamp Counter x86 builtin intrinsics. This patch: - Adds two new X86 builtin intrinsics ('int_x86_rdtsc' and 'int_x86_rdtscp') as GCCBuiltin intrinsics; - Teaches the backend how to lower the two new builtins; - Introduces a common function to lower READCYCLECOUNTER dag nodes and the two new rdtsc/rdtscp intrinsics; - Improves (and extends) the existing x86 test 'rdtsc.ll'; now test 'rdtsc.ll' correctly verifies that both READCYCLECOUNTER and the two new intrinsics work fine for both 64bit and 32bit Subtargets. llvm-svn: 207127
2014-04-25 01:18:27 +08:00
define i64 @test_builtin_rdtscp(i8* %A) {
[X86] Regenerate RDTSC codegen tests llvm-svn: 320042
2017-12-07 21:50:29 +08:00
; X86-LABEL: test_builtin_rdtscp:
; X86: # %bb.0:
; X86-NEXT: pushl %esi
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: rdtscp
; X86-NEXT: movl %ecx, (%esi)
; X86-NEXT: popl %esi
Correct dwarf unwind information in function epilogue This patch aims to provide correct dwarf unwind information in function epilogue for X86. It consists of two parts. The first part inserts CFI instructions that set appropriate cfa offset and cfa register in emitEpilogue() in X86FrameLowering. This part is X86 specific. The second part is platform independent and ensures that: * CFI instructions do not affect code generation (they are not counted as instructions when tail duplicating or tail merging) * Unwind information remains correct when a function is modified by different passes. This is done in a late pass by analyzing information about cfa offset and cfa register in BBs and inserting additional CFI directives where necessary. Added CFIInstrInserter pass: * analyzes each basic block to determine cfa offset and register are valid at its entry and exit * verifies that outgoing cfa offset and register of predecessor blocks match incoming values of their successors * inserts additional CFI directives at basic block beginning to correct the rule for calculating CFA Having CFI instructions in function epilogue can cause incorrect CFA calculation rule for some basic blocks. This can happen if, due to basic block reordering, or the existence of multiple epilogue blocks, some of the blocks have wrong cfa offset and register values set by the epilogue block above them. CFIInstrInserter is currently run only on X86, but can be used by any target that implements support for adding CFI instructions in epilogue. Patch by Violeta Vukobrat. Differential Revision: https://reviews.llvm.org/D42848 llvm-svn: 330706
2018-04-24 18:32:08 +08:00
; X86-NEXT: .cfi_def_cfa_offset 4
[X86] Regenerate RDTSC codegen tests llvm-svn: 320042
2017-12-07 21:50:29 +08:00
; X86-NEXT: retl
;
; X64-LABEL: test_builtin_rdtscp:
; X64: # %bb.0:
; X64-NEXT: rdtscp
; X64-NEXT: movl %ecx, (%rdi)
; X64-NEXT: shlq $32, %rdx
; X64-NEXT: orq %rdx, %rax
; X64-NEXT: retq
[X86] Add support for Read Time Stamp Counter x86 builtin intrinsics. This patch: - Adds two new X86 builtin intrinsics ('int_x86_rdtsc' and 'int_x86_rdtscp') as GCCBuiltin intrinsics; - Teaches the backend how to lower the two new builtins; - Introduces a common function to lower READCYCLECOUNTER dag nodes and the two new rdtsc/rdtscp intrinsics; - Improves (and extends) the existing x86 test 'rdtsc.ll'; now test 'rdtsc.ll' correctly verifies that both READCYCLECOUNTER and the two new intrinsics work fine for both 64bit and 32bit Subtargets. llvm-svn: 207127
2014-04-25 01:18:27 +08:00
%1 = tail call i64 @llvm.x86.rdtscp(i8* %A)
ret i64 %1
}
declare i64 @llvm.readcyclecounter()
declare i64 @llvm.x86.rdtscp(i8*)
declare i64 @llvm.x86.rdtsc()