2017-09-21 17:53:21 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s -check-prefix=X64
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; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s -check-prefix=X86
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declare float @llvm.sqrt.f32(float %x);
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define float @fast_recip_sqrt(float %x) {
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; X64-LABEL: fast_recip_sqrt:
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2017-12-05 01:18:51 +08:00
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; X64: # %bb.0:
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2018-06-07 02:47:55 +08:00
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; X64-NEXT: rsqrtss %xmm0, %xmm1
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; X64-NEXT: mulss %xmm1, %xmm0
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; X64-NEXT: mulss %xmm1, %xmm0
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; X64-NEXT: addss {{.*}}(%rip), %xmm0
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2018-06-16 04:44:55 +08:00
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; X64-NEXT: mulss {{.*}}(%rip), %xmm1
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; X64-NEXT: mulss %xmm1, %xmm0
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2017-09-21 17:53:21 +08:00
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; X64-NEXT: retq
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;
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; X86-LABEL: fast_recip_sqrt:
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2017-12-05 01:18:51 +08:00
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; X86: # %bb.0:
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2017-09-21 17:53:21 +08:00
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; X86-NEXT: flds {{[0-9]+}}(%esp)
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; X86-NEXT: fsqrt
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; X86-NEXT: fld1
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; X86-NEXT: fdivp %st(1)
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; X86-NEXT: retl
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%y = call fast float @llvm.sqrt.f32(float %x)
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%z = fdiv fast float 1.0, %y
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ret float %z
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}
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declare float @llvm.fmuladd.f32(float %a, float %b, float %c);
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define float @fast_fmuladd_opts(float %a , float %b , float %c) {
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; X64-LABEL: fast_fmuladd_opts:
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2017-12-05 01:18:51 +08:00
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; X64: # %bb.0:
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2018-06-19 07:44:59 +08:00
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; X64-NEXT: mulss {{.*}}(%rip), %xmm0
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2017-09-21 17:53:21 +08:00
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; X64-NEXT: retq
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;
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; X86-LABEL: fast_fmuladd_opts:
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2017-12-05 01:18:51 +08:00
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; X86: # %bb.0:
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2017-09-21 17:53:21 +08:00
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; X86-NEXT: flds {{[0-9]+}}(%esp)
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2018-06-19 07:44:59 +08:00
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; X86-NEXT: fmuls {{.*}}
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2017-09-21 17:53:21 +08:00
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; X86-NEXT: retl
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%res = call fast float @llvm.fmuladd.f32(float %a, float 2.0, float %a)
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ret float %res
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}
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2017-09-22 01:40:58 +08:00
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; The multiply is strict.
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2017-09-22 13:48:20 +08:00
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@mul1 = common global double 0.000000e+00, align 4
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2017-09-22 01:40:58 +08:00
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define double @not_so_fast_mul_add(double %x) {
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; X64-LABEL: not_so_fast_mul_add:
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2017-12-05 01:18:51 +08:00
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; X64: # %bb.0:
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2018-06-19 07:44:59 +08:00
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; X64-NEXT: movsd {{.*}}(%rip), %xmm1
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2017-09-22 01:40:58 +08:00
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; X64-NEXT: mulsd %xmm0, %xmm1
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2018-06-19 07:44:59 +08:00
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; X64-NEXT: mulsd {{.*}}(%rip), %xmm0
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2017-09-22 13:48:20 +08:00
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; X64-NEXT: movsd %xmm1, {{.*}}(%rip)
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2017-09-22 01:40:58 +08:00
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; X64-NEXT: retq
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;
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; X86-LABEL: not_so_fast_mul_add:
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2017-12-05 01:18:51 +08:00
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; X86: # %bb.0:
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2017-09-22 01:40:58 +08:00
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; X86-NEXT: fldl {{[0-9]+}}(%esp)
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; X86-NEXT: fld %st(0)
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; X86-NEXT: fmull {{\.LCPI.*}}
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2018-06-19 07:44:59 +08:00
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; X86-NEXT: fxch %st(1)
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; X86-NEXT: fmull {{\.LCPI.*}}
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; X86-NEXT: fxch %st(1)
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2017-09-22 13:48:20 +08:00
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; X86-NEXT: fstpl mul1
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2017-09-22 01:40:58 +08:00
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; X86-NEXT: retl
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%m = fmul double %x, 4.2
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%a = fadd fast double %m, %x
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2017-09-22 13:48:20 +08:00
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store double %m, double* @mul1, align 4
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2017-09-22 01:40:58 +08:00
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ret double %a
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}
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; The sqrt is strict.
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2017-09-22 13:48:20 +08:00
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@sqrt1 = common global float 0.000000e+00, align 4
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2017-09-22 01:40:58 +08:00
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define float @not_so_fast_recip_sqrt(float %x) {
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; X64-LABEL: not_so_fast_recip_sqrt:
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2017-12-05 01:18:51 +08:00
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; X64: # %bb.0:
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2018-06-16 04:44:55 +08:00
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; X64-NEXT: rsqrtss %xmm0, %xmm1
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; X64-NEXT: sqrtss %xmm0, %xmm2
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; X64-NEXT: mulss %xmm1, %xmm0
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; X64-NEXT: mulss %xmm1, %xmm0
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; X64-NEXT: addss {{.*}}(%rip), %xmm0
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; X64-NEXT: mulss {{.*}}(%rip), %xmm1
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; X64-NEXT: mulss %xmm1, %xmm0
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; X64-NEXT: movss %xmm2, sqrt1(%rip)
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2017-09-22 01:40:58 +08:00
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; X64-NEXT: retq
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;
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; X86-LABEL: not_so_fast_recip_sqrt:
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2017-12-05 01:18:51 +08:00
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; X86: # %bb.0:
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2017-09-22 01:40:58 +08:00
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; X86-NEXT: flds {{[0-9]+}}(%esp)
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; X86-NEXT: fsqrt
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; X86-NEXT: fld1
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2017-09-22 13:48:20 +08:00
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; X86-NEXT: fdiv %st(1)
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; X86-NEXT: fxch %st(1)
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; X86-NEXT: fstps sqrt1
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2017-09-22 01:40:58 +08:00
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; X86-NEXT: retl
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%y = call float @llvm.sqrt.f32(float %x)
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%z = fdiv fast float 1.0, %y
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2017-09-22 13:48:20 +08:00
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store float %y, float* @sqrt1, align 4
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%ret = fadd float %z , 14.5
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2017-09-22 01:40:58 +08:00
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ret float %z
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}
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2018-06-16 04:44:55 +08:00
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define float @div_arcp_by_const(half %x) {
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; X64-LABEL: .LCPI4_0:
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; X64-NEXT: .long 1036828672
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; X64-LABEL: div_arcp_by_const:
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; X64: movzwl %ax, %edi
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; X64: mulss .LCPI4_0(%rip), %xmm0
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;
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; X86-LABEL: .LCPI4_0:
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; X86-NEXT: .long 1036828672
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; X86-LABEL: div_arcp_by_const:
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; X86: movzwl %ax, %eax
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; X86: fmuls .LCPI4_0
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%rcp = fdiv arcp half %x, 10.0
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%z = fpext half %rcp to float
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ret float %z
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}
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