maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
llvm-project/llvm/test/CodeGen/Hexagon/struct_args.ll

17 lines
456 B
LLVM
Raw Normal View History

Enable all Hexagon tests. llvm-svn: 156824
2012-05-16 00:13:12 +08:00
; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
Hexagon: Add V4 combine instructions and some more Def Pats for V2. llvm-svn: 174331
2013-02-04 23:52:56 +08:00
; CHECK: r{{[0-9]}}:{{[0-9]}} = combine({{r[0-9]|#0}}, r{{[0-9]}})
Enable all Hexagon tests. llvm-svn: 156824
2012-05-16 00:13:12 +08:00
; CHECK: r{{[0-9]}}:{{[0-9]}} |= asl(r{{[0-9]}}:{{[0-9]}}, #32)
Hexagon backend support llvm-svn: 146412
2011-12-13 05:14:40 +08:00
%struct.small = type { i32, i32 }
@s1 = common global %struct.small zeroinitializer, align 4
define void @foo() nounwind {
entry:
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load i64, i64* bitcast (%struct.small* @s1 to i64*), align 1
Hexagon backend support llvm-svn: 146412
2011-12-13 05:14:40 +08:00
call void @bar(i64 %0)
ret void
}
declare void @bar(i64)