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[PowerPC] Define XL-compatible macros only for AIX and Linux Since XLC only ever shipped on PowerPC AIX and Linux, it is not reasonable to provide the compatibility macros on any target other than those two. This patch restricts those macros to AIX/Linux. Differential revision: https://reviews.llvm.org/D110213
2021-09-29 19:14:12 +08:00
// RUN: %clang_cc1 -O2 -triple powerpc64-unknown-linux-gnu \
[PowerPC] Store, load, move from and to registers related builtins This patch implements store, load, move from and to registers related builtins, as well as the builtin for stfiw. The patch aims to provide feature parady with xlC on AIX. Differential revision: https://reviews.llvm.org/D105946
2021-07-21 04:20:03 +08:00
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
[PowerPC] Define XL-compatible macros only for AIX and Linux Since XLC only ever shipped on PowerPC AIX and Linux, it is not reasonable to provide the compatibility macros on any target other than those two. This patch restricts those macros to AIX/Linux. Differential revision: https://reviews.llvm.org/D110213
2021-09-29 19:14:12 +08:00
// RUN: %clang_cc1 -O2 -triple powerpc64le-unknown-linux-gnu \
[PowerPC] Store, load, move from and to registers related builtins This patch implements store, load, move from and to registers related builtins, as well as the builtin for stfiw. The patch aims to provide feature parady with xlC on AIX. Differential revision: https://reviews.llvm.org/D105946
2021-07-21 04:20:03 +08:00
// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
// RUN: %clang_cc1 -O2 -triple powerpc-unknown-aix \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
// RUN: %clang_cc1 -O2 -triple powerpc64-unknown-aix \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
extern void *vpa;
void test_dcbtstt(void) {
// CHECK-LABEL: @test_dcbtstt
// CHECK: %0 = load i8*, i8** @vpa
// CHECK: tail call void @llvm.ppc.dcbtstt(i8* %0)
// CHECK: ret void
__dcbtstt(vpa);
}
void test_dcbtt(void) {
// CHECK-LABEL: @test_dcbt
// CHECK: %0 = load i8*, i8** @vpa
// CHECK: tail call void @llvm.ppc.dcbtt(i8* %0)
// CHECK: ret void
__dcbtt(vpa);
}