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llvm-project/bolt/test/runtime/X86/lit.local.cfg

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[PR] AArch64: Fix ADR instruction handling Summary: There are 2 problems found when handling ADR instruction: 1. When extracting value from the ADR instruction we need to do it another way, then we do it for ADRP instruction. 2. When creating target expression the VariantKind should be other for ADR instruction. And we introduces R_AARCH64_ADR_PREL_LO21, R_AARCH64_TLSDESC_ADR_PREL21 and R_AARCH64_ADR_PREL_PG_HI21_NC relocations support. Also this patch introduces AdrPass, which will replace non-local pointing ADR instructions with ADRP + ADD instructions sequence due to small offset range of ADR instruction, so after BOLT magic there are no guarantees that ADR instruction will still be in the range of just +- 1MB from its target. The instruction replacement needs relocations to be avalailable, so we won't remove "IsFromCode" relocations after disassembly from BF anymore. Also we need original offset of ADR instruction to be available so we add offset annotation for these instructions. The last thing this patch adds is ARM testing directory, which will be used only on ARM testing servers. The common tests (non-assembler tests which are platform-independent) might be moved from the X86 directory to the parent one in the future, so such tests could be tested on both X86 and ARM machines. Vladislav Khmelevsky, Advanced Software Technology Lab, Huawei (cherry picked from FBD30497379)
2021-08-20 08:07:01 +08:00
if config.host_arch not in ['x86', 'X86', 'x86_64']:
config.unsupported = True