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llvm-project/llvm/test/CodeGen/X86/2010-02-19-TailCallRetAddrB...

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Instruction scheduling itinerary for Intel Atom. Adds an instruction itinerary to all x86 instructions, giving each a default latency of 1, using the InstrItinClass IIC_DEFAULT. Sets specific latencies for Atom for the instructions in files X86InstrCMovSetCC.td, X86InstrArithmetic.td, X86InstrControl.td, and X86InstrShiftRotate.td. The Atom latencies for the remainder of the x86 instructions will be set in subsequent patches. Adds a test to verify that the scheduler is working. Also changes the scheduling preference to "Hybrid" for i386 Atom, while leaving x86_64 as ILP. Patch by Preston Gurd! llvm-svn: 149558
2012-02-02 07:20:51 +08:00
; RUN: llc -mcpu=generic -mtriple=i386-apple-darwin -tailcallopt < %s | FileCheck %s
Mark the return address stack slot as mutable when moving the return address during a tail call. A parameter might overwrite this stack slot during the tail call. The sequence during a tail call is: 1.) load return address to temp reg 2.) move parameters (might involve storing to return address stack slot) 3.) store return address to new location from temp reg If the stack location is marked immutable CodeGen can colocate load (1) with the store (3). This fixes bug 6225. llvm-svn: 96783
2010-02-23 00:18:09 +08:00
; Check that lowered argumens do not overwrite the return address before it is moved.
; Bug 6225
;
; If a call is a fastcc tail call and tail call optimization is enabled, the
Revert "Temporarily enable MI-Sched on X86." This reverts commit 98a9b72e8c56dc13a2617de84503a3d78352789c. llvm-svn: 184823
2013-06-25 10:48:58 +08:00
; caller frame is replaced by the callee frame. This can require that arguments are
Mark the return address stack slot as mutable when moving the return address during a tail call. A parameter might overwrite this stack slot during the tail call. The sequence during a tail call is: 1.) load return address to temp reg 2.) move parameters (might involve storing to return address stack slot) 3.) store return address to new location from temp reg If the stack location is marked immutable CodeGen can colocate load (1) with the store (3). This fixes bug 6225. llvm-svn: 96783
2010-02-23 00:18:09 +08:00
; placed on the former return address stack slot. Special care needs to be taken
; taken that the return address is moved / or stored in a register before
; lowering of arguments potentially overwrites the value.
;
Revert "Temporarily enable MI-Sched on X86." This reverts commit 98a9b72e8c56dc13a2617de84503a3d78352789c. llvm-svn: 184823
2013-06-25 10:48:58 +08:00
; Move return address (76(%esp)) to a temporary register (%ebp)
; CHECK: movl 76(%esp), [[REGISTER:%[a-z]+]]
Mark the return address stack slot as mutable when moving the return address during a tail call. A parameter might overwrite this stack slot during the tail call. The sequence during a tail call is: 1.) load return address to temp reg 2.) move parameters (might involve storing to return address stack slot) 3.) store return address to new location from temp reg If the stack location is marked immutable CodeGen can colocate load (1) with the store (3). This fixes bug 6225. llvm-svn: 96783
2010-02-23 00:18:09 +08:00
; Overwrite return addresss
Revert "Temporarily enable MI-Sched on X86." This reverts commit 98a9b72e8c56dc13a2617de84503a3d78352789c. llvm-svn: 184823
2013-06-25 10:48:58 +08:00
; CHECK: movl [[EBX:%[a-z]+]], 76(%esp)
Mark the return address stack slot as mutable when moving the return address during a tail call. A parameter might overwrite this stack slot during the tail call. The sequence during a tail call is: 1.) load return address to temp reg 2.) move parameters (might involve storing to return address stack slot) 3.) store return address to new location from temp reg If the stack location is marked immutable CodeGen can colocate load (1) with the store (3). This fixes bug 6225. llvm-svn: 96783
2010-02-23 00:18:09 +08:00
; Move return address from temporary register (%ebp) to new stack location (60(%esp))
Revert "Temporarily enable MI-Sched on X86." This reverts commit 98a9b72e8c56dc13a2617de84503a3d78352789c. llvm-svn: 184823
2013-06-25 10:48:58 +08:00
; CHECK: movl [[REGISTER]], 60(%esp)
Mark the return address stack slot as mutable when moving the return address during a tail call. A parameter might overwrite this stack slot during the tail call. The sequence during a tail call is: 1.) load return address to temp reg 2.) move parameters (might involve storing to return address stack slot) 3.) store return address to new location from temp reg If the stack location is marked immutable CodeGen can colocate load (1) with the store (3). This fixes bug 6225. llvm-svn: 96783
2010-02-23 00:18:09 +08:00
%tupl_p = type [9 x i32]*
declare fastcc void @l297(i32 %r10, i32 %r9, i32 %r8, i32 %r7, i32 %r6, i32 %r5, i32 %r3, i32 %r2) noreturn nounwind
declare fastcc void @l298(i32 %r10, i32 %r9, i32 %r4) noreturn nounwind
define fastcc void @l186(%tupl_p %r1) noreturn nounwind {
entry:
%ptr1 = getelementptr %tupl_p %r1, i32 0, i32 0
%r2 = load i32* %ptr1
%ptr3 = getelementptr %tupl_p %r1, i32 0, i32 1
%r3 = load i32* %ptr3
%ptr5 = getelementptr %tupl_p %r1, i32 0, i32 2
%r4 = load i32* %ptr5
%ptr7 = getelementptr %tupl_p %r1, i32 0, i32 3
%r5 = load i32* %ptr7
%ptr9 = getelementptr %tupl_p %r1, i32 0, i32 4
%r6 = load i32* %ptr9
%ptr11 = getelementptr %tupl_p %r1, i32 0, i32 5
%r7 = load i32* %ptr11
%ptr13 = getelementptr %tupl_p %r1, i32 0, i32 6
%r8 = load i32* %ptr13
%ptr15 = getelementptr %tupl_p %r1, i32 0, i32 7
%r9 = load i32* %ptr15
%ptr17 = getelementptr %tupl_p %r1, i32 0, i32 8
%r10 = load i32* %ptr17
%cond = icmp eq i32 %r10, 3
br i1 %cond, label %true, label %false
true:
tail call fastcc void @l297(i32 %r10, i32 %r9, i32 %r8, i32 %r7, i32 %r6, i32 %r5, i32 %r3, i32 %r2) noreturn nounwind
ret void
false:
tail call fastcc void @l298(i32 %r10, i32 %r9, i32 %r4) noreturn nounwind
ret void
}
Revert "Temporarily enable MI-Sched on X86." This reverts commit 98a9b72e8c56dc13a2617de84503a3d78352789c. llvm-svn: 184823
2013-06-25 10:48:58 +08:00