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llvm-project/lld/test/ELF/ppc64-relocs.s

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[PPC64] Remove support for ELF V1 ABI in LLD The current support for V1 ABI in LLD is incomplete. This patch removes V1 ABI support and changes the default behavior to V2 ABI, issuing an error when using the V1 ABI. It also updates the testcases to V2 and removes any V1 specific tests. Differential Revision: https://reviews.llvm.org/D46316 llvm-svn: 331529
2018-05-04 23:09:49 +08:00
# REQUIRES: ppc
[PPC64] toc-indirect to toc-relative relaxation This is based on D54720 by Sean Fertile. When accessing a global symbol which is not defined in the translation unit, compilers will generate instructions that load the address from the toc entry. If the symbol is defined, non-preemptable, and addressable with a 32-bit signed offset from the toc pointer, the address can be computed directly. e.g. addis 3, 2, .LC0@toc@ha # R_PPC64_TOC16_HA ld 3, .LC0@toc@l(3) # R_PPC64_TOC16_LO_DS, load the address from a .toc entry ld/lwa 3, 0(3) # load the value from the address .section .toc,"aw",@progbits .LC0: .tc var[TC],var can be relaxed to addis 3,2,var@toc@ha # this may be relaxed to a nop, addi 3,3,var@toc@l # then this becomes addi 3,2,var@toc ld/lwa 3, 0(3) # load the value from the address We can delete the test ppc64-got-indirect.s as its purpose is covered by newly added ppc64-toc-relax.s and ppc64-toc-relax-constants.s Reviewed By: ruiu, sfertile Differential Revision: https://reviews.llvm.org/D60958 llvm-svn: 360112
2019-05-07 12:26:05 +08:00
# RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t.o
# RUN: ld.lld --no-toc-optimize %t.o -o %t
[ELF][PPC64] Rename some PPC64 ELFv2 specific RelExpr from R_PPC_* to R_PPC64_* The following abstract relocation types (RelExpr) are PPC64 ELFv2 ABI specific, not used by PPC32. So rename them to prevent confusion when the PPC32 port is improved. * R_PPC_CALL R_PPC_CALL_PLT: R_PPC_CALL_PLT represents R_PPC64_REL14 and R_PPC64_REL24. If the function is not preemptable, R_PPC_CALL_PLT can be optimized to R_PPC_CALL: the formula adjusts the symbol VA from the global entry point to the local entry point. * R_PPC_TOC: represents R_PPC64_TOC. We don't have a test. Add one to ppc64-relocs.s Rename it to R_PPC64_TOCBASE because `@tocbase` is the assembly form. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D62800 llvm-svn: 362359
2019-06-03 14:21:33 +08:00
# RUN: llvm-readelf -x .rodata -x .R_PPC64_TOC -x .eh_frame %t | FileCheck %s --check-prefix=DATALE
[PPC64] toc-indirect to toc-relative relaxation This is based on D54720 by Sean Fertile. When accessing a global symbol which is not defined in the translation unit, compilers will generate instructions that load the address from the toc entry. If the symbol is defined, non-preemptable, and addressable with a 32-bit signed offset from the toc pointer, the address can be computed directly. e.g. addis 3, 2, .LC0@toc@ha # R_PPC64_TOC16_HA ld 3, .LC0@toc@l(3) # R_PPC64_TOC16_LO_DS, load the address from a .toc entry ld/lwa 3, 0(3) # load the value from the address .section .toc,"aw",@progbits .LC0: .tc var[TC],var can be relaxed to addis 3,2,var@toc@ha # this may be relaxed to a nop, addi 3,3,var@toc@l # then this becomes addi 3,2,var@toc ld/lwa 3, 0(3) # load the value from the address We can delete the test ppc64-got-indirect.s as its purpose is covered by newly added ppc64-toc-relax.s and ppc64-toc-relax-constants.s Reviewed By: ruiu, sfertile Differential Revision: https://reviews.llvm.org/D60958 llvm-svn: 360112
2019-05-07 12:26:05 +08:00
# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
[PPC64] Remove support for ELF V1 ABI in LLD The current support for V1 ABI in LLD is incomplete. This patch removes V1 ABI support and changes the default behavior to V2 ABI, issuing an error when using the V1 ABI. It also updates the testcases to V2 and removes any V1 specific tests. Differential Revision: https://reviews.llvm.org/D46316 llvm-svn: 331529
2018-05-04 23:09:49 +08:00
[PPC64] toc-indirect to toc-relative relaxation This is based on D54720 by Sean Fertile. When accessing a global symbol which is not defined in the translation unit, compilers will generate instructions that load the address from the toc entry. If the symbol is defined, non-preemptable, and addressable with a 32-bit signed offset from the toc pointer, the address can be computed directly. e.g. addis 3, 2, .LC0@toc@ha # R_PPC64_TOC16_HA ld 3, .LC0@toc@l(3) # R_PPC64_TOC16_LO_DS, load the address from a .toc entry ld/lwa 3, 0(3) # load the value from the address .section .toc,"aw",@progbits .LC0: .tc var[TC],var can be relaxed to addis 3,2,var@toc@ha # this may be relaxed to a nop, addi 3,3,var@toc@l # then this becomes addi 3,2,var@toc ld/lwa 3, 0(3) # load the value from the address We can delete the test ppc64-got-indirect.s as its purpose is covered by newly added ppc64-toc-relax.s and ppc64-toc-relax-constants.s Reviewed By: ruiu, sfertile Differential Revision: https://reviews.llvm.org/D60958 llvm-svn: 360112
2019-05-07 12:26:05 +08:00
# RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t.o
# RUN: ld.lld --no-toc-optimize %t.o -o %t
[ELF][PPC64] Rename some PPC64 ELFv2 specific RelExpr from R_PPC_* to R_PPC64_* The following abstract relocation types (RelExpr) are PPC64 ELFv2 ABI specific, not used by PPC32. So rename them to prevent confusion when the PPC32 port is improved. * R_PPC_CALL R_PPC_CALL_PLT: R_PPC_CALL_PLT represents R_PPC64_REL14 and R_PPC64_REL24. If the function is not preemptable, R_PPC_CALL_PLT can be optimized to R_PPC_CALL: the formula adjusts the symbol VA from the global entry point to the local entry point. * R_PPC_TOC: represents R_PPC64_TOC. We don't have a test. Add one to ppc64-relocs.s Rename it to R_PPC64_TOCBASE because `@tocbase` is the assembly form. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D62800 llvm-svn: 362359
2019-06-03 14:21:33 +08:00
# RUN: llvm-readelf -x .rodata -x .R_PPC64_TOC -x .eh_frame %t | FileCheck %s --check-prefix=DATABE
[PPC64] toc-indirect to toc-relative relaxation This is based on D54720 by Sean Fertile. When accessing a global symbol which is not defined in the translation unit, compilers will generate instructions that load the address from the toc entry. If the symbol is defined, non-preemptable, and addressable with a 32-bit signed offset from the toc pointer, the address can be computed directly. e.g. addis 3, 2, .LC0@toc@ha # R_PPC64_TOC16_HA ld 3, .LC0@toc@l(3) # R_PPC64_TOC16_LO_DS, load the address from a .toc entry ld/lwa 3, 0(3) # load the value from the address .section .toc,"aw",@progbits .LC0: .tc var[TC],var can be relaxed to addis 3,2,var@toc@ha # this may be relaxed to a nop, addi 3,3,var@toc@l # then this becomes addi 3,2,var@toc ld/lwa 3, 0(3) # load the value from the address We can delete the test ppc64-got-indirect.s as its purpose is covered by newly added ppc64-toc-relax.s and ppc64-toc-relax-constants.s Reviewed By: ruiu, sfertile Differential Revision: https://reviews.llvm.org/D60958 llvm-svn: 360112
2019-05-07 12:26:05 +08:00
# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
[ELF2] Add a base set of PPC64 relocations This is mostly an adaptation of the code in LLVM's lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp, and handles a sufficient number of relocations to link a 'hello world' program on big-Endian PPC64/Linux (ELF v1 ABI). llvm-svn: 250101
2015-10-13 04:56:18 +08:00
[PPC64] Remove support for ELF V1 ABI in LLD The current support for V1 ABI in LLD is incomplete. This patch removes V1 ABI support and changes the default behavior to V2 ABI, issuing an error when using the V1 ABI. It also updates the testcases to V2 and removes any V1 specific tests. Differential Revision: https://reviews.llvm.org/D46316 llvm-svn: 331529
2018-05-04 23:09:49 +08:00
.text
[ELF2] Add a base set of PPC64 relocations This is mostly an adaptation of the code in LLVM's lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp, and handles a sufficient number of relocations to link a 'hello world' program on big-Endian PPC64/Linux (ELF v1 ABI). llvm-svn: 250101
2015-10-13 04:56:18 +08:00
.global _start
_start:
.Lfoo:
li 0,1
li 3,42
sc
[ELF][PPC] Fix getRelExpr for R_PPC64_REL16_HI Fixes https://github.com/ClangBuiltLinux/linux/issues/640 R_PPC64_REL16_HI was incorrectly computed as an R_ABS relocation. rLLD368964 made it a linker failure. Change it to use R_PC to fix the failures. Add ppc64-reloc-rel.s for these R_PPC64_REL* tests. llvm-svn: 369184
2019-08-17 14:28:03 +08:00
.section .toc,"aw",@progbits
[ELF2] Add a base set of PPC64 relocations This is mostly an adaptation of the code in LLVM's lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp, and handles a sufficient number of relocations to link a 'hello world' program on big-Endian PPC64/Linux (ELF v1 ABI). llvm-svn: 250101
2015-10-13 04:56:18 +08:00
.L1:
[ELF][PPC] Fix getRelExpr for R_PPC64_REL16_HI Fixes https://github.com/ClangBuiltLinux/linux/issues/640 R_PPC64_REL16_HI was incorrectly computed as an R_ABS relocation. rLLD368964 made it a linker failure. Change it to use R_PC to fix the failures. Add ppc64-reloc-rel.s for these R_PPC64_REL* tests. llvm-svn: 369184
2019-08-17 14:28:03 +08:00
.quad 22, 37, 89, 47
[ELF2] Add a base set of PPC64 relocations This is mostly an adaptation of the code in LLVM's lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp, and handles a sufficient number of relocations to link a 'hello world' program on big-Endian PPC64/Linux (ELF v1 ABI). llvm-svn: 250101
2015-10-13 04:56:18 +08:00
.section .R_PPC64_TOC16_LO_DS,"ax",@progbits
ld 1, .L1@toc@l(2)
[PPC64][test] Delete redundant labels from ppc64-relocs.s llvm-svn: 362235
2019-05-31 23:41:19 +08:00
# CHECK-LABEL: Disassembly of section .R_PPC64_TOC16_LO_DS:
[PPC][PPC64] Improve some llvm-objdump -d -D tests Various improvement: Some offsets in disassembly are incorrect after several layout adjustment. Fix them. llvm-objdump -D should not be used. -D dumps unrelated non-text sections. Replace them with llvm-objdump -d, llvm-readelf -x, etc Many llvm-objdump -d tests use {{.*}} . Add the option --no-show-raw-insn to avoid check hex bytes. ppc64-long-branch.s does not need a shared object. Delete it. Make ppc64-ifunc.s check 2 ifuncs. Reviewers: ruiu, espindola Subscribers: emaste, nemanjai, arichardson, kbarton, jsji, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60998 llvm-svn: 358975
2019-04-23 19:47:28 +08:00
# CHECK: 1001000c: ld 1, -32768(2)
[ELF2] Add a base set of PPC64 relocations This is mostly an adaptation of the code in LLVM's lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp, and handles a sufficient number of relocations to link a 'hello world' program on big-Endian PPC64/Linux (ELF v1 ABI). llvm-svn: 250101
2015-10-13 04:56:18 +08:00
.section .R_PPC64_TOC16_LO,"ax",@progbits
addi 1, 2, .L1@toc@l
[PPC64][test] Delete redundant labels from ppc64-relocs.s llvm-svn: 362235
2019-05-31 23:41:19 +08:00
# CHECK-LABEL: Disassembly of section .R_PPC64_TOC16_LO:
[PPC][PPC64] Improve some llvm-objdump -d -D tests Various improvement: Some offsets in disassembly are incorrect after several layout adjustment. Fix them. llvm-objdump -D should not be used. -D dumps unrelated non-text sections. Replace them with llvm-objdump -d, llvm-readelf -x, etc Many llvm-objdump -d tests use {{.*}} . Add the option --no-show-raw-insn to avoid check hex bytes. ppc64-long-branch.s does not need a shared object. Delete it. Make ppc64-ifunc.s check 2 ifuncs. Reviewers: ruiu, espindola Subscribers: emaste, nemanjai, arichardson, kbarton, jsji, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60998 llvm-svn: 358975
2019-04-23 19:47:28 +08:00
# CHECK: 10010010: addi 1, 2, -32768
[ELF2] Add a base set of PPC64 relocations This is mostly an adaptation of the code in LLVM's lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp, and handles a sufficient number of relocations to link a 'hello world' program on big-Endian PPC64/Linux (ELF v1 ABI). llvm-svn: 250101
2015-10-13 04:56:18 +08:00
.section .R_PPC64_TOC16_HI,"ax",@progbits
addis 1, 2, .L1@toc@h
[PPC64][test] Delete redundant labels from ppc64-relocs.s llvm-svn: 362235
2019-05-31 23:41:19 +08:00
# CHECK-LABEL: Disassembly of section .R_PPC64_TOC16_HI:
[PPC][PPC64] Improve some llvm-objdump -d -D tests Various improvement: Some offsets in disassembly are incorrect after several layout adjustment. Fix them. llvm-objdump -D should not be used. -D dumps unrelated non-text sections. Replace them with llvm-objdump -d, llvm-readelf -x, etc Many llvm-objdump -d tests use {{.*}} . Add the option --no-show-raw-insn to avoid check hex bytes. ppc64-long-branch.s does not need a shared object. Delete it. Make ppc64-ifunc.s check 2 ifuncs. Reviewers: ruiu, espindola Subscribers: emaste, nemanjai, arichardson, kbarton, jsji, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60998 llvm-svn: 358975
2019-04-23 19:47:28 +08:00
# CHECK: 10010014: addis 1, 2, -1
[ELF2] Add a base set of PPC64 relocations This is mostly an adaptation of the code in LLVM's lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp, and handles a sufficient number of relocations to link a 'hello world' program on big-Endian PPC64/Linux (ELF v1 ABI). llvm-svn: 250101
2015-10-13 04:56:18 +08:00
.section .R_PPC64_TOC16_HA,"ax",@progbits
addis 1, 2, .L1@toc@ha
[PPC64][test] Delete redundant labels from ppc64-relocs.s llvm-svn: 362235
2019-05-31 23:41:19 +08:00
# CHECK-LABEL: Disassembly of section .R_PPC64_TOC16_HA:
[PPC64] toc-indirect to toc-relative relaxation This is based on D54720 by Sean Fertile. When accessing a global symbol which is not defined in the translation unit, compilers will generate instructions that load the address from the toc entry. If the symbol is defined, non-preemptable, and addressable with a 32-bit signed offset from the toc pointer, the address can be computed directly. e.g. addis 3, 2, .LC0@toc@ha # R_PPC64_TOC16_HA ld 3, .LC0@toc@l(3) # R_PPC64_TOC16_LO_DS, load the address from a .toc entry ld/lwa 3, 0(3) # load the value from the address .section .toc,"aw",@progbits .LC0: .tc var[TC],var can be relaxed to addis 3,2,var@toc@ha # this may be relaxed to a nop, addi 3,3,var@toc@l # then this becomes addi 3,2,var@toc ld/lwa 3, 0(3) # load the value from the address We can delete the test ppc64-got-indirect.s as its purpose is covered by newly added ppc64-toc-relax.s and ppc64-toc-relax-constants.s Reviewed By: ruiu, sfertile Differential Revision: https://reviews.llvm.org/D60958 llvm-svn: 360112
2019-05-07 12:26:05 +08:00
# CHECK: 10010018: addis 1, 2, 0
[ELF2] Add a base set of PPC64 relocations This is mostly an adaptation of the code in LLVM's lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp, and handles a sufficient number of relocations to link a 'hello world' program on big-Endian PPC64/Linux (ELF v1 ABI). llvm-svn: 250101
2015-10-13 04:56:18 +08:00
.section .R_PPC64_ADDR16_LO,"ax",@progbits
li 1, .Lfoo@l
[PPC64][test] Delete redundant labels from ppc64-relocs.s llvm-svn: 362235
2019-05-31 23:41:19 +08:00
# CHECK-LABEL: Disassembly of section .R_PPC64_ADDR16_LO:
[ELF][PPC] Fix getRelExpr for R_PPC64_REL16_HI Fixes https://github.com/ClangBuiltLinux/linux/issues/640 R_PPC64_REL16_HI was incorrectly computed as an R_ABS relocation. rLLD368964 made it a linker failure. Change it to use R_PC to fix the failures. Add ppc64-reloc-rel.s for these R_PPC64_REL* tests. llvm-svn: 369184
2019-08-17 14:28:03 +08:00
# CHECK: li 1, 0
[ELF2] Add a base set of PPC64 relocations This is mostly an adaptation of the code in LLVM's lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp, and handles a sufficient number of relocations to link a 'hello world' program on big-Endian PPC64/Linux (ELF v1 ABI). llvm-svn: 250101
2015-10-13 04:56:18 +08:00
.section .R_PPC64_ADDR16_HI,"ax",@progbits
li 1, .Lfoo@h
[PPC64][test] Delete redundant labels from ppc64-relocs.s llvm-svn: 362235
2019-05-31 23:41:19 +08:00
# CHECK-LABEL: Disassembly of section .R_PPC64_ADDR16_HI:
[ELF][PPC] Fix getRelExpr for R_PPC64_REL16_HI Fixes https://github.com/ClangBuiltLinux/linux/issues/640 R_PPC64_REL16_HI was incorrectly computed as an R_ABS relocation. rLLD368964 made it a linker failure. Change it to use R_PC to fix the failures. Add ppc64-reloc-rel.s for these R_PPC64_REL* tests. llvm-svn: 369184
2019-08-17 14:28:03 +08:00
# CHECK: li 1, 4097
[ELF2] Add a base set of PPC64 relocations This is mostly an adaptation of the code in LLVM's lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp, and handles a sufficient number of relocations to link a 'hello world' program on big-Endian PPC64/Linux (ELF v1 ABI). llvm-svn: 250101
2015-10-13 04:56:18 +08:00
.section .R_PPC64_ADDR16_HA,"ax",@progbits
li 1, .Lfoo@ha
[PPC64][test] Delete redundant labels from ppc64-relocs.s llvm-svn: 362235
2019-05-31 23:41:19 +08:00
# CHECK-LABEL: Disassembly of section .R_PPC64_ADDR16_HA:
[ELF][PPC] Fix getRelExpr for R_PPC64_REL16_HI Fixes https://github.com/ClangBuiltLinux/linux/issues/640 R_PPC64_REL16_HI was incorrectly computed as an R_ABS relocation. rLLD368964 made it a linker failure. Change it to use R_PC to fix the failures. Add ppc64-reloc-rel.s for these R_PPC64_REL* tests. llvm-svn: 369184
2019-08-17 14:28:03 +08:00
# CHECK: li 1, 4097
[ELF2] Add a base set of PPC64 relocations This is mostly an adaptation of the code in LLVM's lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp, and handles a sufficient number of relocations to link a 'hello world' program on big-Endian PPC64/Linux (ELF v1 ABI). llvm-svn: 250101
2015-10-13 04:56:18 +08:00
.section .R_PPC64_ADDR16_HIGHER,"ax",@progbits
li 1, .Lfoo@higher
[PPC64][test] Delete redundant labels from ppc64-relocs.s llvm-svn: 362235
2019-05-31 23:41:19 +08:00
# CHECK-LABEL: Disassembly of section .R_PPC64_ADDR16_HIGHER:
[ELF][PPC] Fix getRelExpr for R_PPC64_REL16_HI Fixes https://github.com/ClangBuiltLinux/linux/issues/640 R_PPC64_REL16_HI was incorrectly computed as an R_ABS relocation. rLLD368964 made it a linker failure. Change it to use R_PC to fix the failures. Add ppc64-reloc-rel.s for these R_PPC64_REL* tests. llvm-svn: 369184
2019-08-17 14:28:03 +08:00
# CHECK: li 1, 0
[ELF2] Add a base set of PPC64 relocations This is mostly an adaptation of the code in LLVM's lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp, and handles a sufficient number of relocations to link a 'hello world' program on big-Endian PPC64/Linux (ELF v1 ABI). llvm-svn: 250101
2015-10-13 04:56:18 +08:00
.section .R_PPC64_ADDR16_HIGHERA,"ax",@progbits
li 1, .Lfoo@highera
[PPC64][test] Delete redundant labels from ppc64-relocs.s llvm-svn: 362235
2019-05-31 23:41:19 +08:00
# CHECK-LABEL: Disassembly of section .R_PPC64_ADDR16_HIGHERA:
[ELF][PPC] Fix getRelExpr for R_PPC64_REL16_HI Fixes https://github.com/ClangBuiltLinux/linux/issues/640 R_PPC64_REL16_HI was incorrectly computed as an R_ABS relocation. rLLD368964 made it a linker failure. Change it to use R_PC to fix the failures. Add ppc64-reloc-rel.s for these R_PPC64_REL* tests. llvm-svn: 369184
2019-08-17 14:28:03 +08:00
# CHECK: li 1, 0
[ELF2] Add a base set of PPC64 relocations This is mostly an adaptation of the code in LLVM's lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp, and handles a sufficient number of relocations to link a 'hello world' program on big-Endian PPC64/Linux (ELF v1 ABI). llvm-svn: 250101
2015-10-13 04:56:18 +08:00
.section .R_PPC64_ADDR16_HIGHEST,"ax",@progbits
li 1, .Lfoo@highest
[PPC64][test] Delete redundant labels from ppc64-relocs.s llvm-svn: 362235
2019-05-31 23:41:19 +08:00
# CHECK-LABEL: Disassembly of section .R_PPC64_ADDR16_HIGHEST:
[ELF][PPC] Fix getRelExpr for R_PPC64_REL16_HI Fixes https://github.com/ClangBuiltLinux/linux/issues/640 R_PPC64_REL16_HI was incorrectly computed as an R_ABS relocation. rLLD368964 made it a linker failure. Change it to use R_PC to fix the failures. Add ppc64-reloc-rel.s for these R_PPC64_REL* tests. llvm-svn: 369184
2019-08-17 14:28:03 +08:00
# CHECK: li 1, 0
[ELF2] Add a base set of PPC64 relocations This is mostly an adaptation of the code in LLVM's lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp, and handles a sufficient number of relocations to link a 'hello world' program on big-Endian PPC64/Linux (ELF v1 ABI). llvm-svn: 250101
2015-10-13 04:56:18 +08:00
.section .R_PPC64_ADDR16_HIGHESTA,"ax",@progbits
li 1, .Lfoo@highesta
[PPC64][test] Delete redundant labels from ppc64-relocs.s llvm-svn: 362235
2019-05-31 23:41:19 +08:00
# CHECK-LABEL: Disassembly of section .R_PPC64_ADDR16_HIGHESTA:
[ELF][PPC] Fix getRelExpr for R_PPC64_REL16_HI Fixes https://github.com/ClangBuiltLinux/linux/issues/640 R_PPC64_REL16_HI was incorrectly computed as an R_ABS relocation. rLLD368964 made it a linker failure. Change it to use R_PC to fix the failures. Add ppc64-reloc-rel.s for these R_PPC64_REL* tests. llvm-svn: 369184
2019-08-17 14:28:03 +08:00
# CHECK: li 1, 0
[ELF][PPC64] Fix getRelExpr for R_PPC64_REL64 The relocation R_PPC64_REL64 should return R_PC for getRelExpr since it computes S + A - P. Differential Revision: https://reviews.llvm.org/D46766 llvm-svn: 332259
2018-05-15 00:39:45 +08:00
[ELF][PPC64] Rename some PPC64 ELFv2 specific RelExpr from R_PPC_* to R_PPC64_* The following abstract relocation types (RelExpr) are PPC64 ELFv2 ABI specific, not used by PPC32. So rename them to prevent confusion when the PPC32 port is improved. * R_PPC_CALL R_PPC_CALL_PLT: R_PPC_CALL_PLT represents R_PPC64_REL14 and R_PPC64_REL24. If the function is not preemptable, R_PPC_CALL_PLT can be optimized to R_PPC_CALL: the formula adjusts the symbol VA from the global entry point to the local entry point. * R_PPC_TOC: represents R_PPC64_TOC. We don't have a test. Add one to ppc64-relocs.s Rename it to R_PPC64_TOCBASE because `@tocbase` is the assembly form. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D62800 llvm-svn: 362359
2019-06-03 14:21:33 +08:00
.section .R_PPC64_TOC,"a",@progbits
.quad .TOC.@tocbase
# SEC: .got PROGBITS 0000000010020000
## tocbase = .got+0x8000 = 0x10028000
# DATALE-LABEL: section '.R_PPC64_TOC':
# DATALE: 00800210 00000000
# DATABE-LABEL: section '.R_PPC64_TOC':
# DATABE: 00000000 10028000