2017-07-27 18:36:09 +08:00
|
|
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
|
|
|
|
; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s -check-prefix=X64
|
|
|
|
|
; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s -check-prefix=X86
|
|
|
|
|
|
|
|
|
|
define i32 @foo(i32 %a, i32 %b) local_unnamed_addr #0 {
|
|
|
|
|
; X64-LABEL: foo:
|
|
|
|
|
; X64: # BB#0: # %entry
|
|
|
|
|
; X64-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
|
|
|
|
|
; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
|
|
|
|
|
; X64-NEXT: leal 4(%rdi,%rsi,2), %ecx
|
Revert r313343 "[X86] PR32755 : Improvement in CodeGen instruction selection for LEAs."
This caused PR34629: asserts firing when building Chromium. It also broke some
buildbots building test-suite as reported on the commit thread.
> Summary:
> 1/ Operand folding during complex pattern matching for LEAs has been
> extended, such that it promotes Scale to accommodate similar operand
> appearing in the DAG.
> e.g.
> T1 = A + B
> T2 = T1 + 10
> T3 = T2 + A
> For above DAG rooted at T3, X86AddressMode will no look like
> Base = B , Index = A , Scale = 2 , Disp = 10
>
> 2/ During OptimizeLEAPass down the pipeline factorization is now performed over LEAs
> so that if there is an opportunity then complex LEAs (having 3 operands)
> could be factored out.
> e.g.
> leal 1(%rax,%rcx,1), %rdx
> leal 1(%rax,%rcx,2), %rcx
> will be factored as following
> leal 1(%rax,%rcx,1), %rdx
> leal (%rdx,%rcx) , %edx
>
> 3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops,
> thus avoiding creation of any complex LEAs within a loop.
>
> Reviewers: lsaba, RKSimon, craig.topper, qcolombet
>
> Reviewed By: lsaba
>
> Subscribers: spatel, igorb, llvm-commits
>
> Differential Revision: https://reviews.llvm.org/D35014
llvm-svn: 313376
2017-09-16 02:40:26 +08:00
|
|
|
; X64-NEXT: leal 4(%rdi,%rsi,4), %eax
|
2017-07-27 18:36:09 +08:00
|
|
|
; X64-NEXT: imull %ecx, %eax
|
|
|
|
|
; X64-NEXT: retq
|
|
|
|
|
;
|
|
|
|
|
; X86-LABEL: foo:
|
|
|
|
|
; X86: # BB#0: # %entry
|
|
|
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
Revert r313343 "[X86] PR32755 : Improvement in CodeGen instruction selection for LEAs."
This caused PR34629: asserts firing when building Chromium. It also broke some
buildbots building test-suite as reported on the commit thread.
> Summary:
> 1/ Operand folding during complex pattern matching for LEAs has been
> extended, such that it promotes Scale to accommodate similar operand
> appearing in the DAG.
> e.g.
> T1 = A + B
> T2 = T1 + 10
> T3 = T2 + A
> For above DAG rooted at T3, X86AddressMode will no look like
> Base = B , Index = A , Scale = 2 , Disp = 10
>
> 2/ During OptimizeLEAPass down the pipeline factorization is now performed over LEAs
> so that if there is an opportunity then complex LEAs (having 3 operands)
> could be factored out.
> e.g.
> leal 1(%rax,%rcx,1), %rdx
> leal 1(%rax,%rcx,2), %rcx
> will be factored as following
> leal 1(%rax,%rcx,1), %rdx
> leal (%rdx,%rcx) , %edx
>
> 3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops,
> thus avoiding creation of any complex LEAs within a loop.
>
> Reviewers: lsaba, RKSimon, craig.topper, qcolombet
>
> Reviewed By: lsaba
>
> Subscribers: spatel, igorb, llvm-commits
>
> Differential Revision: https://reviews.llvm.org/D35014
llvm-svn: 313376
2017-09-16 02:40:26 +08:00
|
|
|
; X86-NEXT: leal 4(%ecx,%eax,2), %edx
|
|
|
|
|
; X86-NEXT: leal 4(%ecx,%eax,4), %eax
|
|
|
|
|
; X86-NEXT: imull %edx, %eax
|
2017-07-27 18:36:09 +08:00
|
|
|
; X86-NEXT: retl
|
|
|
|
|
entry:
|
|
|
|
|
%mul = shl i32 %b, 1
|
|
|
|
|
%add = add i32 %a, 4
|
|
|
|
|
%add1 = add i32 %add, %mul
|
|
|
|
|
%mul2 = shl i32 %b, 2
|
|
|
|
|
%add4 = add i32 %add, %mul2
|
|
|
|
|
%mul5 = mul nsw i32 %add1, %add4
|
|
|
|
|
ret i32 %mul5
|
|
|
|
|
}
|
|
|
|
|
|
2017-07-31 22:23:28 +08:00
|
|
|
define i32 @foo1(i32 %a, i32 %b) local_unnamed_addr #0 {
|
|
|
|
|
; X64-LABEL: foo1:
|
|
|
|
|
; X64: # BB#0: # %entry
|
|
|
|
|
; X64-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
|
|
|
|
|
; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
|
|
|
|
|
; X64-NEXT: leal 4(%rdi,%rsi,4), %ecx
|
Revert r313343 "[X86] PR32755 : Improvement in CodeGen instruction selection for LEAs."
This caused PR34629: asserts firing when building Chromium. It also broke some
buildbots building test-suite as reported on the commit thread.
> Summary:
> 1/ Operand folding during complex pattern matching for LEAs has been
> extended, such that it promotes Scale to accommodate similar operand
> appearing in the DAG.
> e.g.
> T1 = A + B
> T2 = T1 + 10
> T3 = T2 + A
> For above DAG rooted at T3, X86AddressMode will no look like
> Base = B , Index = A , Scale = 2 , Disp = 10
>
> 2/ During OptimizeLEAPass down the pipeline factorization is now performed over LEAs
> so that if there is an opportunity then complex LEAs (having 3 operands)
> could be factored out.
> e.g.
> leal 1(%rax,%rcx,1), %rdx
> leal 1(%rax,%rcx,2), %rcx
> will be factored as following
> leal 1(%rax,%rcx,1), %rdx
> leal (%rdx,%rcx) , %edx
>
> 3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops,
> thus avoiding creation of any complex LEAs within a loop.
>
> Reviewers: lsaba, RKSimon, craig.topper, qcolombet
>
> Reviewed By: lsaba
>
> Subscribers: spatel, igorb, llvm-commits
>
> Differential Revision: https://reviews.llvm.org/D35014
llvm-svn: 313376
2017-09-16 02:40:26 +08:00
|
|
|
; X64-NEXT: leal 4(%rdi,%rsi,8), %eax
|
2017-07-31 22:23:28 +08:00
|
|
|
; X64-NEXT: imull %ecx, %eax
|
|
|
|
|
; X64-NEXT: retq
|
|
|
|
|
;
|
|
|
|
|
; X86-LABEL: foo1:
|
|
|
|
|
; X86: # BB#0: # %entry
|
|
|
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
|
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
Revert r313343 "[X86] PR32755 : Improvement in CodeGen instruction selection for LEAs."
This caused PR34629: asserts firing when building Chromium. It also broke some
buildbots building test-suite as reported on the commit thread.
> Summary:
> 1/ Operand folding during complex pattern matching for LEAs has been
> extended, such that it promotes Scale to accommodate similar operand
> appearing in the DAG.
> e.g.
> T1 = A + B
> T2 = T1 + 10
> T3 = T2 + A
> For above DAG rooted at T3, X86AddressMode will no look like
> Base = B , Index = A , Scale = 2 , Disp = 10
>
> 2/ During OptimizeLEAPass down the pipeline factorization is now performed over LEAs
> so that if there is an opportunity then complex LEAs (having 3 operands)
> could be factored out.
> e.g.
> leal 1(%rax,%rcx,1), %rdx
> leal 1(%rax,%rcx,2), %rcx
> will be factored as following
> leal 1(%rax,%rcx,1), %rdx
> leal (%rdx,%rcx) , %edx
>
> 3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops,
> thus avoiding creation of any complex LEAs within a loop.
>
> Reviewers: lsaba, RKSimon, craig.topper, qcolombet
>
> Reviewed By: lsaba
>
> Subscribers: spatel, igorb, llvm-commits
>
> Differential Revision: https://reviews.llvm.org/D35014
llvm-svn: 313376
2017-09-16 02:40:26 +08:00
|
|
|
; X86-NEXT: leal 4(%ecx,%eax,4), %edx
|
|
|
|
|
; X86-NEXT: leal 4(%ecx,%eax,8), %eax
|
|
|
|
|
; X86-NEXT: imull %edx, %eax
|
2017-07-31 22:23:28 +08:00
|
|
|
; X86-NEXT: retl
|
|
|
|
|
entry:
|
|
|
|
|
%mul = shl i32 %b, 2
|
|
|
|
|
%add = add i32 %a, 4
|
|
|
|
|
%add1 = add i32 %add, %mul
|
|
|
|
|
%mul2 = shl i32 %b, 3
|
|
|
|
|
%add4 = add i32 %add, %mul2
|
|
|
|
|
%mul5 = mul nsw i32 %add1, %add4
|
|
|
|
|
ret i32 %mul5
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
define i32 @foo1_mult_basic_blocks(i32 %a, i32 %b) local_unnamed_addr #0 {
|
|
|
|
|
; X64-LABEL: foo1_mult_basic_blocks:
|
|
|
|
|
; X64: # BB#0: # %entry
|
|
|
|
|
; X64-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
|
|
|
|
|
; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
|
|
|
|
|
; X64-NEXT: leal 4(%rdi,%rsi,4), %ecx
|
|
|
|
|
; X64-NEXT: xorl %eax, %eax
|
|
|
|
|
; X64-NEXT: cmpl $10, %ecx
|
|
|
|
|
; X64-NEXT: je .LBB2_2
|
|
|
|
|
; X64-NEXT: # BB#1: # %mid
|
Revert r313343 "[X86] PR32755 : Improvement in CodeGen instruction selection for LEAs."
This caused PR34629: asserts firing when building Chromium. It also broke some
buildbots building test-suite as reported on the commit thread.
> Summary:
> 1/ Operand folding during complex pattern matching for LEAs has been
> extended, such that it promotes Scale to accommodate similar operand
> appearing in the DAG.
> e.g.
> T1 = A + B
> T2 = T1 + 10
> T3 = T2 + A
> For above DAG rooted at T3, X86AddressMode will no look like
> Base = B , Index = A , Scale = 2 , Disp = 10
>
> 2/ During OptimizeLEAPass down the pipeline factorization is now performed over LEAs
> so that if there is an opportunity then complex LEAs (having 3 operands)
> could be factored out.
> e.g.
> leal 1(%rax,%rcx,1), %rdx
> leal 1(%rax,%rcx,2), %rcx
> will be factored as following
> leal 1(%rax,%rcx,1), %rdx
> leal (%rdx,%rcx) , %edx
>
> 3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops,
> thus avoiding creation of any complex LEAs within a loop.
>
> Reviewers: lsaba, RKSimon, craig.topper, qcolombet
>
> Reviewed By: lsaba
>
> Subscribers: spatel, igorb, llvm-commits
>
> Differential Revision: https://reviews.llvm.org/D35014
llvm-svn: 313376
2017-09-16 02:40:26 +08:00
|
|
|
; X64-NEXT: leal 4(%rdi,%rsi,8), %eax
|
|
|
|
|
; X64-NEXT: imull %eax, %ecx
|
|
|
|
|
; X64-NEXT: movl %ecx, %eax
|
2017-07-31 22:23:28 +08:00
|
|
|
; X64-NEXT: .LBB2_2: # %exit
|
|
|
|
|
; X64-NEXT: retq
|
|
|
|
|
;
|
|
|
|
|
; X86-LABEL: foo1_mult_basic_blocks:
|
|
|
|
|
; X86: # BB#0: # %entry
|
Revert r313343 "[X86] PR32755 : Improvement in CodeGen instruction selection for LEAs."
This caused PR34629: asserts firing when building Chromium. It also broke some
buildbots building test-suite as reported on the commit thread.
> Summary:
> 1/ Operand folding during complex pattern matching for LEAs has been
> extended, such that it promotes Scale to accommodate similar operand
> appearing in the DAG.
> e.g.
> T1 = A + B
> T2 = T1 + 10
> T3 = T2 + A
> For above DAG rooted at T3, X86AddressMode will no look like
> Base = B , Index = A , Scale = 2 , Disp = 10
>
> 2/ During OptimizeLEAPass down the pipeline factorization is now performed over LEAs
> so that if there is an opportunity then complex LEAs (having 3 operands)
> could be factored out.
> e.g.
> leal 1(%rax,%rcx,1), %rdx
> leal 1(%rax,%rcx,2), %rcx
> will be factored as following
> leal 1(%rax,%rcx,1), %rdx
> leal (%rdx,%rcx) , %edx
>
> 3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops,
> thus avoiding creation of any complex LEAs within a loop.
>
> Reviewers: lsaba, RKSimon, craig.topper, qcolombet
>
> Reviewed By: lsaba
>
> Subscribers: spatel, igorb, llvm-commits
>
> Differential Revision: https://reviews.llvm.org/D35014
llvm-svn: 313376
2017-09-16 02:40:26 +08:00
|
|
|
; X86-NEXT: pushl %esi
|
|
|
|
|
; X86-NEXT: .Lcfi0:
|
|
|
|
|
; X86-NEXT: .cfi_def_cfa_offset 8
|
|
|
|
|
; X86-NEXT: .Lcfi1:
|
|
|
|
|
; X86-NEXT: .cfi_offset %esi, -8
|
2017-07-31 22:23:28 +08:00
|
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
|
Revert r313343 "[X86] PR32755 : Improvement in CodeGen instruction selection for LEAs."
This caused PR34629: asserts firing when building Chromium. It also broke some
buildbots building test-suite as reported on the commit thread.
> Summary:
> 1/ Operand folding during complex pattern matching for LEAs has been
> extended, such that it promotes Scale to accommodate similar operand
> appearing in the DAG.
> e.g.
> T1 = A + B
> T2 = T1 + 10
> T3 = T2 + A
> For above DAG rooted at T3, X86AddressMode will no look like
> Base = B , Index = A , Scale = 2 , Disp = 10
>
> 2/ During OptimizeLEAPass down the pipeline factorization is now performed over LEAs
> so that if there is an opportunity then complex LEAs (having 3 operands)
> could be factored out.
> e.g.
> leal 1(%rax,%rcx,1), %rdx
> leal 1(%rax,%rcx,2), %rcx
> will be factored as following
> leal 1(%rax,%rcx,1), %rdx
> leal (%rdx,%rcx) , %edx
>
> 3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops,
> thus avoiding creation of any complex LEAs within a loop.
>
> Reviewers: lsaba, RKSimon, craig.topper, qcolombet
>
> Reviewed By: lsaba
>
> Subscribers: spatel, igorb, llvm-commits
>
> Differential Revision: https://reviews.llvm.org/D35014
llvm-svn: 313376
2017-09-16 02:40:26 +08:00
|
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
|
|
|
|
|
; X86-NEXT: leal 4(%esi,%edx,4), %ecx
|
2017-07-31 22:23:28 +08:00
|
|
|
; X86-NEXT: xorl %eax, %eax
|
|
|
|
|
; X86-NEXT: cmpl $10, %ecx
|
|
|
|
|
; X86-NEXT: je .LBB2_2
|
|
|
|
|
; X86-NEXT: # BB#1: # %mid
|
Revert r313343 "[X86] PR32755 : Improvement in CodeGen instruction selection for LEAs."
This caused PR34629: asserts firing when building Chromium. It also broke some
buildbots building test-suite as reported on the commit thread.
> Summary:
> 1/ Operand folding during complex pattern matching for LEAs has been
> extended, such that it promotes Scale to accommodate similar operand
> appearing in the DAG.
> e.g.
> T1 = A + B
> T2 = T1 + 10
> T3 = T2 + A
> For above DAG rooted at T3, X86AddressMode will no look like
> Base = B , Index = A , Scale = 2 , Disp = 10
>
> 2/ During OptimizeLEAPass down the pipeline factorization is now performed over LEAs
> so that if there is an opportunity then complex LEAs (having 3 operands)
> could be factored out.
> e.g.
> leal 1(%rax,%rcx,1), %rdx
> leal 1(%rax,%rcx,2), %rcx
> will be factored as following
> leal 1(%rax,%rcx,1), %rdx
> leal (%rdx,%rcx) , %edx
>
> 3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops,
> thus avoiding creation of any complex LEAs within a loop.
>
> Reviewers: lsaba, RKSimon, craig.topper, qcolombet
>
> Reviewed By: lsaba
>
> Subscribers: spatel, igorb, llvm-commits
>
> Differential Revision: https://reviews.llvm.org/D35014
llvm-svn: 313376
2017-09-16 02:40:26 +08:00
|
|
|
; X86-NEXT: leal 4(%esi,%edx,8), %eax
|
|
|
|
|
; X86-NEXT: imull %eax, %ecx
|
|
|
|
|
; X86-NEXT: movl %ecx, %eax
|
2017-07-31 22:23:28 +08:00
|
|
|
; X86-NEXT: .LBB2_2: # %exit
|
Revert r313343 "[X86] PR32755 : Improvement in CodeGen instruction selection for LEAs."
This caused PR34629: asserts firing when building Chromium. It also broke some
buildbots building test-suite as reported on the commit thread.
> Summary:
> 1/ Operand folding during complex pattern matching for LEAs has been
> extended, such that it promotes Scale to accommodate similar operand
> appearing in the DAG.
> e.g.
> T1 = A + B
> T2 = T1 + 10
> T3 = T2 + A
> For above DAG rooted at T3, X86AddressMode will no look like
> Base = B , Index = A , Scale = 2 , Disp = 10
>
> 2/ During OptimizeLEAPass down the pipeline factorization is now performed over LEAs
> so that if there is an opportunity then complex LEAs (having 3 operands)
> could be factored out.
> e.g.
> leal 1(%rax,%rcx,1), %rdx
> leal 1(%rax,%rcx,2), %rcx
> will be factored as following
> leal 1(%rax,%rcx,1), %rdx
> leal (%rdx,%rcx) , %edx
>
> 3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops,
> thus avoiding creation of any complex LEAs within a loop.
>
> Reviewers: lsaba, RKSimon, craig.topper, qcolombet
>
> Reviewed By: lsaba
>
> Subscribers: spatel, igorb, llvm-commits
>
> Differential Revision: https://reviews.llvm.org/D35014
llvm-svn: 313376
2017-09-16 02:40:26 +08:00
|
|
|
; X86-NEXT: popl %esi
|
2017-07-31 22:23:28 +08:00
|
|
|
; X86-NEXT: retl
|
|
|
|
|
entry:
|
|
|
|
|
%mul = shl i32 %b, 2
|
|
|
|
|
%add = add i32 %a, 4
|
|
|
|
|
%add1 = add i32 %add, %mul
|
|
|
|
|
%cmp = icmp ne i32 %add1 , 10
|
|
|
|
|
br i1 %cmp , label %mid , label %exit
|
|
|
|
|
mid:
|
|
|
|
|
%addn = add i32 %a , 4
|
|
|
|
|
%mul2 = shl i32 %b, 3
|
|
|
|
|
%add4 = add i32 %addn, %mul2
|
|
|
|
|
%mul5 = mul nsw i32 %add1, %add4
|
|
|
|
|
br label %exit
|
|
|
|
|
|
|
|
|
|
exit:
|
|
|
|
|
%retmul = phi i32 [%mul5 , %mid] , [0 , %entry]
|
|
|
|
|
ret i32 %retmul
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
define i32 @foo1_mult_basic_blocks_illegal_scale(i32 %a, i32 %b) local_unnamed_addr #0 {
|
|
|
|
|
; X64-LABEL: foo1_mult_basic_blocks_illegal_scale:
|
|
|
|
|
; X64: # BB#0: # %entry
|
|
|
|
|
; X64-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
|
|
|
|
|
; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
|
|
|
|
|
; X64-NEXT: leal 4(%rdi,%rsi,2), %ecx
|
|
|
|
|
; X64-NEXT: xorl %eax, %eax
|
|
|
|
|
; X64-NEXT: cmpl $10, %ecx
|
|
|
|
|
; X64-NEXT: je .LBB3_2
|
|
|
|
|
; X64-NEXT: # BB#1: # %mid
|
|
|
|
|
; X64-NEXT: leal 4(%rdi,%rsi,8), %eax
|
|
|
|
|
; X64-NEXT: imull %eax, %ecx
|
|
|
|
|
; X64-NEXT: movl %ecx, %eax
|
|
|
|
|
; X64-NEXT: .LBB3_2: # %exit
|
|
|
|
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; X64-NEXT: retq
|
|
|
|
|
;
|
|
|
|
|
; X86-LABEL: foo1_mult_basic_blocks_illegal_scale:
|
|
|
|
|
; X86: # BB#0: # %entry
|
|
|
|
|
; X86-NEXT: pushl %esi
|
Revert r313343 "[X86] PR32755 : Improvement in CodeGen instruction selection for LEAs."
This caused PR34629: asserts firing when building Chromium. It also broke some
buildbots building test-suite as reported on the commit thread.
> Summary:
> 1/ Operand folding during complex pattern matching for LEAs has been
> extended, such that it promotes Scale to accommodate similar operand
> appearing in the DAG.
> e.g.
> T1 = A + B
> T2 = T1 + 10
> T3 = T2 + A
> For above DAG rooted at T3, X86AddressMode will no look like
> Base = B , Index = A , Scale = 2 , Disp = 10
>
> 2/ During OptimizeLEAPass down the pipeline factorization is now performed over LEAs
> so that if there is an opportunity then complex LEAs (having 3 operands)
> could be factored out.
> e.g.
> leal 1(%rax,%rcx,1), %rdx
> leal 1(%rax,%rcx,2), %rcx
> will be factored as following
> leal 1(%rax,%rcx,1), %rdx
> leal (%rdx,%rcx) , %edx
>
> 3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops,
> thus avoiding creation of any complex LEAs within a loop.
>
> Reviewers: lsaba, RKSimon, craig.topper, qcolombet
>
> Reviewed By: lsaba
>
> Subscribers: spatel, igorb, llvm-commits
>
> Differential Revision: https://reviews.llvm.org/D35014
llvm-svn: 313376
2017-09-16 02:40:26 +08:00
|
|
|
; X86-NEXT: .Lcfi2:
|
2017-07-31 22:23:28 +08:00
|
|
|
; X86-NEXT: .cfi_def_cfa_offset 8
|
Revert r313343 "[X86] PR32755 : Improvement in CodeGen instruction selection for LEAs."
This caused PR34629: asserts firing when building Chromium. It also broke some
buildbots building test-suite as reported on the commit thread.
> Summary:
> 1/ Operand folding during complex pattern matching for LEAs has been
> extended, such that it promotes Scale to accommodate similar operand
> appearing in the DAG.
> e.g.
> T1 = A + B
> T2 = T1 + 10
> T3 = T2 + A
> For above DAG rooted at T3, X86AddressMode will no look like
> Base = B , Index = A , Scale = 2 , Disp = 10
>
> 2/ During OptimizeLEAPass down the pipeline factorization is now performed over LEAs
> so that if there is an opportunity then complex LEAs (having 3 operands)
> could be factored out.
> e.g.
> leal 1(%rax,%rcx,1), %rdx
> leal 1(%rax,%rcx,2), %rcx
> will be factored as following
> leal 1(%rax,%rcx,1), %rdx
> leal (%rdx,%rcx) , %edx
>
> 3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops,
> thus avoiding creation of any complex LEAs within a loop.
>
> Reviewers: lsaba, RKSimon, craig.topper, qcolombet
>
> Reviewed By: lsaba
>
> Subscribers: spatel, igorb, llvm-commits
>
> Differential Revision: https://reviews.llvm.org/D35014
llvm-svn: 313376
2017-09-16 02:40:26 +08:00
|
|
|
; X86-NEXT: .Lcfi3:
|
2017-07-31 22:23:28 +08:00
|
|
|
; X86-NEXT: .cfi_offset %esi, -8
|
|
|
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
|
|
|
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
|
|
|
|
|
; X86-NEXT: leal 4(%esi,%edx,2), %ecx
|
|
|
|
|
; X86-NEXT: xorl %eax, %eax
|
|
|
|
|
; X86-NEXT: cmpl $10, %ecx
|
|
|
|
|
; X86-NEXT: je .LBB3_2
|
|
|
|
|
; X86-NEXT: # BB#1: # %mid
|
|
|
|
|
; X86-NEXT: leal 4(%esi,%edx,8), %eax
|
|
|
|
|
; X86-NEXT: imull %eax, %ecx
|
|
|
|
|
; X86-NEXT: movl %ecx, %eax
|
|
|
|
|
; X86-NEXT: .LBB3_2: # %exit
|
|
|
|
|
; X86-NEXT: popl %esi
|
|
|
|
|
; X86-NEXT: retl
|
|
|
|
|
entry:
|
|
|
|
|
%mul = shl i32 %b, 1
|
|
|
|
|
%add = add i32 %a, 4
|
|
|
|
|
%add1 = add i32 %add, %mul
|
|
|
|
|
%cmp = icmp ne i32 %add1 , 10
|
|
|
|
|
br i1 %cmp, label %mid , label %exit
|
|
|
|
|
mid:
|
|
|
|
|
%addn = add i32 %a , 4
|
|
|
|
|
%mul2 = shl i32 %b, 3
|
|
|
|
|
%add4 = add i32 %addn, %mul2
|
|
|
|
|
%mul5 = mul nsw i32 %add1, %add4
|
|
|
|
|
br label %exit
|
|
|
|
|
exit:
|
|
|
|
|
%retmul = phi i32 [%mul5 , %mid] , [0 , %entry]
|
|
|
|
|
ret i32 %retmul
|
|
|
|
|
}
|