forked from OSchip/llvm-project
366 lines
10 KiB
LLVM
366 lines
10 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw < %s | FileCheck %s
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define void @test_fcmp_storefloat(i1 %cond, float* %fptr, float %f1, float %f2, float %f3, float %f4, float %f5, float %f6) {
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; CHECK-LABEL: test_fcmp_storefloat:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: testb $1, %dil
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; CHECK-NEXT: je .LBB0_2
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; CHECK-NEXT: # BB#1: # %if
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; CHECK-NEXT: vcmpeqss %xmm3, %xmm2, %k0
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; CHECK-NEXT: jmp .LBB0_3
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; CHECK-NEXT: .LBB0_2: # %else
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; CHECK-NEXT: vcmpeqss %xmm5, %xmm4, %k0
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; CHECK-NEXT: .LBB0_3: # %exit
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; CHECK-NEXT: kmovd %k0, %eax
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; CHECK-NEXT: kmovd %eax, %k1
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; CHECK-NEXT: vmovss %xmm0, %xmm0, %xmm1 {%k1}
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; CHECK-NEXT: vmovss %xmm1, (%rsi)
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; CHECK-NEXT: retq
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entry:
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br i1 %cond, label %if, label %else
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if:
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%cmp1 = fcmp oeq float %f3, %f4
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br label %exit
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else:
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%cmp2 = fcmp oeq float %f5, %f6
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br label %exit
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exit:
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%val = phi i1 [%cmp1, %if], [%cmp2, %else]
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%selected = select i1 %val, float %f1, float %f2
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store float %selected, float* %fptr
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ret void
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}
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define void @test_fcmp_storei1(i1 %cond, float* %fptr, i1* %iptr, float %f1, float %f2, float %f3, float %f4) {
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; CHECK-LABEL: test_fcmp_storei1:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: testb $1, %dil
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; CHECK-NEXT: je .LBB1_2
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; CHECK-NEXT: # BB#1: # %if
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; CHECK-NEXT: vcmpeqss %xmm1, %xmm0, %k0
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; CHECK-NEXT: jmp .LBB1_3
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; CHECK-NEXT: .LBB1_2: # %else
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; CHECK-NEXT: vcmpeqss %xmm3, %xmm2, %k0
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; CHECK-NEXT: .LBB1_3: # %exit
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; CHECK-NEXT: kmovd %k0, %eax
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; CHECK-NEXT: andb $1, %al
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; CHECK-NEXT: movb %al, (%rdx)
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; CHECK-NEXT: retq
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entry:
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br i1 %cond, label %if, label %else
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if:
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%cmp1 = fcmp oeq float %f1, %f2
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br label %exit
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else:
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%cmp2 = fcmp oeq float %f3, %f4
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br label %exit
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exit:
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%val = phi i1 [%cmp1, %if], [%cmp2, %else]
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store i1 %val, i1* %iptr
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ret void
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}
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define void @test_load_add(i1 %cond, float* %fptr, i1* %iptr1, i1* %iptr2, float %f1, float %f2) {
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; CHECK-LABEL: test_load_add:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: testb $1, %dil
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; CHECK-NEXT: je .LBB2_2
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; CHECK-NEXT: # BB#1: # %if
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; CHECK-NEXT: movb (%rcx), %al
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; CHECK-NEXT: addb (%rdx), %al
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; CHECK-NEXT: jmp .LBB2_3
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; CHECK-NEXT: .LBB2_2: # %else
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; CHECK-NEXT: movb (%rcx), %al
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; CHECK-NEXT: .LBB2_3: # %exit
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; CHECK-NEXT: kmovd %eax, %k1
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; CHECK-NEXT: vmovss %xmm0, %xmm0, %xmm1 {%k1}
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; CHECK-NEXT: vmovss %xmm1, (%rsi)
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; CHECK-NEXT: retq
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entry:
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br i1 %cond, label %if, label %else
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if:
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%loaded1 = load i1, i1* %iptr1
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%loaded2if = load i1, i1* %iptr2
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%added = add i1 %loaded1, %loaded2if
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br label %exit
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else:
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%loaded2else = load i1, i1* %iptr2
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br label %exit
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exit:
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%val = phi i1 [%added, %if], [%loaded2else, %else]
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%selected = select i1 %val, float %f1, float %f2
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store float %selected, float* %fptr
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ret void
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}
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define void @test_load_i1(i1 %cond, float* %fptr, i1* %iptr1, i1* %iptr2, float %f1, float %f2) {
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; CHECK-LABEL: test_load_i1:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: testb $1, %dil
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; CHECK-NEXT: je .LBB3_2
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; CHECK-NEXT: # BB#1: # %if
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; CHECK-NEXT: movb (%rdx), %al
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; CHECK-NEXT: jmp .LBB3_3
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; CHECK-NEXT: .LBB3_2: # %else
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; CHECK-NEXT: movb (%rcx), %al
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; CHECK-NEXT: .LBB3_3: # %exit
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; CHECK-NEXT: kmovd %eax, %k1
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; CHECK-NEXT: vmovss %xmm0, %xmm0, %xmm1 {%k1}
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; CHECK-NEXT: vmovss %xmm1, (%rsi)
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; CHECK-NEXT: retq
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entry:
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br i1 %cond, label %if, label %else
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if:
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%loaded1 = load i1, i1* %iptr1
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br label %exit
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else:
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%loaded2 = load i1, i1* %iptr2
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br label %exit
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exit:
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%val = phi i1 [%loaded1, %if], [%loaded2, %else]
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%selected = select i1 %val, float %f1, float %f2
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store float %selected, float* %fptr
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ret void
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}
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define void @test_loadi1_storei1(i1 %cond, i1* %iptr1, i1* %iptr2, i1* %iptr3) {
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; CHECK-LABEL: test_loadi1_storei1:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: testb $1, %dil
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; CHECK-NEXT: je .LBB4_2
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; CHECK-NEXT: # BB#1: # %if
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; CHECK-NEXT: movb (%rsi), %al
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; CHECK-NEXT: jmp .LBB4_3
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; CHECK-NEXT: .LBB4_2: # %else
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; CHECK-NEXT: movb (%rdx), %al
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; CHECK-NEXT: .LBB4_3: # %exit
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; CHECK-NEXT: andb $1, %al
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; CHECK-NEXT: movb %al, (%rcx)
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; CHECK-NEXT: retq
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entry:
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br i1 %cond, label %if, label %else
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if:
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%loaded1 = load i1, i1* %iptr1
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br label %exit
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else:
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%loaded2 = load i1, i1* %iptr2
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br label %exit
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exit:
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%val = phi i1 [%loaded1, %if], [%loaded2, %else]
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store i1 %val, i1* %iptr3
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ret void
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}
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define void @test_shl1(i1 %cond, i8* %ptr1, i8* %ptr2, <8 x float> %fvec1, <8 x float> %fvec2, <8 x float>* %fptrvec) {
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; CHECK-LABEL: test_shl1:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
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; CHECK-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
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; CHECK-NEXT: testb $1, %dil
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; CHECK-NEXT: je .LBB5_2
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; CHECK-NEXT: # BB#1: # %if
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; CHECK-NEXT: movb (%rsi), %al
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; CHECK-NEXT: addb %al, %al
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; CHECK-NEXT: jmp .LBB5_3
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; CHECK-NEXT: .LBB5_2: # %else
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; CHECK-NEXT: movb (%rdx), %al
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; CHECK-NEXT: .LBB5_3: # %exit
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; CHECK-NEXT: kmovd %eax, %k1
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; CHECK-NEXT: vmovaps %zmm0, %zmm1 {%k1}
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; CHECK-NEXT: vmovaps %ymm1, (%rcx)
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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entry:
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br i1 %cond, label %if, label %else
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if:
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%loaded1 = load i8, i8* %ptr1
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%shifted = shl i8 %loaded1, 1
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br label %exit
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else:
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%loaded2 = load i8, i8* %ptr2
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br label %exit
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exit:
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%val = phi i8 [%shifted, %if], [%loaded2, %else]
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%mask = bitcast i8 %val to <8 x i1>
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%selected = select <8 x i1> %mask, <8 x float> %fvec1, <8 x float> %fvec2
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store <8 x float> %selected, <8 x float>* %fptrvec
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ret void
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}
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define void @test_shr1(i1 %cond, i8* %ptr1, i8* %ptr2, <8 x float> %fvec1, <8 x float> %fvec2, <8 x float>* %fptrvec) {
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; CHECK-LABEL: test_shr1:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
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; CHECK-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
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; CHECK-NEXT: testb $1, %dil
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; CHECK-NEXT: je .LBB6_2
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; CHECK-NEXT: # BB#1: # %if
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; CHECK-NEXT: movb (%rsi), %al
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; CHECK-NEXT: shrb %al
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; CHECK-NEXT: jmp .LBB6_3
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; CHECK-NEXT: .LBB6_2: # %else
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; CHECK-NEXT: movb (%rdx), %al
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; CHECK-NEXT: .LBB6_3: # %exit
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; CHECK-NEXT: kmovd %eax, %k1
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; CHECK-NEXT: vmovaps %zmm0, %zmm1 {%k1}
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; CHECK-NEXT: vmovaps %ymm1, (%rcx)
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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entry:
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br i1 %cond, label %if, label %else
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if:
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%loaded1 = load i8, i8* %ptr1
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%shifted = lshr i8 %loaded1, 1
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br label %exit
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else:
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%loaded2 = load i8, i8* %ptr2
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br label %exit
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exit:
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%val = phi i8 [%shifted, %if], [%loaded2, %else]
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%mask = bitcast i8 %val to <8 x i1>
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%selected = select <8 x i1> %mask, <8 x float> %fvec1, <8 x float> %fvec2
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store <8 x float> %selected, <8 x float>* %fptrvec
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ret void
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}
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define void @test_shr2(i1 %cond, i8* %ptr1, i8* %ptr2, <8 x float> %fvec1, <8 x float> %fvec2, <8 x float>* %fptrvec) {
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; CHECK-LABEL: test_shr2:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
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; CHECK-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
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; CHECK-NEXT: testb $1, %dil
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; CHECK-NEXT: je .LBB7_2
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; CHECK-NEXT: # BB#1: # %if
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; CHECK-NEXT: movb (%rsi), %al
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; CHECK-NEXT: shrb $2, %al
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; CHECK-NEXT: jmp .LBB7_3
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; CHECK-NEXT: .LBB7_2: # %else
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; CHECK-NEXT: movb (%rdx), %al
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; CHECK-NEXT: .LBB7_3: # %exit
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; CHECK-NEXT: kmovd %eax, %k1
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; CHECK-NEXT: vmovaps %zmm0, %zmm1 {%k1}
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; CHECK-NEXT: vmovaps %ymm1, (%rcx)
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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entry:
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br i1 %cond, label %if, label %else
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if:
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%loaded1 = load i8, i8* %ptr1
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%shifted = lshr i8 %loaded1, 2
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br label %exit
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else:
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%loaded2 = load i8, i8* %ptr2
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br label %exit
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exit:
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%val = phi i8 [%shifted, %if], [%loaded2, %else]
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%mask = bitcast i8 %val to <8 x i1>
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%selected = select <8 x i1> %mask, <8 x float> %fvec1, <8 x float> %fvec2
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store <8 x float> %selected, <8 x float>* %fptrvec
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ret void
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}
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define void @test_shl(i1 %cond, i8* %ptr1, i8* %ptr2, <8 x float> %fvec1, <8 x float> %fvec2, <8 x float>* %fptrvec) {
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; CHECK-LABEL: test_shl:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
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; CHECK-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
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; CHECK-NEXT: testb $1, %dil
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; CHECK-NEXT: je .LBB8_2
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; CHECK-NEXT: # BB#1: # %if
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; CHECK-NEXT: movb (%rsi), %al
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; CHECK-NEXT: shlb $6, %al
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; CHECK-NEXT: jmp .LBB8_3
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; CHECK-NEXT: .LBB8_2: # %else
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; CHECK-NEXT: movb (%rdx), %al
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; CHECK-NEXT: .LBB8_3: # %exit
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; CHECK-NEXT: kmovd %eax, %k1
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; CHECK-NEXT: vmovaps %zmm0, %zmm1 {%k1}
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; CHECK-NEXT: vmovaps %ymm1, (%rcx)
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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entry:
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br i1 %cond, label %if, label %else
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if:
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%loaded1 = load i8, i8* %ptr1
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%shifted = shl i8 %loaded1, 6
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br label %exit
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else:
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%loaded2 = load i8, i8* %ptr2
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br label %exit
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exit:
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%val = phi i8 [%shifted, %if], [%loaded2, %else]
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%mask = bitcast i8 %val to <8 x i1>
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|
|
%selected = select <8 x i1> %mask, <8 x float> %fvec1, <8 x float> %fvec2
|
||
|
|
store <8 x float> %selected, <8 x float>* %fptrvec
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
define void @test_add(i1 %cond, i8* %ptr1, i8* %ptr2, <8 x float> %fvec1, <8 x float> %fvec2, <8 x float>* %fptrvec) {
|
||
|
|
; CHECK-LABEL: test_add:
|
||
|
|
; CHECK: # BB#0: # %entry
|
||
|
|
; CHECK-NEXT: # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
|
||
|
|
; CHECK-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
|
||
|
|
; CHECK-NEXT: movb (%rsi), %al
|
||
|
|
; CHECK-NEXT: movb (%rdx), %dl
|
||
|
|
; CHECK-NEXT: testb $1, %dil
|
||
|
|
; CHECK-NEXT: je .LBB9_2
|
||
|
|
; CHECK-NEXT: # BB#1: # %if
|
||
|
|
; CHECK-NEXT: andb %dl, %al
|
||
|
|
; CHECK-NEXT: jmp .LBB9_3
|
||
|
|
; CHECK-NEXT: .LBB9_2: # %else
|
||
|
|
; CHECK-NEXT: addb %dl, %al
|
||
|
|
; CHECK-NEXT: .LBB9_3: # %exit
|
||
|
|
; CHECK-NEXT: kmovd %eax, %k1
|
||
|
|
; CHECK-NEXT: vmovaps %zmm0, %zmm1 {%k1}
|
||
|
|
; CHECK-NEXT: vmovaps %ymm1, (%rcx)
|
||
|
|
; CHECK-NEXT: vzeroupper
|
||
|
|
; CHECK-NEXT: retq
|
||
|
|
entry:
|
||
|
|
%loaded1 = load i8, i8* %ptr1
|
||
|
|
%loaded2 = load i8, i8* %ptr2
|
||
|
|
br i1 %cond, label %if, label %else
|
||
|
|
|
||
|
|
if:
|
||
|
|
%and = and i8 %loaded1, %loaded2
|
||
|
|
br label %exit
|
||
|
|
|
||
|
|
else:
|
||
|
|
%add = add i8 %loaded1, %loaded2
|
||
|
|
br label %exit
|
||
|
|
|
||
|
|
exit:
|
||
|
|
%val = phi i8 [%and, %if], [%add, %else]
|
||
|
|
%mask = bitcast i8 %val to <8 x i1>
|
||
|
|
%selected = select <8 x i1> %mask, <8 x float> %fvec1, <8 x float> %fvec2
|
||
|
|
store <8 x float> %selected, <8 x float>* %fptrvec
|
||
|
|
ret void
|
||
|
|
}
|