2018-06-22 00:49:33 +08:00
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//===- mlir-opt.cpp - MLIR Optimizer Driver -------------------------------===//
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//
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2020-01-26 11:58:30 +08:00
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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2019-12-24 01:35:36 +08:00
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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2018-06-22 00:49:33 +08:00
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//
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2019-12-24 01:35:36 +08:00
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//===----------------------------------------------------------------------===//
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2018-06-22 00:49:33 +08:00
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//
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2019-06-24 23:41:52 +08:00
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// Main entry function for mlir-opt for when built as standalone binary.
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2018-06-22 00:49:33 +08:00
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//
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//===----------------------------------------------------------------------===//
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2020-04-12 14:11:51 +08:00
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#include "mlir/IR/AsmState.h"
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2020-02-19 06:56:45 +08:00
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#include "mlir/IR/Dialect.h"
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#include "mlir/IR/MLIRContext.h"
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2020-04-12 14:11:51 +08:00
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#include "mlir/InitAllDialects.h"
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#include "mlir/InitAllPasses.h"
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2019-02-28 06:45:36 +08:00
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#include "mlir/Pass/Pass.h"
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2019-02-28 02:59:29 +08:00
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#include "mlir/Pass/PassManager.h"
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2019-01-11 23:22:57 +08:00
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#include "mlir/Support/FileUtilities.h"
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2019-06-24 23:41:52 +08:00
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#include "mlir/Support/MlirOptMain.h"
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2018-06-22 00:49:33 +08:00
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/InitLLVM.h"
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2018-07-08 10:12:22 +08:00
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#include "llvm/Support/SourceMgr.h"
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2018-06-22 06:22:42 +08:00
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#include "llvm/Support/ToolOutputFile.h"
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2018-08-31 08:35:15 +08:00
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2018-06-22 06:22:42 +08:00
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using namespace llvm;
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2019-06-24 23:41:52 +08:00
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using namespace mlir;
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2018-06-22 06:22:42 +08:00
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2020-02-12 17:03:40 +08:00
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// Defined in the test directory, no public header.
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2020-11-05 05:18:26 +08:00
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namespace mlir {
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2020-02-12 17:03:40 +08:00
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void registerConvertToTargetEnvPass();
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void registerPassManagerTestPass();
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2020-02-25 02:35:33 +08:00
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void registerPrintOpAvailabilityPass();
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2020-11-30 03:15:30 +08:00
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void registerShapeFunctionTestPasses();
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[mlir][SideEffects] Define a set of interfaces and traits for defining side effects
This revision introduces the infrastructure for defining side-effects and attaching them to operations. This infrastructure allows for defining different types of side effects, that don't interact with each other, but use the same internal mechanisms. At the base of this is an interface that allows operations to specify the different effect instances that are exhibited by a specific operation instance. An effect instance is comprised of the following:
* Effect: The specific effect being applied.
For memory related effects this may be reading from memory, storing to memory, etc.
* Value: A specific value, either operand/result/region argument, the effect pertains to.
* Resource: This is a global entity that represents the domain within which the effect is being applied.
MLIR serves many different abstractions, which cover many different domains. Simple effects are may have very different context, for example writing to an in-memory buffer vs a database. This revision defines uses this infrastructure to define a set of initial MemoryEffects. The are effects that generally correspond to memory of some kind; Allocate, Free, Read, Write.
This set of memory effects will be used in follow revisions to generalize various parts of the compiler, and make others more powerful(e.g. DCE).
This infrastructure was originally proposed here:
https://groups.google.com/a/tensorflow.org/g/mlir/c/v2mNl4vFCUM
Differential Revision: https://reviews.llvm.org/D74439
2020-03-07 05:53:16 +08:00
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void registerSideEffectTestPasses();
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2020-09-11 07:47:29 +08:00
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void registerSliceAnalysisTestPass();
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2020-02-12 17:03:40 +08:00
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void registerSymbolTestPasses();
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2020-02-15 05:41:01 +08:00
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void registerTestAffineDataCopyPass();
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2020-04-10 19:42:49 +08:00
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void registerTestAffineLoopUnswitchingPass();
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2020-07-29 20:58:09 +08:00
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void registerTestAllReduceLoweringPass();
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2020-11-05 05:18:26 +08:00
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void registerTestFunc();
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void registerTestGpuMemoryPromotionPass();
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void registerTestLoopPermutationPass();
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void registerTestMatchers();
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void registerTestPrintDefUsePass();
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void registerTestPrintNestingPass();
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void registerTestReducer();
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void registerTestSpirvEntryPointABIPass();
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2020-12-23 22:32:31 +08:00
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void registerTestSpirvGLSLCanonicalizationPass();
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2020-11-05 05:18:26 +08:00
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void registerTestSpirvModuleCombinerPass();
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void registerTestTraitsPass();
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2020-11-08 10:32:35 +08:00
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void registerTosaTestQuantUtilAPIPass();
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2020-11-05 05:18:26 +08:00
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void registerVectorizerTestPass();
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namespace test {
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void registerConvertCallOpPass();
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void registerInliner();
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void registerMemRefBoundCheck();
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void registerPatternsTestPass();
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void registerSimpleParametricTilingPass();
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void registerTestAffineLoopParametricTilingPass();
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2021-02-10 06:11:00 +08:00
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void registerTestAliasAnalysisPass();
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2020-02-12 17:03:40 +08:00
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void registerTestCallGraphPass();
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void registerTestConstantFold();
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2020-09-08 16:31:52 +08:00
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void registerTestConvVectorization();
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2021-03-11 00:52:58 +08:00
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void registerTestGpuSerializeToCubinPass();
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2021-03-19 15:22:50 +08:00
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void registerTestGpuSerializeToHsacoPass();
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2021-03-11 21:33:44 +08:00
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void registerTestDataLayoutQuery();
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2020-11-06 11:35:15 +08:00
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void registerTestDecomposeCallGraphTypes();
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Separate the Registration from Loading dialects in the Context
This changes the behavior of constructing MLIRContext to no longer load globally
registered dialects on construction. Instead Dialects are only loaded explicitly
on demand:
- the Parser is lazily loading Dialects in the context as it encounters them
during parsing. This is the only purpose for registering dialects and not load
them in the context.
- Passes are expected to declare the dialects they will create entity from
(Operations, Attributes, or Types), and the PassManager is loading Dialects into
the Context when starting a pipeline.
This changes simplifies the configuration of the registration: a compiler only
need to load the dialect for the IR it will emit, and the optimizer is
self-contained and load the required Dialects. For example in the Toy tutorial,
the compiler only needs to load the Toy dialect in the Context, all the others
(linalg, affine, std, LLVM, ...) are automatically loaded depending on the
optimization pipeline enabled.
To adjust to this change, stop using the existing dialect registration: the
global registry will be removed soon.
1) For passes, you need to override the method:
virtual void getDependentDialects(DialectRegistry ®istry) const {}
and registery on the provided registry any dialect that this pass can produce.
Passes defined in TableGen can provide this list in the dependentDialects list
field.
2) For dialects, on construction you can register dependent dialects using the
provided MLIRContext: `context.getOrLoadDialect<DialectName>()`
This is useful if a dialect may canonicalize or have interfaces involving
another dialect.
3) For loading IR, dialect that can be in the input file must be explicitly
registered with the context. `MlirOptMain()` is taking an explicit registry for
this purpose. See how the standalone-opt.cpp example is setup:
mlir::DialectRegistry registry;
registry.insert<mlir::standalone::StandaloneDialect>();
registry.insert<mlir::StandardOpsDialect>();
Only operations from these two dialects can be in the input file. To include all
of the dialects in MLIR Core, you can populate the registry this way:
mlir::registerAllDialects(registry);
4) For `mlir-translate` callback, as well as frontend, Dialects can be loaded in
the context before emitting the IR: context.getOrLoadDialect<ToyDialect>()
Differential Revision: https://reviews.llvm.org/D85622
2020-08-19 04:01:19 +08:00
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void registerTestDialect(DialectRegistry &);
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2020-11-05 05:18:26 +08:00
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void registerTestDominancePass();
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2020-09-22 08:51:27 +08:00
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void registerTestDynamicPipelinePass();
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2020-06-16 01:26:32 +08:00
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void registerTestExpandTanhPass();
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2021-04-02 01:55:50 +08:00
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void registerTestComposeSubView();
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2020-07-29 20:58:09 +08:00
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void registerTestGpuParallelLoopMappingPass();
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2021-03-06 05:47:36 +08:00
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void registerTestIRVisitorsPass();
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2020-07-01 06:42:52 +08:00
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void registerTestInterfaces();
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2020-10-14 17:02:47 +08:00
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void registerTestLinalgCodegenStrategy();
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2021-04-06 06:44:07 +08:00
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void registerTestLinalgElementwiseFusion();
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2021-04-17 04:38:15 +08:00
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void registerTestPushExpandingReshape();
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2020-10-01 05:55:59 +08:00
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void registerTestLinalgFusionTransforms();
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2021-01-29 02:51:01 +08:00
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void registerTestLinalgTensorFusionTransforms();
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2020-10-29 22:02:56 +08:00
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void registerTestLinalgGreedyFusion();
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2020-06-05 06:55:26 +08:00
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void registerTestLinalgHoisting();
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2020-11-24 02:07:34 +08:00
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void registerTestLinalgTileAndFuseSequencePass();
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2020-02-12 17:03:40 +08:00
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void registerTestLinalgTransforms();
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void registerTestLivenessPass();
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void registerTestLoopFusion();
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void registerTestLoopMappingPass();
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[MLIR][LoopOps] Adds the loop unroll transformation for loop::ForOp.
Summary:
Adds the loop unroll transformation for loop::ForOp.
Adds support for promoting the body of single-iteration loop::ForOps into its containing block.
Adds check tests for loop::ForOps with dynamic and static lower/upper bounds and step.
Care was taken to share code (where possible) with the AffineForOp unroll transformation to ease maintenance and potential future transition to a LoopLike construct on which loop transformations for different loop types can implemented.
Reviewers: ftynse, nicolasvasilache
Reviewed By: ftynse
Subscribers: bondhugula, mgorny, zzheng, mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, Joonsoo, grosul1, frgossen, Kayjukh, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D79184
2020-05-06 01:29:09 +08:00
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void registerTestLoopUnrollingPass();
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2021-02-19 08:24:56 +08:00
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void registerTestMathPolynomialApproximationPass();
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2020-02-12 17:03:40 +08:00
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void registerTestMemRefDependenceCheck();
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void registerTestMemRefStrideCalculation();
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2020-11-11 17:38:51 +08:00
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void registerTestNumberOfBlockExecutionsPass();
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void registerTestNumberOfOperationExecutionsPass();
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2020-02-12 17:03:40 +08:00
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void registerTestOpaqueLoc();
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[mlir][PDL] Add support for PDL bytecode and expose PDL support to OwningRewritePatternList
PDL patterns are now supported via a new `PDLPatternModule` class. This class contains a ModuleOp with the pdl::PatternOp operations representing the patterns, as well as a collection of registered C++ functions for native constraints/creations/rewrites/etc. that may be invoked via the pdl patterns. Instances of this class are added to an OwningRewritePatternList in the same fashion as C++ RewritePatterns, i.e. via the `insert` method.
The PDL bytecode is an in-memory representation of the PDL interpreter dialect that can be efficiently interpreted/executed. The representation of the bytecode boils down to a code array(for opcodes/memory locations/etc) and a memory buffer(for storing attributes/operations/values/any other data necessary). The bytecode operations are effectively a 1-1 mapping to the PDLInterp dialect operations, with a few exceptions in cases where the in-memory representation of the bytecode can be more efficient than the MLIR representation. For example, a generic `AreEqual` bytecode op can be used to represent AreEqualOp, CheckAttributeOp, and CheckTypeOp.
The execution of the bytecode is split into two phases: matching and rewriting. When matching, all of the matched patterns are collected to avoid the overhead of re-running parts of the matcher. These matched patterns are then considered alongside the native C++ patterns, which rewrite immediately in-place via `RewritePattern::matchAndRewrite`, for the given root operation. When a PDL pattern is matched and has the highest benefit, it is passed back to the bytecode to execute its rewriter.
Differential Revision: https://reviews.llvm.org/D89107
2020-12-02 06:30:18 +08:00
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void registerTestPDLByteCodePass();
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2020-06-03 00:12:57 +08:00
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void registerTestPreparationPassWithAllowedMemrefResults();
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2020-07-22 19:03:24 +08:00
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void registerTestRecursiveTypesPass();
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2020-05-29 18:42:35 +08:00
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void registerTestSCFUtilsPass();
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2020-02-12 17:03:40 +08:00
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void registerTestVectorConversions();
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2020-11-05 05:18:26 +08:00
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} // namespace test
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2020-02-12 17:03:40 +08:00
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} // namespace mlir
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2020-05-19 00:44:26 +08:00
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#ifdef MLIR_INCLUDE_TESTS
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2020-02-12 17:03:40 +08:00
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void registerTestPasses() {
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registerConvertToTargetEnvPass();
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registerPassManagerTestPass();
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2020-02-25 02:35:33 +08:00
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registerPrintOpAvailabilityPass();
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2020-11-30 03:15:30 +08:00
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registerShapeFunctionTestPasses();
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[mlir][SideEffects] Define a set of interfaces and traits for defining side effects
This revision introduces the infrastructure for defining side-effects and attaching them to operations. This infrastructure allows for defining different types of side effects, that don't interact with each other, but use the same internal mechanisms. At the base of this is an interface that allows operations to specify the different effect instances that are exhibited by a specific operation instance. An effect instance is comprised of the following:
* Effect: The specific effect being applied.
For memory related effects this may be reading from memory, storing to memory, etc.
* Value: A specific value, either operand/result/region argument, the effect pertains to.
* Resource: This is a global entity that represents the domain within which the effect is being applied.
MLIR serves many different abstractions, which cover many different domains. Simple effects are may have very different context, for example writing to an in-memory buffer vs a database. This revision defines uses this infrastructure to define a set of initial MemoryEffects. The are effects that generally correspond to memory of some kind; Allocate, Free, Read, Write.
This set of memory effects will be used in follow revisions to generalize various parts of the compiler, and make others more powerful(e.g. DCE).
This infrastructure was originally proposed here:
https://groups.google.com/a/tensorflow.org/g/mlir/c/v2mNl4vFCUM
Differential Revision: https://reviews.llvm.org/D74439
2020-03-07 05:53:16 +08:00
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registerSideEffectTestPasses();
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2020-09-11 07:47:29 +08:00
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registerSliceAnalysisTestPass();
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2020-02-12 17:03:40 +08:00
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registerSymbolTestPasses();
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2020-02-15 05:41:01 +08:00
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registerTestAffineDataCopyPass();
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2020-04-10 19:42:49 +08:00
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registerTestAffineLoopUnswitchingPass();
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2020-11-05 05:18:26 +08:00
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registerTestAllReduceLoweringPass();
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2020-02-12 17:03:40 +08:00
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registerTestFunc();
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registerTestGpuMemoryPromotionPass();
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2020-11-05 05:18:26 +08:00
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registerTestLoopPermutationPass();
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2020-02-12 17:03:40 +08:00
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registerTestMatchers();
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2020-09-08 08:06:37 +08:00
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registerTestPrintDefUsePass();
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registerTestPrintNestingPass();
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2020-07-11 08:46:55 +08:00
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registerTestReducer();
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2020-07-29 02:47:30 +08:00
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registerTestSpirvEntryPointABIPass();
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2020-12-23 22:32:31 +08:00
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registerTestSpirvGLSLCanonicalizationPass();
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2020-10-31 02:36:19 +08:00
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registerTestSpirvModuleCombinerPass();
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2020-10-14 04:58:19 +08:00
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registerTestTraitsPass();
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2020-02-12 17:03:40 +08:00
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registerVectorizerTestPass();
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2020-11-08 10:32:35 +08:00
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registerTosaTestQuantUtilAPIPass();
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2020-11-05 05:18:26 +08:00
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test::registerConvertCallOpPass();
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test::registerInliner();
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test::registerMemRefBoundCheck();
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test::registerPatternsTestPass();
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test::registerSimpleParametricTilingPass();
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test::registerTestAffineLoopParametricTilingPass();
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2021-02-10 06:11:00 +08:00
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test::registerTestAliasAnalysisPass();
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2020-11-05 05:18:26 +08:00
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test::registerTestCallGraphPass();
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test::registerTestConstantFold();
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#if MLIR_CUDA_CONVERSIONS_ENABLED
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2021-03-11 00:52:58 +08:00
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test::registerTestGpuSerializeToCubinPass();
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2020-11-05 05:18:26 +08:00
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#endif
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#if MLIR_ROCM_CONVERSIONS_ENABLED
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2021-03-19 15:22:50 +08:00
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test::registerTestGpuSerializeToHsacoPass();
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2020-11-05 05:18:26 +08:00
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#endif
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test::registerTestConvVectorization();
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2020-11-06 11:35:15 +08:00
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test::registerTestDecomposeCallGraphTypes();
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2021-03-11 21:33:44 +08:00
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test::registerTestDataLayoutQuery();
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2020-11-05 05:18:26 +08:00
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test::registerTestDominancePass();
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test::registerTestDynamicPipelinePass();
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test::registerTestExpandTanhPass();
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2021-04-02 01:55:50 +08:00
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test::registerTestComposeSubView();
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2020-11-05 05:18:26 +08:00
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test::registerTestGpuParallelLoopMappingPass();
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2021-03-06 05:47:36 +08:00
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test::registerTestIRVisitorsPass();
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2020-11-05 05:18:26 +08:00
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test::registerTestInterfaces();
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test::registerTestLinalgCodegenStrategy();
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2021-04-06 06:44:07 +08:00
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test::registerTestLinalgElementwiseFusion();
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2021-04-17 04:38:15 +08:00
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test::registerTestPushExpandingReshape();
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2020-11-05 05:18:26 +08:00
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test::registerTestLinalgFusionTransforms();
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2021-01-29 02:51:01 +08:00
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test::registerTestLinalgTensorFusionTransforms();
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2020-11-05 05:18:26 +08:00
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test::registerTestLinalgGreedyFusion();
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test::registerTestLinalgHoisting();
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2020-11-24 02:07:34 +08:00
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test::registerTestLinalgTileAndFuseSequencePass();
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2020-11-05 05:18:26 +08:00
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test::registerTestLinalgTransforms();
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test::registerTestLivenessPass();
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test::registerTestLoopFusion();
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test::registerTestLoopMappingPass();
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test::registerTestLoopUnrollingPass();
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2021-02-19 08:24:56 +08:00
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test::registerTestMathPolynomialApproximationPass();
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2020-11-05 05:18:26 +08:00
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test::registerTestMemRefDependenceCheck();
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test::registerTestMemRefStrideCalculation();
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2020-11-11 17:38:51 +08:00
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test::registerTestNumberOfBlockExecutionsPass();
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test::registerTestNumberOfOperationExecutionsPass();
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2020-11-05 05:18:26 +08:00
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test::registerTestOpaqueLoc();
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[mlir][PDL] Add support for PDL bytecode and expose PDL support to OwningRewritePatternList
PDL patterns are now supported via a new `PDLPatternModule` class. This class contains a ModuleOp with the pdl::PatternOp operations representing the patterns, as well as a collection of registered C++ functions for native constraints/creations/rewrites/etc. that may be invoked via the pdl patterns. Instances of this class are added to an OwningRewritePatternList in the same fashion as C++ RewritePatterns, i.e. via the `insert` method.
The PDL bytecode is an in-memory representation of the PDL interpreter dialect that can be efficiently interpreted/executed. The representation of the bytecode boils down to a code array(for opcodes/memory locations/etc) and a memory buffer(for storing attributes/operations/values/any other data necessary). The bytecode operations are effectively a 1-1 mapping to the PDLInterp dialect operations, with a few exceptions in cases where the in-memory representation of the bytecode can be more efficient than the MLIR representation. For example, a generic `AreEqual` bytecode op can be used to represent AreEqualOp, CheckAttributeOp, and CheckTypeOp.
The execution of the bytecode is split into two phases: matching and rewriting. When matching, all of the matched patterns are collected to avoid the overhead of re-running parts of the matcher. These matched patterns are then considered alongside the native C++ patterns, which rewrite immediately in-place via `RewritePattern::matchAndRewrite`, for the given root operation. When a PDL pattern is matched and has the highest benefit, it is passed back to the bytecode to execute its rewriter.
Differential Revision: https://reviews.llvm.org/D89107
2020-12-02 06:30:18 +08:00
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test::registerTestPDLByteCodePass();
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2020-11-05 05:18:26 +08:00
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test::registerTestRecursiveTypesPass();
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test::registerTestSCFUtilsPass();
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test::registerTestVectorConversions();
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2020-02-12 17:03:40 +08:00
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}
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2020-05-19 00:44:26 +08:00
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#endif
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2020-02-12 17:03:40 +08:00
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2018-06-25 00:10:36 +08:00
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int main(int argc, char **argv) {
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2020-02-12 17:03:40 +08:00
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registerAllPasses();
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2020-05-19 00:44:26 +08:00
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#ifdef MLIR_INCLUDE_TESTS
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2020-02-12 17:03:40 +08:00
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registerTestPasses();
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2020-05-19 00:44:26 +08:00
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#endif
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Separate the Registration from Loading dialects in the Context
This changes the behavior of constructing MLIRContext to no longer load globally
registered dialects on construction. Instead Dialects are only loaded explicitly
on demand:
- the Parser is lazily loading Dialects in the context as it encounters them
during parsing. This is the only purpose for registering dialects and not load
them in the context.
- Passes are expected to declare the dialects they will create entity from
(Operations, Attributes, or Types), and the PassManager is loading Dialects into
the Context when starting a pipeline.
This changes simplifies the configuration of the registration: a compiler only
need to load the dialect for the IR it will emit, and the optimizer is
self-contained and load the required Dialects. For example in the Toy tutorial,
the compiler only needs to load the Toy dialect in the Context, all the others
(linalg, affine, std, LLVM, ...) are automatically loaded depending on the
optimization pipeline enabled.
To adjust to this change, stop using the existing dialect registration: the
global registry will be removed soon.
1) For passes, you need to override the method:
virtual void getDependentDialects(DialectRegistry ®istry) const {}
and registery on the provided registry any dialect that this pass can produce.
Passes defined in TableGen can provide this list in the dependentDialects list
field.
2) For dialects, on construction you can register dependent dialects using the
provided MLIRContext: `context.getOrLoadDialect<DialectName>()`
This is useful if a dialect may canonicalize or have interfaces involving
another dialect.
3) For loading IR, dialect that can be in the input file must be explicitly
registered with the context. `MlirOptMain()` is taking an explicit registry for
this purpose. See how the standalone-opt.cpp example is setup:
mlir::DialectRegistry registry;
registry.insert<mlir::standalone::StandaloneDialect>();
registry.insert<mlir::StandardOpsDialect>();
Only operations from these two dialects can be in the input file. To include all
of the dialects in MLIR Core, you can populate the registry this way:
mlir::registerAllDialects(registry);
4) For `mlir-translate` callback, as well as frontend, Dialects can be loaded in
the context before emitting the IR: context.getOrLoadDialect<ToyDialect>()
Differential Revision: https://reviews.llvm.org/D85622
2020-08-19 04:01:19 +08:00
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DialectRegistry registry;
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registerAllDialects(registry);
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2020-08-27 12:01:23 +08:00
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#ifdef MLIR_INCLUDE_TESTS
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2020-11-05 05:18:26 +08:00
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test::registerTestDialect(registry);
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2020-08-27 12:01:23 +08:00
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#endif
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2021-05-19 07:44:25 +08:00
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return mlir::asMainReturnCode(
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mlir::MlirOptMain(argc, argv, "MLIR modular optimizer driver\n", registry,
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/*preloadDialectsInContext=*/false));
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2018-06-22 00:49:33 +08:00
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}
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