2018-03-12 22:01:28 +08:00
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; RUN: llc -march=hexagon < %s | FileCheck %s
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; Make sure that we can handle loops with multiple ENDLOOP instructions.
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; This situation can arise due to tail duplication.
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; CHECK: loop1([[LP:.LBB0_[0-9]+]]
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2019-08-30 03:03:58 +08:00
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; CHECK: endloop1
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2018-03-12 22:01:28 +08:00
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; CHECK: [[LP]]:
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; CHECK-NOT: loop1(
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; CHECK: endloop1
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%s.0 = type { i32, i8* }
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%s.1 = type { i32, i32, i32, i32 }
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define void @f0(%s.0* nocapture readonly %a0, %s.1* nocapture readonly %a1) {
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b0:
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%v0 = getelementptr inbounds %s.1, %s.1* %a1, i32 0, i32 0
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%v1 = load i32, i32* %v0, align 4
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%v2 = getelementptr inbounds %s.1, %s.1* %a1, i32 0, i32 3
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%v3 = load i32, i32* %v2, align 4
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%v4 = getelementptr inbounds %s.1, %s.1* %a1, i32 0, i32 2
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%v5 = load i32, i32* %v4, align 4
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%v6 = getelementptr inbounds %s.1, %s.1* %a1, i32 0, i32 1
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%v7 = load i32, i32* %v6, align 4
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%v8 = getelementptr inbounds %s.0, %s.0* %a0, i32 0, i32 1
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%v9 = load i8*, i8** %v8, align 4
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%v10 = bitcast i8* %v9 to i32*
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%v11 = mul i32 %v1, 10
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%v12 = icmp eq i32 %v1, %v3
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%v13 = icmp eq i32 %v5, 0
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br i1 %v12, label %b3, label %b1
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b1: ; preds = %b0
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br i1 %v13, label %b14, label %b2
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b2: ; preds = %b1
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%v14 = lshr i32 %v11, 5
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%v15 = getelementptr inbounds i32, i32* %v10, i32 %v14
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%v16 = and i32 %v11, 30
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%v17 = icmp eq i32 %v16, 0
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br label %b11
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b3: ; preds = %b0
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br i1 %v13, label %b14, label %b4
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b4: ; preds = %b3
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%v18 = getelementptr inbounds %s.0, %s.0* %a0, i32 0, i32 0
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br label %b5
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b5: ; preds = %b6, %b4
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%v19 = phi i32 [ %v11, %b4 ], [ %v22, %b6 ]
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%v20 = phi i32 [ %v5, %b4 ], [ %v21, %b6 ]
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%v21 = add i32 %v20, -1
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%v22 = add i32 %v19, -10
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%v23 = lshr i32 %v22, 5
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%v24 = getelementptr inbounds i32, i32* %v10, i32 %v23
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%v25 = and i32 %v22, 31
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%v26 = load i32, i32* %v18, align 4
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%v27 = mul i32 %v26, %v7
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%v28 = icmp eq i32 %v25, 0
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br i1 %v28, label %b7, label %b6
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b6: ; preds = %b10, %b9, %b8, %b5
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%v29 = icmp eq i32 %v21, 0
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br i1 %v29, label %b14, label %b5
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b7: ; preds = %b5
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%v30 = icmp ugt i32 %v27, 1
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br i1 %v30, label %b8, label %b9
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b8: ; preds = %b7
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%v31 = icmp ugt i32 %v27, 3
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br i1 %v31, label %b10, label %b6
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b9: ; preds = %b7
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%v32 = load volatile i32, i32* %v24, align 4
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store volatile i32 %v32, i32* %v24, align 4
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br label %b6
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b10: ; preds = %b10, %b8
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%v33 = phi i32 [ %v37, %b10 ], [ %v27, %b8 ]
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%v34 = phi i32* [ %v35, %b10 ], [ %v24, %b8 ]
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%v35 = getelementptr inbounds i32, i32* %v34, i32 -1
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%v36 = load volatile i32, i32* %v34, align 4
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%v37 = add i32 %v33, -4
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%v38 = icmp ugt i32 %v37, 3
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br i1 %v38, label %b10, label %b6
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b11: ; preds = %b12, %b2
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%v39 = phi i32 [ %v5, %b2 ], [ %v40, %b12 ]
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%v40 = add i32 %v39, -1
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br i1 %v17, label %b13, label %b12
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b12: ; preds = %b13, %b11
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%v41 = icmp eq i32 %v40, 0
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br i1 %v41, label %b14, label %b11
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b13: ; preds = %b11
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%v42 = load volatile i32, i32* %v15, align 4
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%v43 = load volatile i32, i32* %v15, align 4
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%v44 = and i32 %v43, %v42
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store volatile i32 %v44, i32* %v15, align 4
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br label %b12
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b14: ; preds = %b12, %b6, %b3, %b1
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ret void
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}
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