2016-11-10 06:21:58 +08:00
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2009-10-12 06:52:15 +08:00
; RUN: opt < %s -instcombine -S | FileCheck %s
2006-04-11 06:45:37 +08:00
Land the long talked about "type system rewrite" patch. This
patch brings numerous advantages to LLVM. One way to look at it
is through diffstat:
109 files changed, 3005 insertions(+), 5906 deletions(-)
Removing almost 3K lines of code is a good thing. Other advantages
include:
1. Value::getType() is a simple load that can be CSE'd, not a mutating
union-find operation.
2. Types a uniqued and never move once created, defining away PATypeHolder.
3. Structs can be "named" now, and their name is part of the identity that
uniques them. This means that the compiler doesn't merge them structurally
which makes the IR much less confusing.
4. Now that there is no way to get a cycle in a type graph without a named
struct type, "upreferences" go away.
5. Type refinement is completely gone, which should make LTO much MUCH faster
in some common cases with C++ code.
6. Types are now generally immutable, so we can use "Type *" instead
"const Type *" everywhere.
Downsides of this patch are that it removes some functions from the C API,
so people using those will have to upgrade to (not yet added) new API.
"LLVM 3.0" is the right time to do this.
There are still some cleanups pending after this, this patch is large enough
as-is.
llvm-svn: 134829
2011-07-10 01:41:24 +08:00
define < 4 x float > @test1 ( < 4 x float > %v1 ) {
2013-07-14 09:42:54 +08:00
; CHECK-LABEL: @test1(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: ret <4 x float> [[V1:%.*]]
2016-11-10 06:21:58 +08:00
;
Land the long talked about "type system rewrite" patch. This
patch brings numerous advantages to LLVM. One way to look at it
is through diffstat:
109 files changed, 3005 insertions(+), 5906 deletions(-)
Removing almost 3K lines of code is a good thing. Other advantages
include:
1. Value::getType() is a simple load that can be CSE'd, not a mutating
union-find operation.
2. Types a uniqued and never move once created, defining away PATypeHolder.
3. Structs can be "named" now, and their name is part of the identity that
uniques them. This means that the compiler doesn't merge them structurally
which makes the IR much less confusing.
4. Now that there is no way to get a cycle in a type graph without a named
struct type, "upreferences" go away.
5. Type refinement is completely gone, which should make LTO much MUCH faster
in some common cases with C++ code.
6. Types are now generally immutable, so we can use "Type *" instead
"const Type *" everywhere.
Downsides of this patch are that it removes some functions from the C API,
so people using those will have to upgrade to (not yet added) new API.
"LLVM 3.0" is the right time to do this.
There are still some cleanups pending after this, this patch is large enough
as-is.
llvm-svn: 134829
2011-07-10 01:41:24 +08:00
%v2 = shufflevector < 4 x float > %v1 , < 4 x float > undef , < 4 x i32 > < i32 0 , i32 1 , i32 2 , i32 3 >
ret < 4 x float > %v2
2006-04-11 06:45:37 +08:00
}
Land the long talked about "type system rewrite" patch. This
patch brings numerous advantages to LLVM. One way to look at it
is through diffstat:
109 files changed, 3005 insertions(+), 5906 deletions(-)
Removing almost 3K lines of code is a good thing. Other advantages
include:
1. Value::getType() is a simple load that can be CSE'd, not a mutating
union-find operation.
2. Types a uniqued and never move once created, defining away PATypeHolder.
3. Structs can be "named" now, and their name is part of the identity that
uniques them. This means that the compiler doesn't merge them structurally
which makes the IR much less confusing.
4. Now that there is no way to get a cycle in a type graph without a named
struct type, "upreferences" go away.
5. Type refinement is completely gone, which should make LTO much MUCH faster
in some common cases with C++ code.
6. Types are now generally immutable, so we can use "Type *" instead
"const Type *" everywhere.
Downsides of this patch are that it removes some functions from the C API,
so people using those will have to upgrade to (not yet added) new API.
"LLVM 3.0" is the right time to do this.
There are still some cleanups pending after this, this patch is large enough
as-is.
llvm-svn: 134829
2011-07-10 01:41:24 +08:00
define < 4 x float > @test2 ( < 4 x float > %v1 ) {
2013-07-14 09:42:54 +08:00
; CHECK-LABEL: @test2(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: ret <4 x float> [[V1:%.*]]
2016-11-10 06:21:58 +08:00
;
Land the long talked about "type system rewrite" patch. This
patch brings numerous advantages to LLVM. One way to look at it
is through diffstat:
109 files changed, 3005 insertions(+), 5906 deletions(-)
Removing almost 3K lines of code is a good thing. Other advantages
include:
1. Value::getType() is a simple load that can be CSE'd, not a mutating
union-find operation.
2. Types a uniqued and never move once created, defining away PATypeHolder.
3. Structs can be "named" now, and their name is part of the identity that
uniques them. This means that the compiler doesn't merge them structurally
which makes the IR much less confusing.
4. Now that there is no way to get a cycle in a type graph without a named
struct type, "upreferences" go away.
5. Type refinement is completely gone, which should make LTO much MUCH faster
in some common cases with C++ code.
6. Types are now generally immutable, so we can use "Type *" instead
"const Type *" everywhere.
Downsides of this patch are that it removes some functions from the C API,
so people using those will have to upgrade to (not yet added) new API.
"LLVM 3.0" is the right time to do this.
There are still some cleanups pending after this, this patch is large enough
as-is.
llvm-svn: 134829
2011-07-10 01:41:24 +08:00
%v2 = shufflevector < 4 x float > %v1 , < 4 x float > %v1 , < 4 x i32 > < i32 0 , i32 5 , i32 2 , i32 7 >
ret < 4 x float > %v2
2006-04-11 06:45:37 +08:00
}
Land the long talked about "type system rewrite" patch. This
patch brings numerous advantages to LLVM. One way to look at it
is through diffstat:
109 files changed, 3005 insertions(+), 5906 deletions(-)
Removing almost 3K lines of code is a good thing. Other advantages
include:
1. Value::getType() is a simple load that can be CSE'd, not a mutating
union-find operation.
2. Types a uniqued and never move once created, defining away PATypeHolder.
3. Structs can be "named" now, and their name is part of the identity that
uniques them. This means that the compiler doesn't merge them structurally
which makes the IR much less confusing.
4. Now that there is no way to get a cycle in a type graph without a named
struct type, "upreferences" go away.
5. Type refinement is completely gone, which should make LTO much MUCH faster
in some common cases with C++ code.
6. Types are now generally immutable, so we can use "Type *" instead
"const Type *" everywhere.
Downsides of this patch are that it removes some functions from the C API,
so people using those will have to upgrade to (not yet added) new API.
"LLVM 3.0" is the right time to do this.
There are still some cleanups pending after this, this patch is large enough
as-is.
llvm-svn: 134829
2011-07-10 01:41:24 +08:00
define float @test3 ( < 4 x float > %A , < 4 x float > %B , float %f ) {
2013-07-14 09:42:54 +08:00
; CHECK-LABEL: @test3(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: ret float [[F:%.*]]
2016-11-10 06:21:58 +08:00
;
%C = insertelement < 4 x float > %A , float %f , i32 0
%D = shufflevector < 4 x float > %C , < 4 x float > %B , < 4 x i32 > < i32 5 , i32 0 , i32 2 , i32 7 >
%E = extractelement < 4 x float > %D , i32 1
ret float %E
2006-04-11 07:06:18 +08:00
}
2007-01-26 16:25:06 +08:00
define i32 @test4 ( < 4 x i32 > %X ) {
2013-07-14 09:42:54 +08:00
; CHECK-LABEL: @test4(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: [[R:%.*]] = extractelement <4 x i32> [[X:%.*]], i32 0
; CHECK-NEXT: ret i32 [[R]]
2016-11-10 06:21:58 +08:00
;
2018-05-16 00:47:47 +08:00
%t = shufflevector < 4 x i32 > %X , < 4 x i32 > undef , < 4 x i32 > zeroinitializer
%r = extractelement < 4 x i32 > %t , i32 0
ret i32 %r
2006-05-26 06:52:49 +08:00
}
2007-01-26 16:25:06 +08:00
define i32 @test5 ( < 4 x i32 > %X ) {
2013-07-14 09:42:54 +08:00
; CHECK-LABEL: @test5(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: [[R:%.*]] = extractelement <4 x i32> [[X:%.*]], i32 3
; CHECK-NEXT: ret i32 [[R]]
2016-11-10 06:21:58 +08:00
;
2018-05-16 00:47:47 +08:00
%t = shufflevector < 4 x i32 > %X , < 4 x i32 > undef , < 4 x i32 > < i32 3 , i32 2 , i32 undef , i32 undef >
%r = extractelement < 4 x i32 > %t , i32 0
ret i32 %r
2006-05-26 06:52:49 +08:00
}
2007-01-26 16:25:06 +08:00
define float @test6 ( < 4 x float > %X ) {
2013-07-14 09:42:54 +08:00
; CHECK-LABEL: @test6(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: [[R:%.*]] = extractelement <4 x float> [[X:%.*]], i32 0
; CHECK-NEXT: ret float [[R]]
2016-11-10 06:21:58 +08:00
;
%X1 = bitcast < 4 x float > %X to < 4 x i32 >
2018-05-16 00:47:47 +08:00
%t = shufflevector < 4 x i32 > %X1 , < 4 x i32 > undef , < 4 x i32 > zeroinitializer
%t2 = bitcast < 4 x i32 > %t to < 4 x float >
%r = extractelement < 4 x float > %t2 , i32 0
ret float %r
2006-05-26 07:23:22 +08:00
}
2018-05-16 00:47:47 +08:00
define < 4 x float > @test7 ( < 4 x float > %x ) {
2013-07-14 09:42:54 +08:00
; CHECK-LABEL: @test7(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: ret <4 x float> [[X:%.*]]
2016-11-10 06:21:58 +08:00
;
2018-05-16 00:47:47 +08:00
%r = shufflevector < 4 x float > %x , < 4 x float > undef , < 4 x i32 > < i32 0 , i32 1 , i32 6 , i32 7 >
ret < 4 x float > %r
2007-01-05 15:35:24 +08:00
}
2009-10-12 06:52:15 +08:00
; This should turn into a single shuffle.
2018-05-16 00:47:47 +08:00
define < 4 x float > @test8 ( < 4 x float > %x , < 4 x float > %y ) {
2013-07-14 09:42:54 +08:00
; CHECK-LABEL: @test8(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: [[T134:%.*]] = shufflevector <4 x float> [[X:%.*]], <4 x float> [[Y:%.*]], <4 x i32> <i32 1, i32 undef, i32 3, i32 4>
; CHECK-NEXT: ret <4 x float> [[T134]]
2016-11-10 06:21:58 +08:00
;
2018-05-16 00:47:47 +08:00
%t4 = extractelement < 4 x float > %x , i32 1
%t2 = extractelement < 4 x float > %x , i32 3
%t1 = extractelement < 4 x float > %y , i32 0
%t128 = insertelement < 4 x float > undef , float %t4 , i32 0
%t130 = insertelement < 4 x float > %t128 , float undef , i32 1
%t132 = insertelement < 4 x float > %t130 , float %t2 , i32 2
%t134 = insertelement < 4 x float > %t132 , float %t1 , i32 3
ret < 4 x float > %t134
2009-10-12 06:52:15 +08:00
}
2009-10-12 06:54:48 +08:00
; Test fold of two shuffles where the first shuffle vectors inputs are a
; different length then the second.
2018-05-16 00:47:47 +08:00
define < 4 x i8 > @test9 ( < 16 x i8 > %t6 ) {
2013-07-14 09:42:54 +08:00
; CHECK-LABEL: @test9(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: [[T9:%.*]] = shufflevector <16 x i8> [[T6:%.*]], <16 x i8> undef, <4 x i32> <i32 13, i32 9, i32 4, i32 13>
; CHECK-NEXT: ret <4 x i8> [[T9]]
2016-11-10 06:21:58 +08:00
;
2018-05-16 00:47:47 +08:00
%t7 = shufflevector < 16 x i8 > %t6 , < 16 x i8 > undef , < 4 x i32 > < i32 13 , i32 9 , i32 4 , i32 13 >
%t9 = shufflevector < 4 x i8 > %t7 , < 4 x i8 > undef , < 4 x i32 > < i32 3 , i32 1 , i32 2 , i32 0 >
ret < 4 x i8 > %t9
2010-04-08 06:53:17 +08:00
}
2010-10-30 06:02:50 +08:00
2010-10-30 06:03:05 +08:00
; Same as test9, but make sure that "undef" mask values are not confused with
2013-05-01 08:25:27 +08:00
; mask values of 2*N, where N is the mask length. These shuffles should not
; be folded (because [8,9,4,8] may not be a mask supported by the target).
2018-05-16 00:47:47 +08:00
define < 4 x i8 > @test9a ( < 16 x i8 > %t6 ) {
2013-07-14 09:42:54 +08:00
; CHECK-LABEL: @test9a(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: [[T7:%.*]] = shufflevector <16 x i8> [[T6:%.*]], <16 x i8> undef, <4 x i32> <i32 undef, i32 9, i32 4, i32 8>
; CHECK-NEXT: [[T9:%.*]] = shufflevector <4 x i8> [[T7]], <4 x i8> undef, <4 x i32> <i32 3, i32 1, i32 2, i32 undef>
; CHECK-NEXT: ret <4 x i8> [[T9]]
2016-11-10 06:21:58 +08:00
;
2018-05-16 00:47:47 +08:00
%t7 = shufflevector < 16 x i8 > %t6 , < 16 x i8 > undef , < 4 x i32 > < i32 undef , i32 9 , i32 4 , i32 8 >
%t9 = shufflevector < 4 x i8 > %t7 , < 4 x i8 > undef , < 4 x i32 > < i32 3 , i32 1 , i32 2 , i32 0 >
ret < 4 x i8 > %t9
2010-10-30 06:03:05 +08:00
}
2011-10-22 03:06:29 +08:00
; Test fold of two shuffles where the first shuffle vectors inputs are a
; different length then the second.
2018-05-16 00:47:47 +08:00
define < 4 x i8 > @test9b ( < 4 x i8 > %t6 , < 4 x i8 > %t7 ) {
2013-07-14 09:42:54 +08:00
; CHECK-LABEL: @test9b(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: [[T9:%.*]] = shufflevector <4 x i8> [[T6:%.*]], <4 x i8> [[T7:%.*]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
; CHECK-NEXT: ret <4 x i8> [[T9]]
2016-11-10 06:21:58 +08:00
;
2018-05-16 00:47:47 +08:00
%t1 = shufflevector < 4 x i8 > %t6 , < 4 x i8 > %t7 , < 8 x i32 > < i32 0 , i32 1 , i32 4 , i32 5 , i32 4 , i32 5 , i32 2 , i32 3 >
%t9 = shufflevector < 8 x i8 > %t1 , < 8 x i8 > undef , < 4 x i32 > < i32 0 , i32 1 , i32 4 , i32 5 >
ret < 4 x i8 > %t9
2011-10-22 03:06:29 +08:00
}
2010-10-30 06:02:50 +08:00
; Redundant vector splats should be removed. Radar 8597790.
2018-05-16 00:47:47 +08:00
define < 4 x i32 > @test10 ( < 4 x i32 > %t5 ) {
2013-07-14 09:42:54 +08:00
; CHECK-LABEL: @test10(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: [[T7:%.*]] = shufflevector <4 x i32> [[T5:%.*]], <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
; CHECK-NEXT: ret <4 x i32> [[T7]]
2016-11-10 06:21:58 +08:00
;
2018-05-16 00:47:47 +08:00
%t6 = shufflevector < 4 x i32 > %t5 , < 4 x i32 > undef , < 4 x i32 > < i32 1 , i32 undef , i32 undef , i32 undef >
%t7 = shufflevector < 4 x i32 > %t6 , < 4 x i32 > undef , < 4 x i32 > zeroinitializer
ret < 4 x i32 > %t7
2010-10-30 06:02:50 +08:00
}
2011-10-22 03:06:29 +08:00
2018-10-10 02:37:20 +08:00
; Test fold of two shuffles where the two shufflevector inputs's op1 are the same.
2018-05-16 00:47:47 +08:00
define < 8 x i8 > @test11 ( < 16 x i8 > %t6 ) {
2013-07-14 09:42:54 +08:00
; CHECK-LABEL: @test11(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: [[T3:%.*]] = shufflevector <16 x i8> [[T6:%.*]], <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
; CHECK-NEXT: ret <8 x i8> [[T3]]
2016-11-10 06:21:58 +08:00
;
2018-05-16 00:47:47 +08:00
%t1 = shufflevector < 16 x i8 > %t6 , < 16 x i8 > undef , < 4 x i32 > < i32 0 , i32 1 , i32 2 , i32 3 >
%t2 = shufflevector < 16 x i8 > %t6 , < 16 x i8 > undef , < 4 x i32 > < i32 4 , i32 5 , i32 6 , i32 7 >
%t3 = shufflevector < 4 x i8 > %t1 , < 4 x i8 > %t2 , < 8 x i32 > < i32 0 , i32 1 , i32 2 , i32 3 , i32 4 , i32 5 , i32 6 , i32 7 >
ret < 8 x i8 > %t3
2011-10-22 03:06:29 +08:00
}
2018-10-10 02:37:20 +08:00
; Test fold of two shuffles where the first shufflevector's inputs are the same as the second.
2018-05-16 00:47:47 +08:00
define < 8 x i8 > @test12 ( < 8 x i8 > %t6 , < 8 x i8 > %t2 ) {
2013-07-14 09:42:54 +08:00
; CHECK-LABEL: @test12(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: [[T3:%.*]] = shufflevector <8 x i8> [[T6:%.*]], <8 x i8> [[T2:%.*]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 9, i32 8, i32 11, i32 12>
; CHECK-NEXT: ret <8 x i8> [[T3]]
2016-11-10 06:21:58 +08:00
;
2018-05-16 00:47:47 +08:00
%t1 = shufflevector < 8 x i8 > %t6 , < 8 x i8 > undef , < 8 x i32 > < i32 0 , i32 1 , i32 2 , i32 3 , i32 5 , i32 4 , i32 undef , i32 7 >
%t3 = shufflevector < 8 x i8 > %t1 , < 8 x i8 > %t2 , < 8 x i32 > < i32 0 , i32 1 , i32 2 , i32 3 , i32 9 , i32 8 , i32 11 , i32 12 >
ret < 8 x i8 > %t3
2011-10-22 03:06:29 +08:00
}
2018-10-10 02:37:20 +08:00
; Test fold of two shuffles where the first shufflevector's inputs are the same as the second.
2018-05-16 00:47:47 +08:00
define < 8 x i8 > @test12a ( < 8 x i8 > %t6 , < 8 x i8 > %t2 ) {
2013-07-14 09:42:54 +08:00
; CHECK-LABEL: @test12a(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: [[T3:%.*]] = shufflevector <8 x i8> [[T2:%.*]], <8 x i8> [[T6:%.*]], <8 x i32> <i32 0, i32 3, i32 1, i32 4, i32 8, i32 9, i32 10, i32 11>
; CHECK-NEXT: ret <8 x i8> [[T3]]
2016-11-10 06:21:58 +08:00
;
2018-05-16 00:47:47 +08:00
%t1 = shufflevector < 8 x i8 > %t6 , < 8 x i8 > undef , < 8 x i32 > < i32 0 , i32 1 , i32 2 , i32 3 , i32 5 , i32 4 , i32 undef , i32 7 >
%t3 = shufflevector < 8 x i8 > %t2 , < 8 x i8 > %t1 , < 8 x i32 > < i32 0 , i32 3 , i32 1 , i32 4 , i32 8 , i32 9 , i32 10 , i32 11 >
ret < 8 x i8 > %t3
2011-10-22 03:06:29 +08:00
}
2018-10-14 23:25:06 +08:00
; The mask length of the 1st shuffle can be reduced to eliminate the 2nd shuffle.
2018-10-10 02:37:20 +08:00
define < 2 x i8 > @extract_subvector_of_shuffle ( < 2 x i8 > %x , < 2 x i8 > %y ) {
; CHECK-LABEL: @extract_subvector_of_shuffle(
2018-10-14 23:25:06 +08:00
; CHECK-NEXT: [[EXTRACT_SUBV:%.*]] = shufflevector <2 x i8> [[X:%.*]], <2 x i8> [[Y:%.*]], <2 x i32> <i32 0, i32 2>
2018-10-10 02:37:20 +08:00
; CHECK-NEXT: ret <2 x i8> [[EXTRACT_SUBV]]
;
%shuf = shufflevector < 2 x i8 > %x , < 2 x i8 > %y , < 3 x i32 > < i32 0 , i32 2 , i32 0 >
%extract_subv = shufflevector < 3 x i8 > %shuf , < 3 x i8 > undef , < 2 x i32 > < i32 0 , i32 1 >
ret < 2 x i8 > %extract_subv
}
; Extra uses are ok.
; Undef elements in either mask are ok. Undefs from the 2nd shuffle mask should propagate to the new shuffle.
; The type of the inputs does not have to match the output type.
declare void @use_v5i8 ( < 5 x i8 > )
define < 4 x i8 > @extract_subvector_of_shuffle_extra_use ( < 2 x i8 > %x , < 2 x i8 > %y ) {
; CHECK-LABEL: @extract_subvector_of_shuffle_extra_use(
; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <2 x i8> [[X:%.*]], <2 x i8> [[Y:%.*]], <5 x i32> <i32 undef, i32 2, i32 0, i32 1, i32 0>
; CHECK-NEXT: call void @use_v5i8(<5 x i8> [[SHUF]])
2018-10-14 23:25:06 +08:00
; CHECK-NEXT: [[EXTRACT_SUBV:%.*]] = shufflevector <2 x i8> [[X]], <2 x i8> [[Y]], <4 x i32> <i32 undef, i32 2, i32 0, i32 undef>
2018-10-10 02:37:20 +08:00
; CHECK-NEXT: ret <4 x i8> [[EXTRACT_SUBV]]
;
%shuf = shufflevector < 2 x i8 > %x , < 2 x i8 > %y , < 5 x i32 > < i32 undef , i32 2 , i32 0 , i32 1 , i32 0 >
call void @use_v5i8 ( < 5 x i8 > %shuf )
%extract_subv = shufflevector < 5 x i8 > %shuf , < 5 x i8 > undef , < 4 x i32 > < i32 0 , i32 1 , i32 2 , i32 undef >
ret < 4 x i8 > %extract_subv
}
2013-05-31 08:59:42 +08:00
define < 2 x i8 > @test13a ( i8 %x1 , i8 %x2 ) {
2013-07-14 09:42:54 +08:00
; CHECK-LABEL: @test13a(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i8> undef, i8 [[X1:%.*]], i32 1
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i8> [[TMP1]], i8 [[X2:%.*]], i32 0
2016-11-10 06:21:58 +08:00
; CHECK-NEXT: [[TMP3:%.*]] = add <2 x i8> [[TMP2]], <i8 7, i8 5>
; CHECK-NEXT: ret <2 x i8> [[TMP3]]
;
2013-05-31 08:59:42 +08:00
%A = insertelement < 2 x i8 > undef , i8 %x1 , i32 0
%B = insertelement < 2 x i8 > %A , i8 %x2 , i32 1
%C = add < 2 x i8 > %B , < i8 5 , i8 7 >
%D = shufflevector < 2 x i8 > %C , < 2 x i8 > undef , < 2 x i32 > < i32 1 , i32 0 >
ret < 2 x i8 > %D
}
2018-09-28 23:24:41 +08:00
; Increasing length of vector ops is not a good canonicalization.
2018-09-28 23:20:06 +08:00
define < 3 x i32 > @add_wider ( i32 %y , i32 %z ) {
2018-09-28 23:24:41 +08:00
; CHECK-LABEL: @add_wider(
; CHECK-NEXT: [[I0:%.*]] = insertelement <2 x i32> undef, i32 [[Y:%.*]], i32 0
; CHECK-NEXT: [[I1:%.*]] = insertelement <2 x i32> [[I0]], i32 [[Z:%.*]], i32 1
; CHECK-NEXT: [[A:%.*]] = add <2 x i32> [[I1]], <i32 255, i32 255>
; CHECK-NEXT: [[EXT:%.*]] = shufflevector <2 x i32> [[A]], <2 x i32> undef, <3 x i32> <i32 0, i32 1, i32 undef>
; CHECK-NEXT: ret <3 x i32> [[EXT]]
2018-09-28 23:20:06 +08:00
;
%i0 = insertelement < 2 x i32 > undef , i32 %y , i32 0
%i1 = insertelement < 2 x i32 > %i0 , i32 %z , i32 1
%a = add < 2 x i32 > %i1 , < i32 255 , i32 255 >
%ext = shufflevector < 2 x i32 > %a , < 2 x i32 > undef , < 3 x i32 > < i32 0 , i32 1 , i32 undef >
ret < 3 x i32 > %ext
}
2018-09-28 23:24:41 +08:00
; Increasing length of vector ops must be safe from illegal undef propagation.
2018-09-28 23:20:06 +08:00
define < 3 x i32 > @div_wider ( i32 %y , i32 %z ) {
2018-09-28 23:24:41 +08:00
; CHECK-LABEL: @div_wider(
; CHECK-NEXT: [[I0:%.*]] = insertelement <2 x i32> undef, i32 [[Y:%.*]], i32 0
; CHECK-NEXT: [[I1:%.*]] = insertelement <2 x i32> [[I0]], i32 [[Z:%.*]], i32 1
; CHECK-NEXT: [[A:%.*]] = sdiv <2 x i32> [[I1]], <i32 255, i32 255>
; CHECK-NEXT: [[EXT:%.*]] = shufflevector <2 x i32> [[A]], <2 x i32> undef, <3 x i32> <i32 0, i32 1, i32 undef>
; CHECK-NEXT: ret <3 x i32> [[EXT]]
2018-09-28 23:20:06 +08:00
;
%i0 = insertelement < 2 x i32 > undef , i32 %y , i32 0
%i1 = insertelement < 2 x i32 > %i0 , i32 %z , i32 1
%a = sdiv < 2 x i32 > %i1 , < i32 255 , i32 255 >
%ext = shufflevector < 2 x i32 > %a , < 2 x i32 > undef , < 3 x i32 > < i32 0 , i32 1 , i32 undef >
ret < 3 x i32 > %ext
}
2018-09-30 21:50:42 +08:00
; Increasing length of insertelements (no math ops) is a good canonicalization.
2018-09-29 23:01:45 +08:00
define < 3 x i8 > @fold_inselts_with_widening_shuffle ( i8 %x , i8 %y ) {
; CHECK-LABEL: @fold_inselts_with_widening_shuffle(
2018-09-30 21:50:42 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <3 x i8> undef, i8 [[X:%.*]], i32 0
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <3 x i8> [[TMP1]], i8 [[Y:%.*]], i32 1
; CHECK-NEXT: ret <3 x i8> [[TMP2]]
2018-09-29 23:01:45 +08:00
;
%ins0 = insertelement < 2 x i8 > undef , i8 %x , i32 0
%ins1 = insertelement < 2 x i8 > %ins0 , i8 %y , i32 1
%widen = shufflevector < 2 x i8 > %ins1 , < 2 x i8 > undef , < 3 x i32 > < i32 0 , i32 1 , i32 undef >
ret < 3 x i8 > %widen
}
2013-05-31 08:59:42 +08:00
define < 2 x i8 > @test13b ( i8 %x ) {
2013-07-14 09:42:54 +08:00
; CHECK-LABEL: @test13b(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 1
2016-11-10 06:21:58 +08:00
; CHECK-NEXT: ret <2 x i8> [[TMP1]]
;
2013-05-31 08:59:42 +08:00
%A = insertelement < 2 x i8 > undef , i8 %x , i32 0
%B = shufflevector < 2 x i8 > %A , < 2 x i8 > undef , < 2 x i32 > < i32 undef , i32 0 >
ret < 2 x i8 > %B
}
2013-06-02 04:51:31 +08:00
define < 2 x i8 > @test13c ( i8 %x1 , i8 %x2 ) {
2013-07-14 09:42:54 +08:00
; CHECK-LABEL: @test13c(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i8> undef, i8 [[X1:%.*]], i32 0
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i8> [[TMP1]], i8 [[X2:%.*]], i32 1
2016-11-10 06:21:58 +08:00
; CHECK-NEXT: ret <2 x i8> [[TMP2]]
;
2013-06-02 04:51:31 +08:00
%A = insertelement < 4 x i8 > undef , i8 %x1 , i32 0
%B = insertelement < 4 x i8 > %A , i8 %x2 , i32 2
%C = shufflevector < 4 x i8 > %B , < 4 x i8 > undef , < 2 x i32 > < i32 0 , i32 2 >
ret < 2 x i8 > %C
}
2013-07-13 07:08:06 +08:00
define void @test14 ( i16 %conv10 ) {
2016-11-10 06:21:58 +08:00
; CHECK-LABEL: @test14(
; CHECK-NEXT: store <4 x i16> <i16 undef, i16 undef, i16 undef, i16 23>, <4 x i16>* undef, align 8
; CHECK-NEXT: ret void
;
2018-05-16 00:47:47 +08:00
%t = alloca < 4 x i16 > , align 8
2013-07-13 07:08:06 +08:00
%vecinit6 = insertelement < 4 x i16 > undef , i16 23 , i32 3
store < 4 x i16 > %vecinit6 , < 4 x i16 > * undef
2018-05-16 00:47:47 +08:00
%t1 = load < 4 x i16 > , < 4 x i16 > * undef
2013-07-13 07:08:06 +08:00
%vecinit11 = insertelement < 4 x i16 > undef , i16 %conv10 , i32 3
2018-05-16 00:47:47 +08:00
%div = udiv < 4 x i16 > %t1 , %vecinit11
store < 4 x i16 > %div , < 4 x i16 > * %t
%t4 = load < 4 x i16 > , < 4 x i16 > * %t
%t5 = shufflevector < 4 x i16 > %t4 , < 4 x i16 > undef , < 2 x i32 > < i32 2 , i32 0 >
%cmp = icmp ule < 2 x i16 > %t5 , undef
2013-07-13 07:08:06 +08:00
%sext = sext < 2 x i1 > %cmp to < 2 x i16 >
ret void
}
2013-09-18 20:06:59 +08:00
2016-11-10 06:21:58 +08:00
; Check that sequences of insert/extract element are
2013-09-18 20:06:59 +08:00
; collapsed into valid shuffle instruction with correct shuffle indexes.
2016-11-10 06:21:58 +08:00
2013-09-18 20:06:59 +08:00
define < 4 x float > @test15a ( < 4 x float > %LHS , < 4 x float > %RHS ) {
2016-11-10 06:21:58 +08:00
; CHECK-LABEL: @test15a(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: [[T4:%.*]] = shufflevector <4 x float> [[LHS:%.*]], <4 x float> [[RHS:%.*]], <4 x i32> <i32 4, i32 0, i32 6, i32 6>
; CHECK-NEXT: ret <4 x float> [[T4]]
2016-11-10 06:21:58 +08:00
;
2018-05-16 00:47:47 +08:00
%t1 = extractelement < 4 x float > %LHS , i32 0
%t2 = insertelement < 4 x float > %RHS , float %t1 , i32 1
%t3 = extractelement < 4 x float > %RHS , i32 2
%t4 = insertelement < 4 x float > %t2 , float %t3 , i32 3
ret < 4 x float > %t4
2013-09-18 20:06:59 +08:00
}
2016-11-10 06:21:58 +08:00
2013-09-18 20:06:59 +08:00
define < 4 x float > @test15b ( < 4 x float > %LHS , < 4 x float > %RHS ) {
2016-11-10 06:21:58 +08:00
; CHECK-LABEL: @test15b(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: [[T5:%.*]] = shufflevector <4 x float> [[LHS:%.*]], <4 x float> [[RHS:%.*]], <4 x i32> <i32 4, i32 3, i32 6, i32 6>
; CHECK-NEXT: ret <4 x float> [[T5]]
2016-11-10 06:21:58 +08:00
;
2018-05-16 00:47:47 +08:00
%t0 = extractelement < 4 x float > %LHS , i32 3
%t1 = insertelement < 4 x float > %RHS , float %t0 , i32 0
%t2 = extractelement < 4 x float > %t1 , i32 0
%t3 = insertelement < 4 x float > %RHS , float %t2 , i32 1
%t4 = extractelement < 4 x float > %RHS , i32 2
%t5 = insertelement < 4 x float > %t3 , float %t4 , i32 3
ret < 4 x float > %t5
2013-09-18 20:06:59 +08:00
}
2014-01-08 11:06:15 +08:00
define < 1 x i32 > @test16a ( i32 %ele ) {
; CHECK-LABEL: @test16a(
2016-11-10 06:21:58 +08:00
; CHECK-NEXT: ret <1 x i32> <i32 2>
;
2018-05-16 00:47:47 +08:00
%t0 = insertelement < 2 x i32 > < i32 1 , i32 undef > , i32 %ele , i32 1
%t1 = shl < 2 x i32 > %t0 , < i32 1 , i32 1 >
%t2 = shufflevector < 2 x i32 > %t1 , < 2 x i32 > undef , < 1 x i32 > < i32 0 >
ret < 1 x i32 > %t2
2014-01-08 11:06:15 +08:00
}
define < 4 x i8 > @test16b ( i8 %ele ) {
; CHECK-LABEL: @test16b(
2016-11-10 06:21:58 +08:00
; CHECK-NEXT: ret <4 x i8> <i8 2, i8 2, i8 2, i8 2>
;
2018-05-16 00:47:47 +08:00
%t0 = insertelement < 8 x i8 > < i8 1 , i8 1 , i8 1 , i8 1 , i8 1 , i8 1 , i8 undef , i8 1 > , i8 %ele , i32 6
%t1 = shl < 8 x i8 > %t0 , < i8 1 , i8 1 , i8 1 , i8 1 , i8 1 , i8 1 , i8 1 , i8 1 >
%t2 = shufflevector < 8 x i8 > %t1 , < 8 x i8 > undef , < 4 x i32 > < i32 1 , i32 2 , i32 3 , i32 4 >
ret < 4 x i8 > %t2
2014-05-11 16:46:12 +08:00
}
; If composition of two shuffles is identity, shuffles can be removed.
2018-05-16 00:47:47 +08:00
define < 4 x i32 > @shuffle_17ident ( < 4 x i32 > %v ) {
2014-05-11 16:46:12 +08:00
; CHECK-LABEL: @shuffle_17ident(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: ret <4 x i32> [[V:%.*]]
2016-11-10 06:21:58 +08:00
;
%shuffle = shufflevector < 4 x i32 > %v , < 4 x i32 > zeroinitializer , < 4 x i32 > < i32 1 , i32 2 , i32 3 , i32 0 >
%shuffle2 = shufflevector < 4 x i32 > %shuffle , < 4 x i32 > zeroinitializer , < 4 x i32 > < i32 3 , i32 0 , i32 1 , i32 2 >
2014-05-11 16:46:12 +08:00
ret < 4 x i32 > %shuffle2
}
; swizzle can be put after operation
2018-05-16 00:47:47 +08:00
define < 4 x i32 > @shuffle_17and ( < 4 x i32 > %v1 , < 4 x i32 > %v2 ) {
2014-05-11 16:46:12 +08:00
; CHECK-LABEL: @shuffle_17and(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = and <4 x i32> [[V1:%.*]], [[V2:%.*]]
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0>
; CHECK-NEXT: ret <4 x i32> [[R]]
2016-11-10 06:21:58 +08:00
;
%t1 = shufflevector < 4 x i32 > %v1 , < 4 x i32 > zeroinitializer , < 4 x i32 > < i32 1 , i32 2 , i32 3 , i32 0 >
%t2 = shufflevector < 4 x i32 > %v2 , < 4 x i32 > zeroinitializer , < 4 x i32 > < i32 1 , i32 2 , i32 3 , i32 0 >
2014-05-11 16:46:12 +08:00
%r = and < 4 x i32 > %t1 , %t2
ret < 4 x i32 > %r
}
2018-05-16 00:47:47 +08:00
declare void @use ( < 2 x float > )
; One extra use is ok to transform.
define < 2 x float > @shuffle_fadd_multiuse ( < 2 x float > %v1 , < 2 x float > %v2 ) {
; CHECK-LABEL: @shuffle_fadd_multiuse(
; CHECK-NEXT: [[T1:%.*]] = shufflevector <2 x float> [[V1:%.*]], <2 x float> undef, <2 x i32> <i32 1, i32 0>
; CHECK-NEXT: [[TMP1:%.*]] = fadd <2 x float> [[V1]], [[V2:%.*]]
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> undef, <2 x i32> <i32 1, i32 0>
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: call void @use(<2 x float> [[T1]])
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: ret <2 x float> [[R]]
2018-05-16 00:47:47 +08:00
;
%t1 = shufflevector < 2 x float > %v1 , < 2 x float > undef , < 2 x i32 > < i32 1 , i32 0 >
%t2 = shufflevector < 2 x float > %v2 , < 2 x float > undef , < 2 x i32 > < i32 1 , i32 0 >
%r = fadd < 2 x float > %t1 , %t2
call void @use ( < 2 x float > %t1 )
ret < 2 x float > %r
}
define < 2 x float > @shuffle_fdiv_multiuse ( < 2 x float > %v1 , < 2 x float > %v2 ) {
; CHECK-LABEL: @shuffle_fdiv_multiuse(
; CHECK-NEXT: [[T2:%.*]] = shufflevector <2 x float> [[V2:%.*]], <2 x float> undef, <2 x i32> <i32 1, i32 0>
; CHECK-NEXT: [[TMP1:%.*]] = fdiv <2 x float> [[V1:%.*]], [[V2]]
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> undef, <2 x i32> <i32 1, i32 0>
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: call void @use(<2 x float> [[T2]])
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: ret <2 x float> [[R]]
2018-05-16 00:47:47 +08:00
;
%t1 = shufflevector < 2 x float > %v1 , < 2 x float > undef , < 2 x i32 > < i32 1 , i32 0 >
%t2 = shufflevector < 2 x float > %v2 , < 2 x float > undef , < 2 x i32 > < i32 1 , i32 0 >
%r = fdiv < 2 x float > %t1 , %t2
call void @use ( < 2 x float > %t2 )
ret < 2 x float > %r
}
2018-05-16 01:14:23 +08:00
; But 2 extra uses would require an extra instruction.
2018-05-16 00:47:47 +08:00
define < 2 x float > @shuffle_fsub_multiuse ( < 2 x float > %v1 , < 2 x float > %v2 ) {
; CHECK-LABEL: @shuffle_fsub_multiuse(
; CHECK-NEXT: [[T1:%.*]] = shufflevector <2 x float> [[V1:%.*]], <2 x float> undef, <2 x i32> <i32 1, i32 0>
; CHECK-NEXT: [[T2:%.*]] = shufflevector <2 x float> [[V2:%.*]], <2 x float> undef, <2 x i32> <i32 1, i32 0>
2018-05-16 01:14:23 +08:00
; CHECK-NEXT: [[R:%.*]] = fsub <2 x float> [[T1]], [[T2]]
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: call void @use(<2 x float> [[T1]])
; CHECK-NEXT: call void @use(<2 x float> [[T2]])
2018-05-16 01:14:23 +08:00
; CHECK-NEXT: ret <2 x float> [[R]]
2018-05-16 00:47:47 +08:00
;
%t1 = shufflevector < 2 x float > %v1 , < 2 x float > undef , < 2 x i32 > < i32 1 , i32 0 >
%t2 = shufflevector < 2 x float > %v2 , < 2 x float > undef , < 2 x i32 > < i32 1 , i32 0 >
%r = fsub < 2 x float > %t1 , %t2
call void @use ( < 2 x float > %t1 )
call void @use ( < 2 x float > %t2 )
ret < 2 x float > %r
}
define < 4 x i32 > @shuffle_17add ( < 4 x i32 > %v1 , < 4 x i32 > %v2 ) {
2014-05-11 16:46:12 +08:00
; CHECK-LABEL: @shuffle_17add(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = add <4 x i32> [[V1:%.*]], [[V2:%.*]]
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0>
; CHECK-NEXT: ret <4 x i32> [[R]]
2016-11-10 06:21:58 +08:00
;
%t1 = shufflevector < 4 x i32 > %v1 , < 4 x i32 > zeroinitializer , < 4 x i32 > < i32 1 , i32 2 , i32 3 , i32 0 >
%t2 = shufflevector < 4 x i32 > %v2 , < 4 x i32 > zeroinitializer , < 4 x i32 > < i32 1 , i32 2 , i32 3 , i32 0 >
2014-05-11 16:46:12 +08:00
%r = add < 4 x i32 > %t1 , %t2
ret < 4 x i32 > %r
}
2018-05-16 00:47:47 +08:00
define < 4 x i32 > @shuffle_17addnsw ( < 4 x i32 > %v1 , < 4 x i32 > %v2 ) {
2014-05-11 16:46:12 +08:00
; CHECK-LABEL: @shuffle_17addnsw(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = add nsw <4 x i32> [[V1:%.*]], [[V2:%.*]]
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0>
; CHECK-NEXT: ret <4 x i32> [[R]]
2016-11-10 06:21:58 +08:00
;
%t1 = shufflevector < 4 x i32 > %v1 , < 4 x i32 > zeroinitializer , < 4 x i32 > < i32 1 , i32 2 , i32 3 , i32 0 >
%t2 = shufflevector < 4 x i32 > %v2 , < 4 x i32 > zeroinitializer , < 4 x i32 > < i32 1 , i32 2 , i32 3 , i32 0 >
2014-05-11 16:46:12 +08:00
%r = add nsw < 4 x i32 > %t1 , %t2
ret < 4 x i32 > %r
}
2018-05-16 00:47:47 +08:00
define < 4 x i32 > @shuffle_17addnuw ( < 4 x i32 > %v1 , < 4 x i32 > %v2 ) {
2014-05-11 16:46:12 +08:00
; CHECK-LABEL: @shuffle_17addnuw(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = add nuw <4 x i32> [[V1:%.*]], [[V2:%.*]]
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0>
; CHECK-NEXT: ret <4 x i32> [[R]]
2016-11-10 06:21:58 +08:00
;
%t1 = shufflevector < 4 x i32 > %v1 , < 4 x i32 > zeroinitializer , < 4 x i32 > < i32 1 , i32 2 , i32 3 , i32 0 >
%t2 = shufflevector < 4 x i32 > %v2 , < 4 x i32 > zeroinitializer , < 4 x i32 > < i32 1 , i32 2 , i32 3 , i32 0 >
2014-05-11 16:46:12 +08:00
%r = add nuw < 4 x i32 > %t1 , %t2
ret < 4 x i32 > %r
}
2018-05-16 00:47:47 +08:00
define < 4 x float > @shuffle_17fsub_fast ( < 4 x float > %v1 , < 4 x float > %v2 ) {
2015-11-25 01:51:20 +08:00
; CHECK-LABEL: @shuffle_17fsub_fast(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = fsub fast <4 x float> [[V1:%.*]], [[V2:%.*]]
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0>
; CHECK-NEXT: ret <4 x float> [[R]]
2016-11-10 06:21:58 +08:00
;
%t1 = shufflevector < 4 x float > %v1 , < 4 x float > zeroinitializer , < 4 x i32 > < i32 1 , i32 2 , i32 3 , i32 0 >
%t2 = shufflevector < 4 x float > %v2 , < 4 x float > zeroinitializer , < 4 x i32 > < i32 1 , i32 2 , i32 3 , i32 0 >
2015-11-25 01:51:20 +08:00
%r = fsub fast < 4 x float > %t1 , %t2
2014-05-11 16:46:12 +08:00
ret < 4 x float > %r
}
2018-05-16 04:34:09 +08:00
define < 4 x i32 > @add_const ( < 4 x i32 > %v ) {
; CHECK-LABEL: @add_const(
; CHECK-NEXT: [[TMP1:%.*]] = add <4 x i32> [[V:%.*]], <i32 44, i32 41, i32 42, i32 43>
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0>
; CHECK-NEXT: ret <4 x i32> [[R]]
2016-11-10 06:21:58 +08:00
;
2018-05-16 04:34:09 +08:00
%t1 = shufflevector < 4 x i32 > %v , < 4 x i32 > undef , < 4 x i32 > < i32 1 , i32 2 , i32 3 , i32 0 >
%r = add < 4 x i32 > %t1 , < i32 41 , i32 42 , i32 43 , i32 44 >
ret < 4 x i32 > %r
}
define < 4 x i32 > @sub_const ( < 4 x i32 > %v ) {
; CHECK-LABEL: @sub_const(
; CHECK-NEXT: [[TMP1:%.*]] = sub <4 x i32> <i32 44, i32 43, i32 42, i32 41>, [[V:%.*]]
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
; CHECK-NEXT: ret <4 x i32> [[R]]
2018-05-16 04:34:09 +08:00
;
%t1 = shufflevector < 4 x i32 > %v , < 4 x i32 > undef , < 4 x i32 > < i32 3 , i32 2 , i32 1 , i32 0 >
%r = sub < 4 x i32 > < i32 41 , i32 42 , i32 43 , i32 44 > , %t1
ret < 4 x i32 > %r
}
2018-05-16 06:00:37 +08:00
; Math before shuffle requires an extra shuffle.
2018-05-16 04:34:09 +08:00
define < 2 x float > @fadd_const_multiuse ( < 2 x float > %v ) {
; CHECK-LABEL: @fadd_const_multiuse(
; CHECK-NEXT: [[T1:%.*]] = shufflevector <2 x float> [[V:%.*]], <2 x float> undef, <2 x i32> <i32 1, i32 0>
2018-05-16 06:00:37 +08:00
; CHECK-NEXT: [[R:%.*]] = fadd <2 x float> [[T1]], <float 4.100000e+01, float 4.200000e+01>
2018-05-16 04:34:09 +08:00
; CHECK-NEXT: call void @use(<2 x float> [[T1]])
2018-05-16 06:00:37 +08:00
; CHECK-NEXT: ret <2 x float> [[R]]
2018-05-16 04:34:09 +08:00
;
%t1 = shufflevector < 2 x float > %v , < 2 x float > undef , < 2 x i32 > < i32 1 , i32 0 >
%r = fadd < 2 x float > %t1 , < float 41.0 , float 42.0 >
call void @use ( < 2 x float > %t1 )
ret < 2 x float > %r
}
; Math before splat allows replacing constant elements with undef lanes.
define < 4 x i32 > @mul_const_splat ( < 4 x i32 > %v ) {
; CHECK-LABEL: @mul_const_splat(
2018-05-16 23:15:22 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = mul <4 x i32> [[V:%.*]], <i32 undef, i32 42, i32 undef, i32 undef>
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
; CHECK-NEXT: ret <4 x i32> [[R]]
2018-05-16 04:34:09 +08:00
;
%t1 = shufflevector < 4 x i32 > %v , < 4 x i32 > undef , < 4 x i32 > < i32 1 , i32 1 , i32 1 , i32 1 >
%r = mul < 4 x i32 > < i32 42 , i32 42 , i32 42 , i32 42 > , %t1
ret < 4 x i32 > %r
}
; Take 2 elements of a vector and shift each of those by a different amount
define < 4 x i32 > @lshr_const_half_splat ( < 4 x i32 > %v ) {
; CHECK-LABEL: @lshr_const_half_splat(
2018-06-05 06:26:45 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = lshr <4 x i32> <i32 undef, i32 8, i32 9, i32 undef>, [[V:%.*]]
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 2, i32 2>
; CHECK-NEXT: ret <4 x i32> [[R]]
2018-05-16 04:34:09 +08:00
;
%t1 = shufflevector < 4 x i32 > %v , < 4 x i32 > undef , < 4 x i32 > < i32 1 , i32 1 , i32 2 , i32 2 >
%r = lshr < 4 x i32 > < i32 8 , i32 8 , i32 9 , i32 9 > , %t1
2014-05-11 16:46:12 +08:00
ret < 4 x i32 > %r
}
2018-05-16 23:15:22 +08:00
; We can't change this because there's no pre-shuffle version of the fmul constant.
define < 2 x float > @fmul_const_invalid_constant ( < 2 x float > %v ) {
; CHECK-LABEL: @fmul_const_invalid_constant(
; CHECK-NEXT: [[T1:%.*]] = shufflevector <2 x float> [[V:%.*]], <2 x float> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: [[R:%.*]] = fmul <2 x float> [[T1]], <float 4.100000e+01, float 4.200000e+01>
; CHECK-NEXT: ret <2 x float> [[R]]
;
%t1 = shufflevector < 2 x float > %v , < 2 x float > undef , < 2 x i32 > < i32 0 , i32 0 >
%r = fmul < 2 x float > %t1 , < float 41.0 , float 42.0 >
ret < 2 x float > %r
}
2018-08-28 06:41:44 +08:00
; Reduce the width of the binop by moving it ahead of a shuffle.
2018-08-25 22:37:08 +08:00
define < 4 x i8 > @widening_shuffle_add_1 ( < 2 x i8 > %x ) {
; CHECK-LABEL: @widening_shuffle_add_1(
2018-08-28 06:41:44 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i8> [[X:%.*]], <i8 42, i8 43>
; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x i8> [[TMP1]], <2 x i8> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
2018-08-25 22:37:08 +08:00
; CHECK-NEXT: ret <4 x i8> [[R]]
;
%widex = shufflevector < 2 x i8 > %x , < 2 x i8 > undef , < 4 x i32 > < i32 0 , i32 1 , i32 undef , i32 undef >
%r = add < 4 x i8 > %widex , < i8 42 , i8 43 , i8 44 , i8 45 >
ret < 4 x i8 > %r
}
2018-08-28 06:41:44 +08:00
; Reduce the width of the binop by moving it ahead of a shuffle.
2018-08-25 22:37:08 +08:00
define < 4 x i8 > @widening_shuffle_add_2 ( < 2 x i8 > %x ) {
; CHECK-LABEL: @widening_shuffle_add_2(
2018-08-28 06:41:44 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i8> [[X:%.*]], <i8 43, i8 42>
; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x i8> [[TMP1]], <2 x i8> undef, <4 x i32> <i32 1, i32 0, i32 undef, i32 undef>
2018-08-25 22:37:08 +08:00
; CHECK-NEXT: ret <4 x i8> [[R]]
;
%widex = shufflevector < 2 x i8 > %x , < 2 x i8 > undef , < 4 x i32 > < i32 1 , i32 0 , i32 undef , i32 undef >
%r = add < 4 x i8 > %widex , < i8 42 , i8 43 , i8 44 , i8 45 >
ret < 4 x i8 > %r
}
2018-08-28 06:41:44 +08:00
; Negative test - widening shuffles have the same mask/constant constraint as non-size-changing shuffles.
2018-08-25 22:37:08 +08:00
define < 4 x i8 > @widening_shuffle_add_invalid_constant ( < 2 x i8 > %x ) {
; CHECK-LABEL: @widening_shuffle_add_invalid_constant(
; CHECK-NEXT: [[WIDEX:%.*]] = shufflevector <2 x i8> [[X:%.*]], <2 x i8> undef, <4 x i32> <i32 1, i32 1, i32 undef, i32 undef>
; CHECK-NEXT: [[R:%.*]] = add <4 x i8> [[WIDEX]], <i8 42, i8 43, i8 44, i8 45>
; CHECK-NEXT: ret <4 x i8> [[R]]
;
%widex = shufflevector < 2 x i8 > %x , < 2 x i8 > undef , < 4 x i32 > < i32 1 , i32 1 , i32 undef , i32 undef >
%r = add < 4 x i8 > %widex , < i8 42 , i8 43 , i8 44 , i8 45 >
ret < 4 x i8 > %r
}
2018-08-28 06:41:44 +08:00
; Negative test - widening shuffles have an additional constraint: they must not extend with anything but undefs.
2018-08-25 22:37:08 +08:00
define < 4 x i8 > @widening_shuffle_add_invalid_mask ( < 2 x i8 > %x ) {
; CHECK-LABEL: @widening_shuffle_add_invalid_mask(
; CHECK-NEXT: [[WIDEX:%.*]] = shufflevector <2 x i8> [[X:%.*]], <2 x i8> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 0>
; CHECK-NEXT: [[R:%.*]] = add <4 x i8> [[WIDEX]], <i8 42, i8 43, i8 44, i8 45>
; CHECK-NEXT: ret <4 x i8> [[R]]
;
%widex = shufflevector < 2 x i8 > %x , < 2 x i8 > undef , < 4 x i32 > < i32 0 , i32 1 , i32 undef , i32 0 >
%r = add < 4 x i8 > %widex , < i8 42 , i8 43 , i8 44 , i8 45 >
ret < 4 x i8 > %r
}
2014-05-11 16:46:12 +08:00
define < 4 x i32 > @shuffle_17add2 ( < 4 x i32 > %v ) {
; CHECK-LABEL: @shuffle_17add2(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = shl <4 x i32> [[V:%.*]], <i32 1, i32 1, i32 1, i32 1>
2016-11-10 06:21:58 +08:00
; CHECK-NEXT: ret <4 x i32> [[TMP1]]
;
%t1 = shufflevector < 4 x i32 > %v , < 4 x i32 > zeroinitializer , < 4 x i32 > < i32 3 , i32 2 , i32 1 , i32 0 >
2014-05-11 16:46:12 +08:00
%t2 = add < 4 x i32 > %t1 , %t1
2016-11-10 06:21:58 +08:00
%r = shufflevector < 4 x i32 > %t2 , < 4 x i32 > zeroinitializer , < 4 x i32 > < i32 3 , i32 2 , i32 1 , i32 0 >
2014-05-11 16:46:12 +08:00
ret < 4 x i32 > %r
}
define < 4 x i32 > @shuffle_17mulsplat ( < 4 x i32 > %v ) {
; CHECK-LABEL: @shuffle_17mulsplat(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = mul <4 x i32> [[V:%.*]], [[V]]
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[M1:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> undef, <4 x i32> zeroinitializer
; CHECK-NEXT: ret <4 x i32> [[M1]]
2016-11-10 06:21:58 +08:00
;
%s1 = shufflevector < 4 x i32 > %v , < 4 x i32 > zeroinitializer , < 4 x i32 > zeroinitializer
2014-05-11 16:46:12 +08:00
%m1 = mul < 4 x i32 > %s1 , %s1
2016-11-10 06:21:58 +08:00
%s2 = shufflevector < 4 x i32 > %m1 , < 4 x i32 > zeroinitializer , < 4 x i32 > < i32 1 , i32 1 , i32 1 , i32 1 >
2014-05-11 16:46:12 +08:00
ret < 4 x i32 > %s2
}
2014-05-12 13:44:53 +08:00
; Do not reorder shuffle and binop if LHS of shuffles are of different size
define < 2 x i32 > @pr19717 ( < 4 x i32 > %in0 , < 2 x i32 > %in1 ) {
; CHECK-LABEL: @pr19717(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[IN0:%.*]], <4 x i32> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: [[SHUFFLE4:%.*]] = shufflevector <2 x i32> [[IN1:%.*]], <2 x i32> undef, <2 x i32> zeroinitializer
2016-11-10 06:21:58 +08:00
; CHECK-NEXT: [[MUL:%.*]] = mul <2 x i32> [[SHUFFLE]], [[SHUFFLE4]]
; CHECK-NEXT: ret <2 x i32> [[MUL]]
;
2014-05-12 13:44:53 +08:00
%shuffle = shufflevector < 4 x i32 > %in0 , < 4 x i32 > %in0 , < 2 x i32 > zeroinitializer
%shuffle4 = shufflevector < 2 x i32 > %in1 , < 2 x i32 > %in1 , < 2 x i32 > zeroinitializer
%mul = mul < 2 x i32 > %shuffle , %shuffle4
ret < 2 x i32 > %mul
}
2014-05-12 18:11:27 +08:00
define < 4 x i16 > @pr19717a ( < 8 x i16 > %in0 , < 8 x i16 > %in1 ) {
; CHECK-LABEL: @pr19717a(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = mul <8 x i16> [[IN0:%.*]], [[IN1:%.*]]
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[MUL:%.*]] = shufflevector <8 x i16> [[TMP1]], <8 x i16> undef, <4 x i32> <i32 5, i32 5, i32 5, i32 5>
; CHECK-NEXT: ret <4 x i16> [[MUL]]
2016-11-10 06:21:58 +08:00
;
2014-05-12 18:11:27 +08:00
%shuffle = shufflevector < 8 x i16 > %in0 , < 8 x i16 > %in0 , < 4 x i32 > < i32 5 , i32 5 , i32 5 , i32 5 >
%shuffle1 = shufflevector < 8 x i16 > %in1 , < 8 x i16 > %in1 , < 4 x i32 > < i32 5 , i32 5 , i32 5 , i32 5 >
%mul = mul < 4 x i16 > %shuffle , %shuffle1
ret < 4 x i16 > %mul
}
2014-05-13 14:07:21 +08:00
define < 8 x i8 > @pr19730 ( < 16 x i8 > %in0 ) {
; CHECK-LABEL: @pr19730(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <16 x i8> [[IN0:%.*]], <16 x i8> undef, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
2016-11-10 06:21:58 +08:00
; CHECK-NEXT: [[SHUFFLE1:%.*]] = shufflevector <8 x i8> [[SHUFFLE]], <8 x i8> undef, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
; CHECK-NEXT: ret <8 x i8> [[SHUFFLE1]]
;
2014-05-13 14:07:21 +08:00
%shuffle = shufflevector < 16 x i8 > %in0 , < 16 x i8 > undef , < 8 x i32 > < i32 7 , i32 6 , i32 5 , i32 4 , i32 3 , i32 2 , i32 1 , i32 0 >
%shuffle1 = shufflevector < 8 x i8 > %shuffle , < 8 x i8 > undef , < 8 x i32 > < i32 7 , i32 6 , i32 5 , i32 4 , i32 3 , i32 2 , i32 1 , i32 0 >
ret < 8 x i8 > %shuffle1
}
2014-05-14 17:05:09 +08:00
define i32 @pr19737 ( < 4 x i32 > %in0 ) {
; CHECK-LABEL: @pr19737(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: [[RV_RHS:%.*]] = extractelement <4 x i32> [[IN0:%.*]], i32 0
; CHECK-NEXT: ret i32 [[RV_RHS]]
2016-11-10 06:21:58 +08:00
;
2014-05-14 17:05:09 +08:00
%shuffle.i = shufflevector < 4 x i32 > zeroinitializer , < 4 x i32 > %in0 , < 4 x i32 > < i32 0 , i32 4 , i32 2 , i32 6 >
%neg.i = xor < 4 x i32 > %shuffle.i , < i32 -1 , i32 -1 , i32 -1 , i32 -1 >
%and.i = and < 4 x i32 > %in0 , %neg.i
%rv = extractelement < 4 x i32 > %and.i , i32 0
ret i32 %rv
}
2014-06-24 18:38:10 +08:00
2015-11-22 00:12:58 +08:00
; In PR20059 ( http://llvm.org/pr20059 ), shufflevector operations are reordered/removed
; for an srem operation. This is not a valid optimization because it may cause a trap
; on div-by-zero.
define < 4 x i32 > @pr20059 ( < 4 x i32 > %p1 , < 4 x i32 > %p2 ) {
; CHECK-LABEL: @pr20059(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: [[SPLAT1:%.*]] = shufflevector <4 x i32> [[P1:%.*]], <4 x i32> undef, <4 x i32> zeroinitializer
; CHECK-NEXT: [[SPLAT2:%.*]] = shufflevector <4 x i32> [[P2:%.*]], <4 x i32> undef, <4 x i32> zeroinitializer
2016-11-10 06:21:58 +08:00
; CHECK-NEXT: [[RETVAL:%.*]] = srem <4 x i32> [[SPLAT1]], [[SPLAT2]]
; CHECK-NEXT: ret <4 x i32> [[RETVAL]]
;
2015-11-22 00:12:58 +08:00
%splat1 = shufflevector < 4 x i32 > %p1 , < 4 x i32 > undef , < 4 x i32 > zeroinitializer
%splat2 = shufflevector < 4 x i32 > %p2 , < 4 x i32 > undef , < 4 x i32 > zeroinitializer
%retval = srem < 4 x i32 > %splat1 , %splat2
ret < 4 x i32 > %retval
}
2014-06-24 18:38:10 +08:00
define < 4 x i32 > @pr20114 ( < 4 x i32 > %__mask ) {
2016-11-10 06:21:58 +08:00
; CHECK-LABEL: @pr20114(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: [[MASK01_I:%.*]] = shufflevector <4 x i32> [[__MASK:%.*]], <4 x i32> undef, <4 x i32> <i32 0, i32 0, i32 1, i32 1>
2016-11-10 06:21:58 +08:00
; CHECK-NEXT: [[MASKED_NEW_I_I_I:%.*]] = and <4 x i32> [[MASK01_I]], bitcast (<2 x i64> <i64 ptrtoint (<4 x i32> (<4 x i32>)* @pr20114 to i64), i64 ptrtoint (<4 x i32> (<4 x i32>)* @pr20114 to i64)> to <4 x i32>)
; CHECK-NEXT: ret <4 x i32> [[MASKED_NEW_I_I_I]]
;
2014-06-24 18:38:10 +08:00
%mask01.i = shufflevector < 4 x i32 > %__mask , < 4 x i32 > undef , < 4 x i32 > < i32 0 , i32 0 , i32 1 , i32 1 >
%masked_new.i.i.i = and < 4 x i32 > bitcast ( < 2 x i64 > < i64 ptrtoint ( < 4 x i32 > ( < 4 x i32 > ) * @pr20114 to i64 ) , i64 ptrtoint ( < 4 x i32 > ( < 4 x i32 > ) * @pr20114 to i64 ) > to < 4 x i32 > ) , %mask01.i
ret < 4 x i32 > %masked_new.i.i.i
}
2015-04-04 04:18:40 +08:00
define < 2 x i32 * > @pr23113 ( < 4 x i32 * > %A ) {
2016-11-10 06:21:58 +08:00
; CHECK-LABEL: @pr23113(
2018-05-16 00:47:47 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i32*> [[A:%.*]], <4 x i32*> undef, <2 x i32> <i32 0, i32 1>
2016-11-10 06:21:58 +08:00
; CHECK-NEXT: ret <2 x i32*> [[TMP1]]
;
2015-04-04 04:18:40 +08:00
%1 = shufflevector < 4 x i32 * > %A , < 4 x i32 * > undef , < 2 x i32 > < i32 0 , i32 1 >
ret < 2 x i32 * > %1
}
2018-06-02 02:52:38 +08:00
2018-06-02 03:23:18 +08:00
; Unused lanes in the new binop should not kill the entire op (although it may simplify anyway as shown here).
2018-06-02 02:52:38 +08:00
define < 2 x i32 > @PR37648 ( < 2 x i32 > %x ) {
; CHECK-LABEL: @PR37648(
2018-06-02 03:23:18 +08:00
; CHECK-NEXT: ret <2 x i32> zeroinitializer
2018-06-02 02:52:38 +08:00
;
%splat = shufflevector < 2 x i32 > %x , < 2 x i32 > undef , < 2 x i32 > zeroinitializer
%r = urem < 2 x i32 > %splat , < i32 1 , i32 1 >
ret < 2 x i32 > %r
}
2018-06-03 00:16:42 +08:00
; Test shuffle followed by binop with splat constant for all 18 binop opcodes.
; Test with constant as operand 0 and operand 1 for non-commutative opcodes.
define < 2 x i32 > @add_splat_constant ( < 2 x i32 > %x ) {
; CHECK-LABEL: @add_splat_constant(
; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i32> [[X:%.*]], <i32 42, i32 undef>
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x i32> [[TMP1]], <2 x i32> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x i32> [[R]]
2018-06-03 00:16:42 +08:00
;
%splat = shufflevector < 2 x i32 > %x , < 2 x i32 > undef , < 2 x i32 > zeroinitializer
%r = add < 2 x i32 > %splat , < i32 42 , i32 42 >
ret < 2 x i32 > %r
}
define < 2 x i32 > @sub_splat_constant0 ( < 2 x i32 > %x ) {
; CHECK-LABEL: @sub_splat_constant0(
; CHECK-NEXT: [[TMP1:%.*]] = sub <2 x i32> <i32 42, i32 undef>, [[X:%.*]]
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x i32> [[TMP1]], <2 x i32> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x i32> [[R]]
2018-06-03 00:16:42 +08:00
;
%splat = shufflevector < 2 x i32 > %x , < 2 x i32 > undef , < 2 x i32 > zeroinitializer
%r = sub < 2 x i32 > < i32 42 , i32 42 > , %splat
ret < 2 x i32 > %r
}
define < 2 x i32 > @sub_splat_constant1 ( < 2 x i32 > %x ) {
; CHECK-LABEL: @sub_splat_constant1(
; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i32> [[X:%.*]], <i32 -42, i32 undef>
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x i32> [[TMP1]], <2 x i32> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x i32> [[R]]
2018-06-03 00:16:42 +08:00
;
%splat = shufflevector < 2 x i32 > %x , < 2 x i32 > undef , < 2 x i32 > zeroinitializer
%r = sub < 2 x i32 > %splat , < i32 42 , i32 42 >
ret < 2 x i32 > %r
}
define < 2 x i32 > @mul_splat_constant ( < 2 x i32 > %x ) {
; CHECK-LABEL: @mul_splat_constant(
; CHECK-NEXT: [[TMP1:%.*]] = mul <2 x i32> [[X:%.*]], <i32 42, i32 undef>
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x i32> [[TMP1]], <2 x i32> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x i32> [[R]]
2018-06-03 00:16:42 +08:00
;
%splat = shufflevector < 2 x i32 > %x , < 2 x i32 > undef , < 2 x i32 > zeroinitializer
%r = mul < 2 x i32 > %splat , < i32 42 , i32 42 >
ret < 2 x i32 > %r
}
define < 2 x i32 > @shl_splat_constant0 ( < 2 x i32 > %x ) {
; CHECK-LABEL: @shl_splat_constant0(
2018-06-05 06:26:45 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i32> <i32 5, i32 undef>, [[X:%.*]]
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x i32> [[TMP1]], <2 x i32> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x i32> [[R]]
2018-06-03 00:16:42 +08:00
;
%splat = shufflevector < 2 x i32 > %x , < 2 x i32 > undef , < 2 x i32 > zeroinitializer
%r = shl < 2 x i32 > < i32 5 , i32 5 > , %splat
ret < 2 x i32 > %r
}
define < 2 x i32 > @shl_splat_constant1 ( < 2 x i32 > %x ) {
; CHECK-LABEL: @shl_splat_constant1(
2018-07-10 01:20:20 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i32> [[X:%.*]], <i32 5, i32 0>
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x i32> [[TMP1]], <2 x i32> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x i32> [[R]]
2018-06-03 00:16:42 +08:00
;
%splat = shufflevector < 2 x i32 > %x , < 2 x i32 > undef , < 2 x i32 > zeroinitializer
%r = shl < 2 x i32 > %splat , < i32 5 , i32 5 >
ret < 2 x i32 > %r
}
define < 2 x i32 > @ashr_splat_constant0 ( < 2 x i32 > %x ) {
; CHECK-LABEL: @ashr_splat_constant0(
2018-06-05 06:26:45 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = ashr <2 x i32> <i32 5, i32 undef>, [[X:%.*]]
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x i32> [[TMP1]], <2 x i32> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x i32> [[R]]
2018-06-03 00:16:42 +08:00
;
%splat = shufflevector < 2 x i32 > %x , < 2 x i32 > undef , < 2 x i32 > zeroinitializer
%r = ashr < 2 x i32 > < i32 5 , i32 5 > , %splat
ret < 2 x i32 > %r
}
define < 2 x i32 > @ashr_splat_constant1 ( < 2 x i32 > %x ) {
; CHECK-LABEL: @ashr_splat_constant1(
2018-07-10 01:20:20 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = ashr <2 x i32> [[X:%.*]], <i32 5, i32 0>
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x i32> [[TMP1]], <2 x i32> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x i32> [[R]]
2018-06-03 00:16:42 +08:00
;
%splat = shufflevector < 2 x i32 > %x , < 2 x i32 > undef , < 2 x i32 > zeroinitializer
%r = ashr < 2 x i32 > %splat , < i32 5 , i32 5 >
ret < 2 x i32 > %r
}
define < 2 x i32 > @lshr_splat_constant0 ( < 2 x i32 > %x ) {
; CHECK-LABEL: @lshr_splat_constant0(
2018-06-05 06:26:45 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = lshr <2 x i32> <i32 5, i32 undef>, [[X:%.*]]
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x i32> [[TMP1]], <2 x i32> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x i32> [[R]]
2018-06-03 00:16:42 +08:00
;
%splat = shufflevector < 2 x i32 > %x , < 2 x i32 > undef , < 2 x i32 > zeroinitializer
%r = lshr < 2 x i32 > < i32 5 , i32 5 > , %splat
ret < 2 x i32 > %r
}
define < 2 x i32 > @lshr_splat_constant1 ( < 2 x i32 > %x ) {
; CHECK-LABEL: @lshr_splat_constant1(
2018-07-10 01:20:20 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = lshr <2 x i32> [[X:%.*]], <i32 5, i32 0>
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x i32> [[TMP1]], <2 x i32> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x i32> [[R]]
2018-06-03 00:16:42 +08:00
;
%splat = shufflevector < 2 x i32 > %x , < 2 x i32 > undef , < 2 x i32 > zeroinitializer
%r = lshr < 2 x i32 > %splat , < i32 5 , i32 5 >
ret < 2 x i32 > %r
}
define < 2 x i32 > @urem_splat_constant0 ( < 2 x i32 > %x ) {
; CHECK-LABEL: @urem_splat_constant0(
; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <2 x i32> [[X:%.*]], <2 x i32> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: [[R:%.*]] = urem <2 x i32> <i32 42, i32 42>, [[SPLAT]]
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%splat = shufflevector < 2 x i32 > %x , < 2 x i32 > undef , < 2 x i32 > zeroinitializer
%r = urem < 2 x i32 > < i32 42 , i32 42 > , %splat
ret < 2 x i32 > %r
}
define < 2 x i32 > @urem_splat_constant1 ( < 2 x i32 > %x ) {
; CHECK-LABEL: @urem_splat_constant1(
2018-06-05 06:26:45 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = urem <2 x i32> [[X:%.*]], <i32 42, i32 1>
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x i32> [[TMP1]], <2 x i32> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x i32> [[R]]
2018-06-03 00:16:42 +08:00
;
%splat = shufflevector < 2 x i32 > %x , < 2 x i32 > undef , < 2 x i32 > zeroinitializer
%r = urem < 2 x i32 > %splat , < i32 42 , i32 42 >
ret < 2 x i32 > %r
}
define < 2 x i32 > @srem_splat_constant0 ( < 2 x i32 > %x ) {
; CHECK-LABEL: @srem_splat_constant0(
; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <2 x i32> [[X:%.*]], <2 x i32> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: [[R:%.*]] = srem <2 x i32> <i32 42, i32 42>, [[SPLAT]]
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%splat = shufflevector < 2 x i32 > %x , < 2 x i32 > undef , < 2 x i32 > zeroinitializer
%r = srem < 2 x i32 > < i32 42 , i32 42 > , %splat
ret < 2 x i32 > %r
}
define < 2 x i32 > @srem_splat_constant1 ( < 2 x i32 > %x ) {
; CHECK-LABEL: @srem_splat_constant1(
2018-06-05 06:26:45 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = srem <2 x i32> [[X:%.*]], <i32 42, i32 1>
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x i32> [[TMP1]], <2 x i32> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x i32> [[R]]
2018-06-03 00:16:42 +08:00
;
%splat = shufflevector < 2 x i32 > %x , < 2 x i32 > undef , < 2 x i32 > zeroinitializer
%r = srem < 2 x i32 > %splat , < i32 42 , i32 42 >
ret < 2 x i32 > %r
}
define < 2 x i32 > @udiv_splat_constant0 ( < 2 x i32 > %x ) {
; CHECK-LABEL: @udiv_splat_constant0(
; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <2 x i32> [[X:%.*]], <2 x i32> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: [[R:%.*]] = udiv <2 x i32> <i32 42, i32 42>, [[SPLAT]]
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%splat = shufflevector < 2 x i32 > %x , < 2 x i32 > undef , < 2 x i32 > zeroinitializer
%r = udiv < 2 x i32 > < i32 42 , i32 42 > , %splat
ret < 2 x i32 > %r
}
define < 2 x i32 > @udiv_splat_constant1 ( < 2 x i32 > %x ) {
; CHECK-LABEL: @udiv_splat_constant1(
2018-06-05 06:26:45 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = udiv <2 x i32> [[X:%.*]], <i32 42, i32 1>
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x i32> [[TMP1]], <2 x i32> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x i32> [[R]]
2018-06-03 00:16:42 +08:00
;
%splat = shufflevector < 2 x i32 > %x , < 2 x i32 > undef , < 2 x i32 > zeroinitializer
%r = udiv < 2 x i32 > %splat , < i32 42 , i32 42 >
ret < 2 x i32 > %r
}
define < 2 x i32 > @sdiv_splat_constant0 ( < 2 x i32 > %x ) {
; CHECK-LABEL: @sdiv_splat_constant0(
; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <2 x i32> [[X:%.*]], <2 x i32> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: [[R:%.*]] = sdiv <2 x i32> <i32 42, i32 42>, [[SPLAT]]
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%splat = shufflevector < 2 x i32 > %x , < 2 x i32 > undef , < 2 x i32 > zeroinitializer
%r = sdiv < 2 x i32 > < i32 42 , i32 42 > , %splat
ret < 2 x i32 > %r
}
define < 2 x i32 > @sdiv_splat_constant1 ( < 2 x i32 > %x ) {
; CHECK-LABEL: @sdiv_splat_constant1(
2018-06-05 06:26:45 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = sdiv <2 x i32> [[X:%.*]], <i32 42, i32 1>
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x i32> [[TMP1]], <2 x i32> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x i32> [[R]]
2018-06-03 00:16:42 +08:00
;
%splat = shufflevector < 2 x i32 > %x , < 2 x i32 > undef , < 2 x i32 > zeroinitializer
%r = sdiv < 2 x i32 > %splat , < i32 42 , i32 42 >
ret < 2 x i32 > %r
}
define < 2 x i32 > @and_splat_constant ( < 2 x i32 > %x ) {
; CHECK-LABEL: @and_splat_constant(
; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X:%.*]], <i32 42, i32 undef>
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x i32> [[TMP1]], <2 x i32> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x i32> [[R]]
2018-06-03 00:16:42 +08:00
;
%splat = shufflevector < 2 x i32 > %x , < 2 x i32 > undef , < 2 x i32 > zeroinitializer
%r = and < 2 x i32 > %splat , < i32 42 , i32 42 >
ret < 2 x i32 > %r
}
define < 2 x i32 > @or_splat_constant ( < 2 x i32 > %x ) {
; CHECK-LABEL: @or_splat_constant(
; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i32> [[X:%.*]], <i32 42, i32 undef>
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x i32> [[TMP1]], <2 x i32> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x i32> [[R]]
2018-06-03 00:16:42 +08:00
;
%splat = shufflevector < 2 x i32 > %x , < 2 x i32 > undef , < 2 x i32 > zeroinitializer
%r = or < 2 x i32 > %splat , < i32 42 , i32 42 >
ret < 2 x i32 > %r
}
define < 2 x i32 > @xor_splat_constant ( < 2 x i32 > %x ) {
; CHECK-LABEL: @xor_splat_constant(
; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[X:%.*]], <i32 42, i32 undef>
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x i32> [[TMP1]], <2 x i32> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x i32> [[R]]
2018-06-03 00:16:42 +08:00
;
%splat = shufflevector < 2 x i32 > %x , < 2 x i32 > undef , < 2 x i32 > zeroinitializer
%r = xor < 2 x i32 > %splat , < i32 42 , i32 42 >
ret < 2 x i32 > %r
}
define < 2 x float > @fadd_splat_constant ( < 2 x float > %x ) {
; CHECK-LABEL: @fadd_splat_constant(
2018-06-05 06:26:45 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = fadd <2 x float> [[X:%.*]], <float 4.200000e+01, float undef>
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x float> [[R]]
2018-06-03 00:16:42 +08:00
;
%splat = shufflevector < 2 x float > %x , < 2 x float > undef , < 2 x i32 > zeroinitializer
%r = fadd < 2 x float > %splat , < float 42.0 , float 42.0 >
ret < 2 x float > %r
}
define < 2 x float > @fsub_splat_constant0 ( < 2 x float > %x ) {
; CHECK-LABEL: @fsub_splat_constant0(
2018-06-05 06:26:45 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = fsub <2 x float> <float 4.200000e+01, float undef>, [[X:%.*]]
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x float> [[R]]
2018-06-03 00:16:42 +08:00
;
%splat = shufflevector < 2 x float > %x , < 2 x float > undef , < 2 x i32 > zeroinitializer
%r = fsub < 2 x float > < float 42.0 , float 42.0 > , %splat
ret < 2 x float > %r
}
define < 2 x float > @fsub_splat_constant1 ( < 2 x float > %x ) {
; CHECK-LABEL: @fsub_splat_constant1(
2018-10-04 05:44:59 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = fadd <2 x float> [[X:%.*]], <float -4.200000e+01, float undef>
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x float> [[R]]
2018-06-03 00:16:42 +08:00
;
%splat = shufflevector < 2 x float > %x , < 2 x float > undef , < 2 x i32 > zeroinitializer
%r = fsub < 2 x float > %splat , < float 42.0 , float 42.0 >
ret < 2 x float > %r
}
2018-09-26 06:48:58 +08:00
define < 2 x float > @fneg ( < 2 x float > %x ) {
; CHECK-LABEL: @fneg(
; CHECK-NEXT: [[TMP1:%.*]] = fsub <2 x float> <float -0.000000e+00, float undef>, [[X:%.*]]
; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x float> [[R]]
;
%splat = shufflevector < 2 x float > %x , < 2 x float > undef , < 2 x i32 > zeroinitializer
%r = fsub < 2 x float > < float -0.0 , float -0.0 > , %splat
ret < 2 x float > %r
}
2018-06-03 00:16:42 +08:00
define < 2 x float > @fmul_splat_constant ( < 2 x float > %x ) {
; CHECK-LABEL: @fmul_splat_constant(
2018-06-05 06:26:45 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = fmul <2 x float> [[X:%.*]], <float 4.200000e+01, float undef>
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x float> [[R]]
2018-06-03 00:16:42 +08:00
;
%splat = shufflevector < 2 x float > %x , < 2 x float > undef , < 2 x i32 > zeroinitializer
%r = fmul < 2 x float > %splat , < float 42.0 , float 42.0 >
ret < 2 x float > %r
}
define < 2 x float > @fdiv_splat_constant0 ( < 2 x float > %x ) {
; CHECK-LABEL: @fdiv_splat_constant0(
2018-06-05 06:26:45 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = fdiv <2 x float> <float 4.200000e+01, float undef>, [[X:%.*]]
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x float> [[R]]
2018-06-03 00:16:42 +08:00
;
%splat = shufflevector < 2 x float > %x , < 2 x float > undef , < 2 x i32 > zeroinitializer
%r = fdiv < 2 x float > < float 42.0 , float 42.0 > , %splat
ret < 2 x float > %r
}
define < 2 x float > @fdiv_splat_constant1 ( < 2 x float > %x ) {
; CHECK-LABEL: @fdiv_splat_constant1(
2018-06-05 06:26:45 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = fdiv <2 x float> [[X:%.*]], <float 4.200000e+01, float undef>
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x float> [[R]]
2018-06-03 00:16:42 +08:00
;
%splat = shufflevector < 2 x float > %x , < 2 x float > undef , < 2 x i32 > zeroinitializer
%r = fdiv < 2 x float > %splat , < float 42.0 , float 42.0 >
ret < 2 x float > %r
}
define < 2 x float > @frem_splat_constant0 ( < 2 x float > %x ) {
; CHECK-LABEL: @frem_splat_constant0(
2018-06-05 06:26:45 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = frem <2 x float> <float 4.200000e+01, float undef>, [[X:%.*]]
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x float> [[R]]
2018-06-03 00:16:42 +08:00
;
%splat = shufflevector < 2 x float > %x , < 2 x float > undef , < 2 x i32 > zeroinitializer
%r = frem < 2 x float > < float 42.0 , float 42.0 > , %splat
ret < 2 x float > %r
}
define < 2 x float > @frem_splat_constant1 ( < 2 x float > %x ) {
; CHECK-LABEL: @frem_splat_constant1(
2018-06-05 06:26:45 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = frem <2 x float> [[X:%.*]], <float 4.200000e+01, float undef>
2018-06-03 00:27:44 +08:00
; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> undef, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x float> [[R]]
2018-06-02 02:52:38 +08:00
;
%splat = shufflevector < 2 x float > %x , < 2 x float > undef , < 2 x i32 > zeroinitializer
2018-06-03 00:16:42 +08:00
%r = frem < 2 x float > %splat , < float 42.0 , float 42.0 >
2018-06-02 02:52:38 +08:00
ret < 2 x float > %r
}
